8255 datasheet, programmable peripheral interface

datasheet

1. intel. 8255-5

PROGRAMMABLE PERIPHERAL INTERFACE

MOS:85 Compatible 82551 1 Direct Bit Set Reset Capablty Easing
24 Programmable 1/0 Pins Control Appleton Interface
Competely TTL Compatible Reduces System Package Count
Fully Compatible with Inte 164 DC Driving Capabity
Mieroprocessor Familes

Improved Timing Characteristics — Stead Tann

= 40 Pin OP Package

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2554 FUNCTIONAL DESCRIPTION

General

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Data Bus Butter

‘Read/Write and Control Logic

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82554 BASIC OPERATION

Aa
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(RESET)

Group A and Group 8 Controls

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Ports A,B, and ©.

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82554 OPERATIONAL DESCRIPTION

Mode Selection

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PRET eee

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Single Bit Set/Reset Feature

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Operating Modes

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MDDE 0 (BASI OUTPUT

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Input Control Signal Definition

STB (son

1BF (Input Butter Full F/F)

INTA (Interrupt Request)
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Figured MODE robe apa

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Output Control Signal Definition

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Figure 11 MODE 1 Svabed Output

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Combinations of MODE 1

Operating Modes

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Bicirectional Bus 1/0 Control Signal
Definition

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Output Operations.

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INTE 1 (me TE Flo Associated mit
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Input Operations

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‘Special Mode Combination
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‘Source Current Capability on Port B
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Roading Port O Status

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17. Figure 18 MODE? Sinus Word Format

APPLICATIONS OF THE 62554,

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ABSOLUTE MAXIMUM RATINGS” von otto a gr
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D.C. CHARACTERISTICS 1 =

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CAPACITANCE »

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ALC. CHARACTERISTICS 1, = 01070. Veo = +59 119%, GND = Ov

Bus Parameters

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ALC. CHARACTERISTICS Cones)

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AC. TESTING INPUT, OUTPUT WAVEFORM AG TESTING LOAD ARCO

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WAVEFORMS

Mode 0 wasıc neun

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WAVEFORMS conn)

ODE 1 (StROSED INPUT

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WAVEFORMS conn)

Move 2 (IDAECTIONAL)