A novel SOSMC based SVPWM control of Z-source inverter for AC microgrid applications

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About This Presentation

In this paper, analysis and control of Single stage Z-Source Inverter (ZSI) using Particle Swarm Optimiza- tion (PSO) tuned Proportional Integral (PI) based Space Vector Pulse Width Modulation (SVPWM) and Second Order Sliding Mode Control (SOSMC) based SVPWM for harmonic reduction and load voltage r...


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Microprocessors and Microsystems 75 (2020) 103045
Contents lists available at ScienceDirect
Microprocessors and Microsystems
journal homepage: www.elsevier.com/locate/micpro
A novel SOSMC based SVPWM control of Z-source inverter for AC
microgrid applications
A. Sangari
a , ∗
, R. Umamaheswari
a
, M. G Umamaheswari
b
, Lekshmi Sree B
b
a
Department of Electrical and Electronics Engineering, Velammal Engineering College, Tamil Nadu, India
b
Department of Electrical and Electronics Engineering, Rajalakshmi Engineering College, Tamil Nadu, India
a r t i c l e i n f o
Article history:
Received 6 January 2020
Revised 14 February 2020
Accepted 18 February 2020
Available online 29 February 2020
Keywords:
Proportional integral (PI)
Shoot-through (ST)
Space vector pulse width modulation
(SVPWM)
Z-source inverter (ZSI)
Second order sliding mode control (SOSMC)
Particle swarm organization (PSO)
a b s t r a c t
In this paper, analysis and control of Single stage Z-Source Inverter (ZSI) using Particle Swarm Optimiza-
tion (PSO) tuned Proportional Integral (PI) based Space Vector Pulse Width Modulation (SVPWM) and
Second Order Sliding Mode Control (SOSMC) based SVPWM for harmonic reduction and load voltage
regulation are presented. To increase the reliability and to enhance the output voltage of ZSI, the Shoot-
Through (ST) state is implemented. To decrease the number of sensors and to simplify the controller
design, sixth order model of ZSI is transformed into second order model using Pade’s approximation
method. To analyse the steady state and transient response of the proposed system, the closed loop im-
plementation is carried out using proposed control techniques. PSO tuned PI controller is utilized for
outer voltage control to obtain the Shoot Through Duty Ratio (STDR). Inner current loop utilizes PSO
tuned PI controller based SVPWM/SOSMC based SVPWM techniques. MATLAB/SIMULINK software tool is
used to simulate the proposed system. From the simulation results, it is inferred that the SOSMC based
SVPWM technique offers fast transient response, low % Total Harmonic Distortion (THD) and regulated
output voltage when compared to PSO tuned PI based SVPWM control scheme. Hence, an experimental
prototype model of 2 kW controlled by the SOSMC based SVPWM using Field Programmable Gate Array
(FPGA) is constructed to validate the simulation results with the experimental results.
©2020 Elsevier B.V. All rights reserved.
1. Introduction
Distributed generation (DG) is the important module of the ad-
vanced microgrid model that allows renewable energy integration
in a distribution system. The enabling of AC microgrid in distri-
bution networks permits delivering distributed power and provid-
ing grid support services throughout regular operation of the grid,
moreover as powering isolated islands just in case of faults and
contingencies, the performance and reliability of the electrical sys-
tem is increased. In DG unit operation, inverters play an important
role in interfacing energy sources with the grid utility. An effective
interfacing can successfully be accomplished by operating invert-
ers with effective control techniques. The function of an inverter
is to convert the DC input voltage to a symmetric AC output volt-
age of desired value. The waveforms of ideal inverters should be
sinusoidal. However, the waveforms of practical inverters are non-
sinusoidal and comprises of certain harmonics. The traditional in-
verters such as Voltage Source Inverter (VSI) and Current Source
Inverter (CSI) have one common disadvantage. It cannot boost or

Corresponding authors.
E-mail address: [email protected] (A. Sangari).
buck the voltage comes from the renewable energy sources, other
issue is that the traditional inverter need to add the dead-band
time into the control sequence, but it will cause the output wave-
form distortion. These limitations can be overcome by ZSI. Usually
boost converters are used as the first stage to increase the volt-
age and inverter as the second stage to convert DC to AC. VSI is
commonly used because of their ease of control and design, but ST
may occur, if the switches of same phase leg triggered simultane-
ously. In recent times, Single stage ZSI are widely used, in which
the inverter voltage is increased during ST period and at the same
period the supply does not get short circuited due to the presence
of LC network. ZSI has the capability to buck and boost the voltage.
Moreover, ZSI can provide rides through capability during voltage
sags and also it extends the output voltage range come from the
battery. The advantages of ZSI include 1. Reduction in system size,
2. Reduction in number of switches used 3. Low cost 4. Increase
in system efficiency. To achieve these aforementioned advantages,
closed loop implementation of ZSI is carried out [1–9] . An attempt
has been made to control the ZSI by using PSO tuned PI based
SVPWM and SOSMC based SVPWM techniques to obtain the reg-
ulated output voltage with low %THD. It has two control variables
such as the modulation index and the STDR (do). Many control
https://doi.org/10.1016/j.micpro.2020.103045
0141-9331/© 2020 Elsevier B.V. All rights reserved.

2 A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045
Fig. 1. Main circuit of ZSI.
techniques such as PI control, hysteresis control, dead beat control,
Linear Quadratic Regulator (LQR) etc. have been carried out earlier.
The usage of the PI controller leads to zero steady state error but
with sluggish response. Hysteresis control technique is easy to im-
plement but it has more switching losses due to variable switching
frequency which results in reduction in efficiency [10] . LQR con-
troller minimizes the ripples exist in the feedback signal but there
is a difficulty in finding the appropriate weighing factors [11–14] .
In the proposed system, Sliding Mode Control (SMC) is used to ob-
tain the balanced three phase AC voltages. SMC has many advan-
tages over the other control methods; system becomes stable for
large voltage variations, simple implementation and good dynamic
response [15–18] .
The sensing of six varying circuit parameters are essential to
construct a closed loop system using SMC. The main drawbacks
of sensing these parameters are i) controller design complexity
ii) requires more number of sensors. Therefore, in the proposed
work, Pade’s approximation technique is used to convert the sixth
order ZSI into a second order ZSI by holding the main (domi-
nant) poles and the effects of all other variables are neglected
[18–22] . SVPWM is superior over Sinusoidal Pulse Width Modula-
tion (SPWM) because of efficient DC bus utilization, low switching
losses and less % THD [23–24] . The proposed system uses the com-
bination of modulated signal from PI based SVPWM/SOSMC based
SVPWM, STDR (do) from PSO tuned PI controller and triangular
carrier signal to produce unique PWM pulses for ZSI. Unique PWM
technique has the following advantages when compared to conven-
tional PWM techniques; 1. Reduced %THD 2. Good power factor 3.
Good output voltage regulation.PSO tuned PI controller is used to
enhance the capabilities of traditional PI controller. The main ad-
vantages of the PSO algorithm are; 1. More stable 2. Smaller time
steps are required 3. Simple to implement 4. Lower computational
cost 5. Fewer parameters need to be adjusted. This results an in-
crease in output voltage and also provides a better harmonic pro-
file when compared to conventional ST based ZSI. Performance pa-
rameters like %THD, power factor, % regulation and % efficiency are
calculated and compared for PI based SVPWM and SOSMC based
SVPWM techniques for line, load and set point variations.
The paper is organized as follows; Section 2 presents the state
space model of ZSI and its design. Section 3 explains the controller
design for ZSI. Section 4 describes the closed loop implementation
of PSO tuned PI based SVPWM and SOSMC based SVPWM tech-
niques for ZSI. Section 5 explains the simulation results of PSO
tuned PI based SVPWM and SOSMC based SVPWM techniques and
the comparison of performance parameters of both the techniques.
Section 6 discusses the hardware results of SOSMC based SVPWM.
Section 7 presents the conclusion.
The state space modeling of ZSI, the design of ZSI components
and the derivation of the second order model using Pade’s Approx-
imation Method are discussed in the following sections. Figs.1 and
2 shows the main and simplified circuits of ZSI. In this, the inverter
bridge is linked parallel with the Z-source network. It comprises of
two inductors ( L
1 , L
2 ), two capacitors ( C
1 , C
2 ), filter inductor ( L
3 ),
filter capacitor ( C
3 ) and load resistor ( R ). V
DC and V o are the DC in-
put voltage and output voltage respectively. i
L and i o indicates the
source side inductor current and load current respectively.
2. Modeling and design of ZSI
2. 1. state space modeling of Z-source inverter
The state space model of ZSI is obtained by considering the ST
state and non-ST state switching actions of the inverter. Here x
1 ,
x
2 , x
3 , x
4 , x
5 and x
6 are the currents through the inductor 1 ( i
L1 ),
inductor 2 ( i
L2 ), filter inductor ( i
L3 ) and the voltage across the ca-
pacitor 1 ( v
C1 ), capacitor 2 ( v
C2 ), filter capacitor ( v
C3 ) respectively.
The duty cycle is represented as ‘ d ’. The circuit operation of ZSI is
analyzed by considering ST and non-ST states.
2.1.1. Shoot-Through state
The state equation corresponding to ST state is as follows
d i L 1
dt
=
v C1
L 1
(1)
d i L 2
dt
=
v C2
L 2
(2)
d i L 3
dt
= −
v C3
L 3
(3)
d v C1
dt
= −
i
L 1
C 1
(4)
d v C2
dt
= −
i
L 2
C 2
(5)
d v C3
dt
=
i L 3
C 3

v C3
R C 3
(6)
The matrix form of state Eqs. (1) –(6) during ST state are given
as


















d i L 1
dt
d i L 2
dt
d i L 3
dt
d v C1
dt
d v C2
dt
d v C3
dt


















=















0 0 0
1
L 1
0 0
0 0 0 0
1
L 2
0
0 0 0 0 0 −
1

L 3

1

C 1
0 0 0 0 0
0 −
1

C 2
0 0 0 0
0 0
1
C 3
0 0 −
1

R C 3





















i L 1
i L 2
i L 3
v C1
v C2
v C3






+






0
0
0
0
0
0






v DC (7)
The Eq. (7) is in the form of

X = A 1 X + B 1 U (8)
Here A
1 represents the state matrix and B
1 represents the input
matrix for the ST condition.

A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045 3
Fig. 2. Simplified circuit of ZSI.
Fig. 3. Circuit of ZSI during ST State.
Fig. 4. Circuit of ZSI during Non-ST state.
2.1.2. Non shoot-through state
The non ST state equivalent circuit is shown in Fig.4 .
The state equation corresponding to non ST state is as follows
d i L 1
dt
=
v DC
L 1

v C2
L 1
(9)
d i L 2
dt
=
v DC
L 2

v C1
L 2
(10)
d i L 3
dt
=
v C1
L 3
+
v C2
L 3

v C3
L 3

v DC
L 3
(11)
d v C1
dt
=
i L 2
C 1

i
L 3
C 1
(12)
d v C2
dt
=
i L 1
C 2

i
L 3
C 2
(13)
d v C3
dt
=
i L 3
C 3

v C3
R C 3
(14)
The matrix form of state Eqs. (9) –(14) during non-shoot-
through state are given as,


















d i L 1
dt
d i L 2
dt
d i L 3
dt
d v C1
dt
d v C2
dt
d v C3
dt


















=















0 0 0 0 −
1

L 1
0
0 0 0 −
1

L 2
0 0
0 0 0
1
L 3
1
L 3

1

L 3
0
1
C 1

1

C 1
0 0 0
1
C 2
0 −
1

C 2
0 0 0
0 0
1
C 3
0 0 −
1

R C 3





















i L 1
i L 2
i L 3
v C1
v C2
v C3






+











1
L 1
1
L 2

1

L 3
0
0
0











v DC (15)
The Eq. (15) is in the form of

X = A 2 X + B 2 U (16)
Here A 2 relates state matrix and B 2 relates input matrix for the
non-ST condition. For the ZSI, the output equation is represented
as
Y =

0 0 0 0 0 1








i L 1
i L 2
i L 3
v C1
v C2
v C3






(17)
For a time period ‘ T ’, switch ‘ S ’ is ON for the duration ‘ d ’ and
switch ‘ S ’ is OFF for the duration ‘(1- d )’ . Now by using the matri-
ces A 1, B 1, A 2, B 2 the following matrices are found.
Where, A is the state matrix and is given as
A = A 1 d + A 2 ( 1 −d )

4 A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045
=















0 0 0
d
L 1

( 1 −d )
L 1
0
0 0 0 −
( 1 −d )
L 2
d
L 2
0
0 0 0
( 1 −d )
L 3
( 1 −d )
L 3

1
L 3

d
C 1
( 1 −d )
C 1

( 1 −d )
C 1
0 0 0
( 1 −d )
C 2

d
C 2

( 1 −d )
C 2
0 0 0
0 0
1
C 3
0 0 −
1
R C 3















(18)
B is an input matrix and is given as
B = B 1 d + B 2 ( 1 −d ) =











( 1 −d )
L 1
( 1 −d )
L 2

( 1 −d )
L 3
0
0
0











(19)
Where, output matrix ‘ C ’ and feed forward matrix ‘ D ’ are given
as
C =

0 0 0 0 0 1

D = [ 0 ] (20)
2.2. Design of ZSI parameters
Z-source inverter parameters are designed by using the follow-
ing specifications: Output voltage V o : 415 V, Load resistance R: 210
Ω , f s : 20 kHz, d: 0.7, current ripples in the inductor ∗i
L : 2% of I
L ,
voltage ripple in capacitor ∗V
C : 5% of V
C . The inductor L
1 and L
2
and capacitor C
1 and C
2 values are designed by using the above
specifications as,
L 1 = L 2 = L =
V C d 0
∗I L f s
= 500 μH
C 1 = C 2 = C =
I L d 0
∗V C f s
= 500 μF
L
f = 5 mH = C
f = 10 0 0 μF
2.3. Derivation of second order model using Pade’s approximation
method
The ZSI parameters are substituted in system matrices as given
in Eqs. (18) –(20) and the equation L
−1
(sI- A)
−1
B is used to acquire
the corresponding Transfer Function (TF). The resultant second or-
der transfer function is,
G 6 ( s ) =
−4 ×10
−4
s
4
+ 6 . 094 ×10
−9
s
3
−2 . 56 ×10
11
s
2
+ 0 . 02424 s −3 . 84 ×10
17
s
6
+ 14 . 29 s
5
+ 5 . 672 ×10
6
s
4
+ 7 . 817 ×10
7
s
3
+ 6 . 976 ×10
12
s
2
+ 8 . 411 ×10
13
s + 1 . 158 ×10
18
(21)
Pade’s approximation reduced order method is used to convert
6th order model of ZSI into 2nd order model.Power series expan-
sion of G
6 (s) is
0 . 333 −2 . 801 ×10
−5
s −1 . 804 ×10
−6
s
2
+ 2 . 329 ×10
−10
s
3
+ 9 . 029 ×10
−12
s
4
From the above equation, the coefficients C
0 , C
1 , C
2 , C
3 , C
4 , C
5 ,
C
6 , C
7 , C
8 , C
9 are found out and the general fifth order TF is given
as,
G 5 ( s ) =

a 51 +

a 52 s +

a 53 s
2
+

a 54 s
3
+

a 55 s
4

a 41 +

a 42 s +

a 43 s
2
+

a 44 s
3
+

a 45 s
4
+ s
5
(22)
Where








a 41

a 42

a 43

a 44

a 45







=




c 5 c 4 c 3 c 2 c 1
c 6 c 5 c 4 c 3 c 2
c 7 c 6 c 5 c 4 c 3
c 8 c 7 c 6 c 5 c 4
c 9 c 8 c 7 c 6 c 5




−1 ⎡



−c 0
−c 1
−c 2
−c 3
−c 4




(23)








a 51

a 52

a 53

a 54

a 55







=




c 0 0 0 0 0
c 1 c 0 0 0 0
c 2 c 1 c 0 0 0
c 3 c 2 c 1 c 0 0
c 4 c 3 c 2 c 1 c 0








a 41
a 42
a 43
a 44
a 45




(24)
After substituting the coefficients

a
41 ,

a
42 ,

a
43 ,

a
44 ,

a
45 ,

a
51 ,

a
52 ,

a
53 ,

a
54 ,

a
55 , from Eqs. (23) and
(24) in Eq. (22) , the reduced fifth order TF of the proposed system
is given by,
G 5 ( s ) =
−23 . 43 s
4
+ 4 . 008 ×10
4
s
3
+ 9 . 504 ×10
7
s
2
+ 9 . 408 ×10
10
s −2 . 187 ×10
13
s
5
+ 1399 s
4
+ 1 . 661 ×10
6
s
3
−4 . 755 ×10
7
s
2
+ 2 . 777 ×10
11
s −6 . 568 ×10
13
(25)
Power series expansion of G
5 (s) is
0 . 333 −2 . 801 ×10
−5
s −1 . 804 ×10
−6
s
2
+ 2 . 329 ×10
−10
s
3
+ 9 . 029 ×10
−12
s
4
........
From the above, the coefficients C
0 , C
1 , C
2 , C
3 , C
4 , C
5 , C
6 , C
7 are
obtained.
Similarly, the reduced fourth and third order TFs are found to
be,
G 4 ( s )
=
−3 . 112 s
3
−6 . 404 ×10
4
s
2
−1 . 311 ×10
6
s + 6 . 599 ×10
9
s
4
+ 42 . 91 s
3
+ 8 . 515 ×10
4
s
2
+ 2 . 488 ×10
6
s −1 . 982 ×10
10
(26)
G 3 ( s ) =
13 . 86 s
2
+ 6 . 184 ×10
4
s −3 . 608 ×10
7
s
3
−532 . 3 s
2
+ 1 . 778 ×10
5
s −1 . 083 ×10
8
(27)
The general form of reduced second order TF is given by,
G 2 ( s ) =

a 21 +

a 22 s

a 11 +

a 12 s + s
2
(28)

A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045 5
Fig. 5. Frequency responses of ZSI for sixth and second order model.
Table 1
Time domain specifications.
Specifications
Sixth order
model
Second order model (Pade’s
method)
Rise time 0.00217 0.00245
Settling Time 0.591 0.605
Maximum Peak
Overshoot
100 95.4
Peak time 0.00712 0.00729
Table 2
Parameters of PSO.
Parameter Value
Population Size 100
Number of Iterations 100
Velocity Constant,C
1 2
Velocity Constant C
2 2


a 11

a 12

=

c 2 c 1
c 3 c 2

−1
−c 0
−c 1

(29)


a 21

a 22

=

c 0 0
c 1 c 0



a 11

a 12

(30)
After substituting the coefficients from Eqs. (29) and (30) in
Eq. (28) , the reduced second order TF is given by,
G 2 ( s ) =
0 . 218 s −6 . 186 ×10
4
s
2
+ 10 . 14 s + 1 . 845 ×10
5
(31)
The state matrix, input matrix, output matrix and feed forward
matrix for the second order model are,
A =

−12 . 9 −362 . 8
512 0

, B =

8
0

, C =

0 . 02725 −15 . 1

and D = [0] (32)
Figs. 5 and 6 shows the frequency response & step responses
of original and reduced order systems. The time domain specifica-
tions are same for both 6th order and 2nd order system and are
listed in Table 1 . Reduced second order model retains the dynam-
ics of dominant state variables such as current through the filter
inductor ( i
L3 ), voltage across filter capacitor ( V
C3 ). The dynamics of
other state variables such as current through the inductor 1 ( i
L1 ),
current through the inductor 2 ( i
L2 ) and the voltage across the
capacitor 1 ( V
C1 ), voltage across capacitor 2 ( V
C2 ) are neglected.
That’s why the time domain specifications such as rise time, set-
tling time, peak time and peak overshoot of reduced second order
model are almost same as that of the original sixth order model
and are listed in Table 1 .
It is also realized from the frequency responses that the pro-
posed system models preserves the required stability margins.
3. PI based SVPWM technique
3.1. PSO based voltage and current controllers
PSO based PI controller is utilized for outer voltage control to
obtain the STDR (do). Inner current loop also utilizes PSO based
PI Controller. The system is prepared in the PSO algorithm, with a
population of arbitrary alternatives, which are termed as particles
and a randomized velocity also allocates for every feasible solution.
PSO depends on the interchanging of data amongst particles of the
population named swarm. Every particle modifies its path in the
direction of its best solution (fitness) that is attained consequently.
This value is termed as pbest. Similarly, each particle changes its
path in the direction of the best previous place achieved by the
neighborhood member. This value is termed as gbest. Each par-
ticle moves through an adaptive speed in the search space. The
fitness function estimates the particle efficiency. Error criterion is
used to evaluate the controller’s performance. In this work, Inte-
gral Square Error (ISE) criterion is used. The flow chart in Fig.7
represents the sequences of processes. Table 2 shows the param-
eters used for PSO. The finest values of K p and K
i are 0.06 and 150
respectively.
3.2. SVPWM technique
SVPWM is used because of efficient DC bus utilization, lower
switching losses and less% THD. The Simulink model of the same
is shown in Fig. 8 and it has six main units such as sinusoidal
signal generator, Clarke’s transformation unit, angle sector, clock
time generation unit, space vector signal generator and unique
PWM signal generator. Sinusoidal Signal Generator is used to pro-
duce three phase sinusoidal signals with 120 °phase shift having
the same frequency and magnitude. Clarke’s Transformation unit is
used to convert three phase abc voltages into two phase αβvolt-
ages. This αβvoltages is used to determine which sector is work-
ing and the value of time duration for which six IGBT switches are
open or close. Angle Sector is used to determine which sector is
working and sequence of the number that corresponds to sector I
to sector VI. Switching time T
1 and T
2 are calculated based on the
corresponding sector number. The Space Vector Signal Generator

6 A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045
Fig. 6. Step responses for sixth and second order model.
Fig. 7. Flow chart of PSO.
Fig. 8. Block diagram of SVPWM technique.
calculates T a , T
b and T c based on T
1 , T
2 and T o . The working sector
and angle selector decides the switching patterns of Space Vector
Modulated (SVM) output. Then the SVM output ( V

) is compared
with carrier signal to produce unique PWM pulses.
3.3. Unique PWM technique
In mode 1, when the switch S
1 is triggered from 0 °to 180 °, the
variable ST pulse is given to S
4 within the period from 30 °to 150 °.
Fig. 9. Circuit diagram to produce PWM Pulse.
Similarly, in mode 2, when the switch S
3 is triggered from 120 °
to
300 °, the variable ST pulse is given to S6 from 150 °to 270 °.
In mode 3, when the switch S
5 is triggered from 240 °to 360 °,
the variable ST pulse is given to S
2 within the period from 270 °
to
390 °. Similarly, this cycle repeats and the possible ST switching
pattern for the proposed method along with a normal switching
pattern for all the six switches are shown in Table.3 . The switch-
ing pattern clearly indicates the ST time period (1) and non-ST
time period (0). Fig.9 shows the generation of PWM pulses for the
switch S
1 using a unique PWM technique during the ST state.
The triangular wave & SVM signal is compared and then the
output is multiplied with the switching pattern of S1 for the time
period 0 °to 180 °to produce the normal PWM pulses. At the same
time, triangular wave is compared with STDR ( d
0 ) and the output
is multiplied with the switching pattern for the time period of 210 °
to
330 °to produce the ST pulse.
Then the ST pulses are added with normal PWM pulses to pro-
duce a unique PWM pulse for the switch S
1 . Similarly, all the other
pulses are produced for the switches S
2 to S
6 for the respective
time period and the switching pulses for the same is shown in
Fig.10 .
3.4. Control of ZSI using PSO/GA tuned PI based SVPWM technique
The closed loop implementation of ZSI using PSO/GA tuned PI
based SVPWM is shown in Fig.11 . The error signal is generated by
comparing the reference with the input capacitor voltage ( V
C ). This
is given as an input to the PSO based PI controller. The STDR ( d
0 )
obtained from the PSO/GA tuned PI controller. Reference signal ( V

)
is produced using PSO/GA tuned PI based SVPWM technique. These
reference signals are given as the input to the unique PWM tech-
nique for generating PWM pulses to the switches present in the
ZSI.
4. SOSMC based SVPWM technique
4.1. Design of SOSMC
SMC method offers many advantages over the other linear con-
trol techniques: the system is stable for large line and load varia-

A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045 7
Table 3
Shoot-through state switching pattern.
S 0 30 60 90 120 150 180 210 240 270 300 330 360
S1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1
S2 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
S3 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
S4 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1
S5 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1
S6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1
Fig. 10. PWM pulses for IGBT switches.
tions, good dynamic response and simple implementation. The de-
sign of the SOSMC controller is discussed in the following section.
The controller consists of an inner current control loop, which uses
SOSMC for shaping the load current, and an outer voltage loop
using PSO tuned PI to control the load voltage. The inputs given
to the SOSMC are voltage error e
1 and the current error e
2 . The
switching signal is denoted as ‘ u ’
Let W refers the dynamic variables (reference), X is the state
variable and e is the error
W =

w 1 w 2

T
, X =

x 1 x 2

T
, e =

e 1 e 2

T
(32)
x 1 = V o , x 2 = i L 1 , w 1 = V
Re f , w 2 = i
Re f,
Here the state variables considered are the values of errors e
1 ,
e
2 , e
3 and e
4 for dq axis are given by,
e 1 = w 1 −x 1 = V
d Re f −V
d
e 2 = w 2 −x 2 = I
d Re f −I
d
e 3 = w 1 −x 1 = V
q Re f −V q
e 4 = w 2 −x 2 = I
q Re f −I q (33)
The state model of the SOSMC based ZSI is given by

X = AX + BU
Where
A =

−12 . 9 −362 . 8
512 0

, B =

8
0

Fig. 11. Control of ZSI using PI based SVPWM technique.

8 A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045
Fig. 12. Control of ZSI using SOSMC based SVPWM technique.
Fig. 13. Simulated waveforms for rated load.
Sliding surface σ( e, t ) is defined as the function of error vector
and is given as
σ( e, t ) = [ G ] [ e ]
Where
σ( e, t ) = [ G ] [ e ] = 0 , G = G 1 G 2 > 0 , G =

G 1 G 2

and e is closer to zero and is given by

σ( e, t ) = [ G ]


e

= 0
To determine the control law, the state equation using the avail-
able state equation is obtained as follows

e =

W −AX −B

σ= G

e = [ G ] [ W −AW + Ae −B u eq ] = 0
Fig. 14. Simulated waveforms for line voltage variation.
The equation of control signal is
u eq = [ GB ]
−1
G [ W −AW + Ae ]
Substituting the above equation into Eq. (33) gives the error dy-
namics

e =

1 −B ( GB )
−1
G




W −AW + Ae



W −AW = 0

The invariance condition is substituted in the previous equation

e =

1 −B ( GB )
−1
G

Ae = A eq e (34)

A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045 9
Fig. 15. Simulated waveforms for load variation.
Fig. 16. Simulated waveforms for set point variation.
Fig. 17. THD Spectrum of output current .
Fig. 18. Performance parameter analysis of PI based SVPWM and SOSMC based
SVPWM technique.
Fig. 19. Experimental setup.
The matrix A eq is chosen to satisfy Eq. (33) and is given as
A eq =

−2 . 96 0
0 −0 . 927

(35)
The matrix G is then obtained using Eq. (34) is given by,
G = [ G 1 G 2 ] = [ 1 10 ]
Hence the sliding surface σis given by
σ
d

= G 1 e 1 + G 2 e 2 , σq

= G 1 e 3 + G 2 e 4 (36)
This equation implies that the SOSMC based ZSI operates in SM
and e
2 tends to zero with a time constant G
2 / G
1 . The control law
for the hitting condition is derived using the sliding surface σ( e,
t ) = [ G ][ e ]is as follows
u = M sgn ( σ) x 1 = U x 1 (37)
where, U = 1 for σ> δand U = 0 for σ> - δ
Eq. (36) is used to generate the sliding surfaces and are given
as the input to SVPWM to produce unique PWM pulses.
4.2. Control of ZSI using SOSMC based SVPWM technique
The closed loop implementation of ZSI using SOSMC based
SVPWM is shown in Fig.12 . The reference voltage and the input

10 A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045
Fig. 20. Hardware implementation of the proposed control scheme.
Fig. 21. PWM pulses for IGBT switches.
Fig. 22. Experimental waveforms of SOSMC based SVPWM technique for rated load.
Table

4

Performance

parameter

analysis

for

various

control

scheme.

Load

Current(A)

%

THD

%

Efficiency

Power

Factor

%

Regulation

SOSMC

based

SVPWM

SOSMC

based

SPWM

PSO

Tuned

PI

Based

SVPWM

GA

Tuned

PI

Based

SVPWM

SOSMC

based

SVPWM

SOSMC

based

SVPWM

PSO

Tuned

PI

Based

SVPWM

GA

Tuned

PI

Based

SVPWM

SOSMC

based

SPWM

SOSMC

based

SVPWM

PSO

Tuned

PI

Based

SVPWM

GA

Tuned

PI

Based

SVPWM

SOSMC

based

SPWM

SOSMC

based

SVPWM

PSO

Tuned

PI

Based

SVPWM

GA

Tuned

PI

Based

SVPWM

5

2.91

2.89

2.2

2.91

95.2

96.3

95.9

96

0.97

0.96

0.96

0.96


0.6


0.9


0.6


0.6

4

2.5

2.95

3

2.95

96.24

95.8

95.4

95.6

0.98

0.98

0.95

0.95


1.19


0.6


0.9


0.6

3.4

2.66

3.02

3.6

3.52

97.86

98

94.73

98.9

0.99

0.97

0.97

0.97


0.9


1.2


1.19


1.19

3

2.97

3.29

4.1

4.07

98.03

97.8

94.43

97.3

0.95

0.96

0.94

0.94


0.9


1.5


1.49


1.49

2.6

2.88

3.62

5

4.25

99.9

94.8

93.61

94.5

0.98

0.95

0.95

0.95


0.9


1.6


1.49


1.52

2.4

3

3.84

5.5

4.86

95.3

95.6

93.18

95.43

0.97

0.98

0.96

0.96


0.9


1.8


1.79


1.79

A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045 11
Table 5
Settling time for attaining the output voltage.
PWM
Technique
Rated Load
(sec)
10%
increase in
Line voltage
(sec)
10%
decrease in
Line voltage
(sec)
10%
increase in
Load (sec)
10%
decrease in
Load (sec)
10%
increase in
Set point
(sec)
10%
decrease in
Set point
(sec)
PI based
SVPWM
0.1029 0.0387 0.0454 0.0203 0.0324 0.0276 0.03247
SOSMC
based
SVPWM
0.0858 0.0367 0.0451 0.0184 0.0284 0.02308 0.0319
Fig. 23. Experimental waveforms of SOSMC based SVPWM technique for set point
variation.
Table 6
Comparison between conventional and unique PWM techniques.
PWM Technique % THD Power Factor % Regulation
Conventional PWM 6.23 0.82 0.9
Unique PWM 2.89 0.96 −0.6
capacitor voltage (VC) are compared to generate the error signal.
This is given to the PSO based PI controller as an input. The PI
controller output is considered as the STDR (d
0 ) and the SVM sig-
nal (V

) is generated using SOSMC based SVPWM technique. These
reference signals (V

) and STDR (d0) are given as the input to the
unique PWM technique for generating PWM pulses to the switches
present in the ZSI.
5. Simulation results
This section discusses the simulation results of ZSI using PI
based SVPWM and SOSMC based SVPWM techniques. Fig.13 (a) and
(b) depicts the simulated waveforms for rated load. Results show
that the PSO tuned PI based SVPWM control technique can track
a controlled output voltage for rated load at 0.1029 s. It is also in-
ferred that SOSMC based SVPWM technique attains the regulated
output voltage at 0.0858 s.
Fig. 24. Experimental waveforms of SOSMC based SVPWM technique for load vari-
ation.
5.1. Performance analysis
Performance parameters such as% voltage regulation, settling
time and the%THD are computed and then compared for PSO/GA
tuned PI based SVPWM and SOSMC based SVPWM/ SPWM tech-
niques in Table 4 . Fig.14 (a) and (b) represent the simulated wave-
forms for line voltage variations. 10% raise in line voltage is initi-
ated at 0.2 s and 10% reduction in line voltage is initiated at 0.3 s.
Results show that the PI based SVPWM control technique can track
a controlled output voltage for 10% increase and decrease in line
voltage at 0.0387 s & 0.0454 s respectively. It is also inferred that
SOSMC based SVPWM technique attains the regulated output volt-
age for 10% increase and decrease in line voltage at 0.0367 s and
0.0451 s respectively.
Fig.15.a ) and b) depict the simulated waveforms for load varia-
tions. 10% increase in load is introduced at 0.2 s and 10% decrease
in load is applied at 0.3 s. Results show that the PI based SVPWM
and SOSMC based SVPWM technique control technique can track a
controlled output voltage for 10% increase and decrease in load at
0.0203 s & 0.0324 s, 0.0184 s and 0.0284 s respectively.
Fig.16.a ) and b) illustrate the simulated waveforms for set point
variations. 10% increase in set point is introduced at 0.2 s and
10% decrease in set point is introduced at 0.3 s. Results show that
the PI based SVPWM and SOSMC based SVPWM technique control
technique can track a controlled output voltage for 10% increase
and decrease in set point at 0.0276 s & 0.03247 s, 0.02308 s and
0.0319 s respectively.

12 A. Sangari, R. Umamaheswari and M. G Umamaheswari et al. / Microprocessors and Microsystems 75 (2020) 103045
Table 7
Hardware specifications.
Specifications/Component name Role Rating
LTS 25-NP (current sensor) To sense the input current 25A
LV 25-P (Voltage sensor) To sense the output voltage I
PN = 10 mA,
V
PN = 10 V
−500V
TLP250 (Driver circuit) To increase the current to the level needed to drive
FGA25N120 (IGBT) To provide the switching operation 25
A,
1200V
MUR30120(Diode) To provide Shoot-Through action
SPARTAN-6(FPGA controller) To control the overall system
Fig. 25. Experimental waveforms of SOSMC based SVPWM technique for line vari-
ation.
Fig.17.a ) and b) show the THD spectrum of output current for PI
based SVPWM and SMC based SVPWM techniques for rated load
conditions. The%THD value is found to be less than 5% as per the
norms given in IEEE 519 standard. Table 4 shows the performance
parameter analysis of PSO/GA tuned PI based SVPWM and SOSMC
based SVPWM/SPWM for load variations. Table 5 shows the settling
time for line, load and set point variations of PI based SVPWM and
SOSMC based SVPWM.
Table 6 shows the comparison between conventional and
unique PWM techniques. The unique PWM technique offers bet-
ter results in terms of performance parameters when compared to
conventional PWM technique.
From the performance analysis, it is inferred that SOSMC based
SVPWM provides better results with respect to performance in-
dices like settling time,%THD,%efficiency,% voltage regulation and
power factor when compared to PSO tuned PI based SVPWM con-
trol scheme. Hence the proceeding section discusses about the
hardware implementation of ZSI using SOSMC based SVPWM tech-
nique.
6. Experimental results
An experimental setup for 2 kW is constructed as shown in
Fig.19 . It is controlled using SOSMC based SVPWM technique im-
plemented in SPARTAN-6 FPGA controller. The Hardware compo-
nents and its specifications are listed in Table 6 . The K p and K
i
values for the current controller of SOSMC and voltage controller
for generating STDR are found to be 0.06 and 150. Hardware im-
plementation is depicted in
Fig.20 . The output voltage, output current, capacitor voltage
and inductor current are sensed and are fed as the inputs to the
SPARTAN-6 FPGA controller. The proposed algorithm is processed
by FPGA digital controller and the resultant pulses are used for
triggering the IGBT switches present in ZSI.
Fig.21 shows the PWM pulses for the IGBT switches.
Fig. 22 . Shows the input inductor current, three phase output
voltages and three phase output currents of SOSMC based SVPWM
for rated load condition, which confirms that the load current and
voltage are well maintained.
Fig. 23 . Shows the input inductor current, three phase output
voltages and three phase output currents of SOSMC based SVPWM
for set point variation, which confirms that the load current and
voltage are well maintained.
Fig. 24 . Shows the input inductor current, three phase output
voltages and three phase output currents of SOSMC based SVPWM
for load variation, which confirms that the load current and voltage
are well maintained.
Fig. 25 . Shows the input inductor current, three phase output
voltages and three phase output currents of SOSMC based SVPWM
for line variation, which confirms that the load current and voltage
are well maintained.
7. Conclusion
In this proposed work, closed loop implementation of ZSI us-
ing SOSMC based SVPWM was carried out for AC microgrid appli-
cations. Pade’s approximation methos is used to converter 6th or-
der model into 2nd order model. The proposed control technique
provides regulated output voltage with the less settling time for
varying load, line and set point conditions. The experimental setup
of 2 kW controlled by the SPARTAN-6 FPGA controller is imple-
mented for validating the simulation results. Proposed system is
well suited for AC microgrid applications.
Declaration of Competing Interest
None.
Supplementary materials
Supplementary material associated with this article can be
found, in the online version, at doi: 10.1016/j.micpro.2020.103045 .
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Sangari A , Assistant Professor, Department of Electrical
and Electronics Engineering, Rajalakshmi Engineering Col-
lege has obtained UG in Sri Venkateswara College of Engi-
neering and PG in Rajalakshmi Engineering College, Anna
University, Chennai. Her research area includes Multi
Level Inverter, Z-Source Inverter and Renewable Energy.
She has published 4 papers
in international journals and
has presented three International Conference and four
National Conferences.Email: [email protected]; san-
[email protected]
Dr. R. Umamaheswari Professor, Department of Electri-
cal and Electronics Engineering has obtained UG and PG
in Applied Electronics from PSG College of Technology,
Coimbatore and PhD in High Voltage Engineering from
IIT Madras in the year 2011. Currently working as Profes-
sor, EEE, Velammal Engineering College, and Chennai. Her
field
of research is High Voltage Technology and Indus-
trial Electronics. She has presented many papers in na-
tional and international conferences and published many
papers in journal and international journals with high im-
pact factor Email : [email protected]
Dr. M.G.Umamaheswari , Professor, Department of Elec-
trical and Electronics Engineering, Rajalakshmi Engineer-
ing College has obtained UG in Instrumentation and Con-
trol Engineering from Government College of Technology,
Coimbatore and PG in Electrical Drives and Embedded
Control and PhD in the area of power quality from College
of Engineering, Anna
University, Chennai. she has pre-
sented more than 35 papers in National and International
Conferences. She has published more papers with high
impact factor international journals like IEEE, IET and El-
sevier. Her research area of interest includes power qual-
ity enhancement using power converters, application of
linear and nonlinear
controllers to renewable power fed
converters. Email : [email protected]
Lekshmi Sree B , received BE in Electrical and Electron-
ics Engineering from CSI Institute of Technology, Tho-
valai, India, ME in Power Electronics and Drives from Ra-
jalakshmi Engineering College, Chennai, India. She is cur-
rently working as a Assistant Professor and pursuing Ph.D,
at Rajalakshmi Engineering College, Chennai, India.
She
has published 5 research papers in referred journals and
Conferences. Her research interests are optimization tech-
niques, Robust control techniques and renewable energy
sources. Email : [email protected]