Analog electronics telling about differential amplifier
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Language: en
Added: Mar 07, 2024
Slides: 62 pages
Slide Content
Analog Circuits
Day-10
Differential Amplifiers
Introduction
•Thefunctionofdifferentialamplifieristoamplifythe
difference oftwosignals.
•The need for differential amplifier in many physical
measurements arises where response from d.c to many
megahertz is required. It is also the basic input stage of an
integratedamplifier.
Block diagram of differentialamplifier
9
Fig. Basic configuration of a differential amplifier
•Theoutputsignalinadifferentialamplifierisproportionaltothe
difference between the two inputsignals.
V
o α (V
1 –V
2)
Where,
V
1 & V
2 –Two inputsignals
V
o –Single endedoutput
Differential Gain(A
d):
Where,A
d is the constant ofproportionality.
A
disthegainwithwhichdifferentialamplifieramplifiesthedifference
oftwo inputsignals.
Hence it is known as ‘differential gain of the differentialamplifier’.
V1-V2= Difference of twovoltage
= -
g
mR
C
Common Mode Gain(A
d):
Anaverageofthetwoinputsignalsiscalledcommonmode
signal denoted asV
c.
Hence,thedifferentialamplifieralsoproducestheoutput
voltage proportional to common modesignals.
V
o = A
cV
c
Where A
c = -R
C/R
E, is the common modegain.
Therefore, there exists some finite output for V
1 = V
2 due tocommon
mode gainAc.
Hence the total output of any differential amplifier can be givenas,
V
o = A
d V
d + A
cV
c
Common Mode Rejection Ratio(CMRR):
•Theabilityofadifferentialamplifiertorejectacommonmodesignalis
definedbyaratiocalled‘CommonModeRejectionRatio’denotedas
CMRR.
•CMRRisdefinedastheratioofthedifferentialvoltagegainA
dto
commonmodegainA
candisexpressesindB.
CMRR = Ad/Ac =
g
mR
E
Input and Output Resistances:
Diff. mode input resistance:
R
i=2 re
Diff. mode output resistance:
R
o= R
C // ro
Differential Amplifier using FETs:
A
d = -
g
mR
D
A
c = -R
D/R
ss
CMRR = Ad/Ac =
g
mR
ss
Identicaltransistors.
Circuit elements are symmetric about themid-plane.
Identical bias voltages at Q1 & Q2 gates (V
G1 = V
G2 ).
Signalvoltages & currents are different because v
1 v
2.
Load RD: resistor,current-
mirror, active load,…
RSS: Bias resistor,current
source(current-mirror)
oFor now, we keep track of “two” output, vo1 and vo2 , becausethere
are several ways to configure “one” output from thiscircuit.
Q1 & Q2 are in CS-like
configuration (input at
the gate, output at the
drain) but with sources
connected to eachother.
I
DID
ID
ID
2ID
V
GS1 V
GS 2 V
GS
V
OV 1 V
OV 2 V
OV
I
D 1 I
D 2 I
D
V
DS1 V
DS 2 V
DS
SS1 S2andVVV
Since V
G1 V
G 2 V
G
g
m1 g
m 2 g
m
r
o1 r
o 2 r
o
Also:
Differential Amplifier –Gain
v
3
rR
g(v v ) 0
R r
g
m(v
1v
3)g
m(v
2v
3)0
v
3 v
o 2
v
3 v
o1
SS
R r
o r
o
m2 3g(v v )0
o
v
o2 v
3
D
m1 3
D o
v
o1
v
o1 v
3
Node VoltageMethod:
Nodevo1:
Nodevo2:
v
o2
Nodev3:
Above three equations should be solved to find vo1 , vo2 and v3 (lengthycalculations)
v
gs1 v
1 v
3
v
gs 2 v
2 v
3
Becausethecircuitissymmetric,differential/common-mode
methodisthepreferredmethodtosolvethiscircuit(andwe
canusefundamentalconfigurationformulas).
Differential Amplifier –Common Mode(1)
Because of summeryof
the circuit and inputsignals*:
Common Mode: Set v
d = 0 (or set v
1 = v
c and v
2 = v
c)
v
o1 v
o 2andi
d1 i
d 2i
d
We can solve for vo1 by node voltage method
but there is a simpler and more elegantway.
id
idid
2id
* If you do not see this, set v1 = v2 = vc in node equations of the previous slide, subtractthe
first two equations to get vo1 = vo2 . Ohm’s law on RD then gives id1 = id2 =id
Differential Amplifier –Common Mode(2)
Because of the symmetry, the common-mode circuit breaks intotwo
identical“half-circuits”.
id
idid
2id
id
0
id
v
3 2i
d R
SS*
* Vss is grounded forsignal
Differential Amplifier –Common Mode(3)
g
mR
D
12g
mR
SSR
D/r
o
v
o1
v
o 2
v
cv
c
CS Amplifiers withRs
0
The common-mode circuit breaks into two identicalhalf-circuits.
Differential Amplifier–DifferentialMode(1)
R
v
3
rR
R r
g
m(0.5v
dv
3)g
m(0.5v
dv
3)0
r
o r
o
v
3 v
o 2
v
3 v
o1
SS
g
m(0.5v
dv
3)0
oD
v
o 2
v
o 2 v
3
g
m(0.5v
dv
3)0
D o
v
o1
v
o1 v
3
v
gs1 0.5v
d v
3
v
gs 2 0.5v
dv
3
Node VoltageMethod:
Nodevo1:
Nodevo2:
Nodev3:
Differential Mode: Set vc = 0 (or set v1 = vd /2 and v2 = vd /2)
r
11
o
o1 o2
(vv)
Rr
D o
2
2g
v 0
m3
1
1
r
2
2g
0
mv
3
Rr
SS o
v
o1v
o2
o
o1 o2Nodev+Nodev:
3Node v:
v
o1 v
o 20v
o1 v
o2
v
3 0
Only possiblesolution:
Differential Amplifier–DifferentialMode(2)
Because of the symmetry, the differential-mode circuit also breaks intotwo
identicalhalf-circuits.
v
3 0andv
o1 v
o2i
d1 i
d2
v3 =0
idid
v3 =0
CSAmplifier
d d
v
o2v
o1
g
moD(r||R)
0.5v
g
moD(r||R),
0.5v
idid
0
idid
Concept of “HalfCircuit”
CommonMode DifferentialMode
For a symmetric circuit, differential-andcommon-mode
analysis can be performed using“half-circuits.”
Common-Mode “HalfCircuit”
idid
0
Common ModeHalf-circuit
1.Currents about symmetry line areequal.
2.Voltages about the symmetry line are equal (e.g., vo1 =vo2)
3.No current crosses the symmetryline.
v
o1 v
o2
Common Modecircuit
idid
v
s1 v
s2
Differential-Mode “HalfCircuit”
Differential Modecircuit
Differential ModeHalf-circuit
1.Currents about the symmetry line are equal in value and opposite insign.
2.Voltages about the symmetry line are equal in value and opposite insign.
3.Voltage at the summery line iszero
v
o1 v
o2
v
s1 v
s 2 0
idid
idid
Constructing “HalfCircuits”
Step1:
Divide ALL elements that crossthe symmetry line (e.g., RL) and/or
are located onthe symmetry line (current source) such that we
have a symmetric circuit (only wires should cross the symmetry
line, nothing should be located on the symmetryline!)
Constructing “Half Circuit”–CommonMode
Step 2: Common ModeHalf-circuit
1.Currents about symmetry line are equal (e.g.,i
d1=i
d2).
2.Voltages about the symmetry line are equal (e.g., v
o1 =v
o2).
3.No current crosses the symmetryline.
v
o1,c v
o2,c
0
Constructing “Half Circuit”–DifferentialMode
Step 3: Differential ModeHalf-Circuit
1.Currents about symmetry line are equal but opposite sign (e.g., id1 = id2)
2.Voltages about the symmetry line are equal but opposite sign (e.g., v
o1 = v
o2)
3.Voltage on the symmetry line iszero.
v
o1,d v
o2,d
“Half-Circuit” works only if the
circuitis symmetric!
Half circuits for common-mode and differential mode aredifferent.
BiascircuitissimilartoHalfcircuitforcommonmode.
Not all difference amplifiers are symmetric. Look at theload
carefully!
Wecanstillusehalfcircuitconceptifthedeviationfromprefect
symmetryissmall(i.e.,ifonetransistorhasRDandtheotherRD
+ RD with RD<<RD).
o However, we need to solve BOTH half-circuits (see slide30)
Why are Differential Amplifierspopular?
They are much less sensitive to noise (CMRR>>1).
Biasing: Relatively easy direct coupling ofstages:
oBiasing resistor (RSS) does not affect the differential gain
(and does not need a by-passcapacitor).
oNo need for precise biasing of the gate inICs
oDC amplifiers (no coupling/bypasscapacitors).
…
Why is a large CMRRuseful?
A major goal in circuit design is to minimize the noise level (orimprove
signal-to-noise ratio). Noise comes from many sources (thermal, EM,…)
A regular amplifier “amplifies” both signal andnoise.
noise
A
d
CMRR
vv
oA
dv
dA
cv
cA
dv
sig
v
1 v
sigv
noise
v
oAv
1Av
sigAv
noise
& v
c v
noise
v
d v
2 v
1 v
sig
However, if the signal is applied between two inputs and we use a
difference amplifier with a large CMRR, the signal is amplified a lot more
than the noise which improves the signal to noiseratio.*
v
10.5v
sigv
noise&v
20.5v
sigv
noise
* Assuming that noise levels are similar to bothinputs.
Comparing a differentialamplifier
two identical CS amplifiers (perfectly
matched)
DifferentialAmplifier Two CSAmplifiers
Comparison of a differential amplifier with two
identical CS amplifiers –DifferentialMode
v
o1,d
v
o2,d
A
d v
od / v
d g
m (r
o ||R
D)
g
m (r
o ||R
D)v
dv
od v
o 2,d v
o1,d
g
m (r
o ||R
D ) (0.5v
d)
g
m (r
o ||R
D ) (0.5v
d)
v
o1,d , v
o2,d , v
od, and differential gain, A
d, areidentical.
Half-Circuits
Identical
Differentialamplifier Two CSamplifiers
Comparison of a differential amplifier with two
identical CS amplifiers –CommonMode
Half-Circuits
NOTIdentical
v
o1,c & v
o2,c aredifferent!But v
oc = 0 and CMMR =.
c
v
ocv
o2,c v
o1,c0
A
cv
oc / v
c 0
v
12g
mR
SSR
D/r
o
g
mR
D
o1,c o2,cvv
v
o1,c v
o 2,c g
m (r
o ||R
D)v
c
v
oc v
o 2,c v
o1,c 0
A
c v
oc / v
c 0
Differentialamplifier Two CSamplifiers
Comparison of a differential amplifier with two
identical CSamplifiers-Summary
0
cd
od
d
v
oc
v
moD cg(r||R) , A
v
v
A
Forperfectlymatchedcircuits,thereisno differencebetween
a differential amplifier and two identical CSamplifiers.
o But one can never make perfectlymatchedcircuits!
CMRR CMRR
0
cd
od
d
v
v
oc
moD cg(r||R) , A
v
v
A
DifferentialAmplifier Two CSAmplifiers
Configurations of DifferentialAmplifier:
•Thedifferentialamplifierinthedifferenceamplifierstageinthe
op-amp, can be used in fourconfigurations.
(i)Dual input, balanced output differentialamplifier
(ii)Dual input, unbalanced output differentialamplifier
(iii)Single input, balanced output differentialamplifier
(iv)Single input, unbalanced output differentialamplifier
Out of these four configurations, the dual input, balanced output is the
basic differential amplifierconfiguration.
9
Dual input balancedoutput
differentialamplifier
Dual input unbalancedoutput
differentialamplifier
Single input balancedoutput
differentialamplifier
Single input unbalancedoutput
differentialamplifier
What is a currentmirror?
It is a circuit that outputs a constant current that is equal to
another current called “referencecurrent”.
I_ref
I_out
Figure 1: Current mirror basiccircuit
Q1 along with the series
resistance determines the
reference current.
While Q2 is responsible of
delivering the output current or
mirrored current to theload.
IC
IRef
IB1IB2
IOutput
Collector current
is given by this
equation:
??????�= ??????∗??????�
Since the two
transistors are
identical:
????????????��= ??????�+ 2??????�
Thus makes the
output current:
??????Output= ??????�
Since base current is
small compared to
collector current, we
canassume:
??????Output
≈??????Ref
Q1 Q2
R1
DC DC
R2
GND1
GATE Questions with Solutions
Given circuit is
current mirror
circuit is equally
divided , Ibias= Ix
Choice : B
Choice : B
If the resistance
Re increases
,then the CMRR
gain improved
because
common mode
gain is small
5.Thecircuitshowninthefigureusesmatchedtransistorswithathermal
voltageV
T=25mV.Thebasecurrentsofthetransistorsarenegligible.The
valueoftheresistanceRinkΩthatisrequiredtoprovide1μAbiascurrent
forthedifferentialamplifierblockshownis___.(Givetheansweruptoone
decimalplace.)
Given that, I
cl= 1 mA, I
c2= 1 μA
V
T= 25 mV
I
B1= I
B2= 0
R =
??????
??????
I
c2
ln(
I
c1
I
c2
)
=
25×16
3
10
−6ln(
10
−3
10
−6)
=
25
10
−3ln(1000) = 172.7kΩ
54.The current mirror of figure is designed to provide ??????
??????= 0.5 mA. ??????
????????????= 10 V, ??????=
125. The value of R is ____ kΩ
Output currentI
C=0.5mA
Therefore base currentI
B=
I
C
β
=
0.5mA
125
= 4μA
Now the current through resistor R is.
I
R= I
C+ I
B=0.5mA+8μA=0.508mA
V
BE
≃0.7V
Therefore voltage drop across R is10V–0.7V=9.3V
∴R =
9.3
0.508
= 18.307kΩ
37.Twoperfectlymatchedsilicontransistorareconnectedasshowninthe
figure.Assumingtheβofthetransistortobeveryhighandforwardvoltage
droptobe0.7V,V
BE=0.7,thevalueofcurrentIis
1. 0 mA 2. 3.6 mA 3. 4.3 mA 4. 5.7 mA
This is a current mirror circuit, since β is very large,
??????
C
1
= ??????
C
2
= ??????
C
= ??????
E
1
= ??????
E
2
= ??????
E
and??????
B
1
=
??????
B
2
= ??????
B
= 0
Apply KVL through Q1 from -5V to ground.
Ix1K + 0.7 + 0.7 = 5
∴D is forward biased.
Current passing through diode is
I =
3.6
1k
= 3.6mA