Bipolar Junction Transistor Biasing [Types]

BJT Biasing

1. BIASING BIPOLAR JUNCTION TRANSISTOR To use a transistor for amplification of voltage and current signals, it is necessary first to bias the device. Biasing is the application of dc voltages to establish a fixed level of current and voltage. The reason for biasing is to turn the device on, and in particular to place it in operation in the region of its characteristics where the device operates most linearly. The dc biasing is a static operation since it deals with settings a fixed (or steady) level of current flow through the device with a desired voltage drop across the device. Since the aim of biasing is to achieve a certain condition of current and voltage usually called the operating point or quiescent point (Q-point), some attention is given to the selection of the point in the transistor characteristics.

2. Biasing Common-Emitter Circuits Common emitter amplifier connection is more popular than the CB type. In CE connection, only one supply voltage is usually used as against two in CB. The input signal is applied to the base of the transistor with the emitter as common terminal. Common biasing circuits for CE are discussed below. 1.Fixed Bias Circuit The fixed bias circuit shown in the figure below is the simplest transistor dc bias configuration.

3. Under quiescent (no signal) condition, both and act as open circuits. These coupling (blocking) capacitors block dc voltages but freely pass the signal (ac) voltages. In this way the capacitors prevent the dc of a stage from affecting the bias of another stage.   Applying KVL to the input loop, 1 Assuming the reverse saturation current, is negligible, 2 where is the transistor CE dc current gain.   Applying KVL to the output loop, 3  

4. Dc Load Line The actual operating point of a transistor can be obtained by superimposing the characteristics of the BJT on a plot of the network equation defined by the same axis parameters. The straight line obtained from the plot of the network equation is called the Load Line. For fixed bias configuration, the load resistor defines the slope of the slope of the load line and the resulting intersection between the two plots. The smaller the load resistance, the steeper is the slope of the network load line.  

5. To plot the load line, equation 3 is employed. From the equation, two extreme points can be obtained: These two points are marked on the collector characteristics and the straight line connecting the two points is the dc load line. By solving for the resulting level of as determined by the value of , the actual Q point can be established as shown in the Figure below.  

6. For small signal amplifier with output peak to peak voltage of less that 1V, the exact centering of the Q-point is not essential. It is usual to seek a region of largest transistor gain or a region of most linear operation. For a large signal amplifier with peak-to-peak output voltage near the supply voltage value would require a centered operating point. Assuming the Q-point is located as shown in Figure (a) above. Base current in excess of 35µA or 25 µA will drive the transistor into saturation or cut off, respectively. The input current can go positive only by about 35µA before saturation occurs and can go negative by or 25 µA before cut-off is reached. Output signal as illustrated in Fig. 2.2 (b). An input that is not too large will produce undistorted output signal. If the input is too large, there is distortion in the output signal as illustrated.

7. =22.5V 5kΩ Example 1 A transistor, used in the simple fixed bias amplifier circuit shown in Figure 1 has the output characteristics which are linear between the points shown in Table 1 I B (µA) Ic (mA) V CE =2.5V V CE =20V 10 1.00 1.10 30 2.45 2.75 50 3.85 4.25

8. Draw the output characteristics of the transistor If the base current at Q-point is 30µA, draw the load line and determine the quiescent value of the collector voltage and current. Hence, determine the quiescent power dissipation of the transistor. If the signal to be amplified causes the base current to vary sinusoidally by ±20µA about the quiescent value, determine The peak-to-peak change in the collector current The rms value of the ac component of the collector current. The peak-to-peak value of the collector voltage.

9. Solution: (b) Horizontal intercept = 22.5V Vertical intercept = From the curve, (c) An increase of 20µA above I BQ (i.e. 50µA) results in A decrease of 20µA below I BQ (i.e. 10µA) results in  

10. Peak to peak change in collector current, Since it is sinusoidal, the rms value of the collector current is given by: Rms value = Peak to peak change in collector voltage =V CE1 -V CE2 =13.1V   Example 2 Determine the Q-point for the fixed bias circuit shown in Figure 2 assuming a silicon transistor with .  

11. Solution  

12. Stability of Operating Point Though the fixed bias circuit provides suitable gain as an amplifier, it has difficulty maintaining bias stability. In any amplifier circuit, will vary with change in temperature because of the three following factors: 1. (reverse saturation current) which doubles for every 10⁰ C rise in temperature. 2. which decreases by about 2.5mV/degree C. 3.Transistor current gain β ( h FE ) which increases with temperature. Actually, β also vary from transistor to transistor even of the same type.  

13. Any of these factors may cause the bias point to shift from its original value. Stability Factor (S) is a numerical quantity representing the amount of the collector current change due to changes in each of the parameters because of temperature. and  

14. For the fixed bias circuit, But  

15. The total effect of the three parameters on the collector current is given by: The effect of change in is negligible if . Also, has the effect of increasing the base bias voltage because it creates a voltage drop across with a polarity that adds to the base bias voltage. In modern transistors, is extremely small (of the order of nanoampere) and its effect is negligible. Therefore, out of the three parameters affecting bias stability, the change due to variation is the greatest.   The change in needs not be only due to temperature. For example, the same-numbered transistors may have for one device and for another. In addition, the value of for specific transistors will be different at different values of bias current. The design of a good bias-stabilized circuit usually concentrates mostly on stabilizing the effect of changes in transistor .  

16. Emitter Bias Circuit The addition of an emitter resistor to the fixed bias circuit discussed earlier as shown in the Figure below leads to an improved stability in the operating point.

17. Applying KVL to the base-emitter loop of the network, 1 Neglecting , 2 Substituting Eq. 2 into Eq. 1 gives From which we obtain  

18. The presence of in the denominator of Eq. 3 makes less dependent of when compared with fixed bias circuit. Applying KVL to the collector-emitter loop of the network, Assuming , 4 The load line for this circuit is drawn using two points  

19. Example 1 a( i ) Determine the operating point of the fixed bias circuit in the Figure below (ii) Repeat a( i ) above with β=100 and find the % change in the operating point due to change in β . b. Insert an emitter resistor, R E =1k Ω and repeat the procedure in (a) above. Compare the results in (a) and (b) above.

20. Solution: ( i ) With , applying KVL to the input loop gives: Applying KVL to the output loop gives: With ,  % change in % change in  

21. b. With , applying KVL to the input loop gives:     Applying KVL to the output loop gives:   With ,      

22. % change in % change in c. The change in due to change in the value of for the fixed bias circuit is 100% while it is 69% in emitter bias circuit. The changes in for both the fixed bias and emitter bias circuits are almost the same, having a value of 76% and 75%.  

23. Stability Factors of Emitter Bias Circuit   2 Substituting equation 1 into 2,  

25. Assuming I CO is considered negligible,   Assuming that due to a change in temperature the value of β changes from its original value to a new value , then also changes from its initial value of to . The stability factor, is given by:  

27. Dividing both the numerator and denominator by R E ,  

28. Voltage-Divider Bias Circuit Since β is temperature-sensitive and its actual value is not well-defined, it would be desirable to develop a bias circuit that is less dependent or independent of transistor β . Voltage-divider bias network is a very example of such circuits. With proper choice of circuit parameters, the circuit can be made almost independent of β . Figure 2.4 illustrates a voltage-divider bias circuit.

29. To analyze the circuit, we first obtain an equivalent base-emitter circuit for Figure above using the Thevenin ’ s Theorem. Looking out from the base terminal as shown in Figures (a) and (b), we have R B =R Th = V B = E Th = 2  

30.   Applying KVL to the base-emitter loop of the network, Substituting ,   The original circuit can then be replaced with the Thevenin’s equivalent shown below.

31. Unlike in emitter bias circuit, , making almost independent of . Applying KVL to the collector-emitter loop of the network, 4 The load line for this circuit is drawn using .   Approximate Analysis If the condition is satisfied, approximate approach can be employed in the analysis of voltage divider bias network. In this approach, is assumed negligible such that and Applying KVL to the collector-emitter loop of the network,  

32. Example1 Determine the dc bias voltage and current for the voltage divider bias network if and .  Solution:    

33. Example 2 Repeat example 1 above with β=200 and calculate the % change in the values of I C and V C E . Solution : V B =2V R B =3.55kΩ Percentage change in I C =1.43% Percentage change in V CE =0.81%