Internal checks START
‘on memory, speed,
and operation.
Service any | HOUSE:
communication | KEEPING
requests.
PROGRAM
SCAN
OUTPUT
The output image
date is transferred
to the external output
circuits, turning the
output device
ON or OFF.
@ PO
The status of
external inputs
is written to the
input image table
(file or register)
malo
Each ladder rung
is scanned and solved
using the date in the
input file, The resulting
logic is written to the
output image table
(file or register)
INPUT
SCAN
3.1. Program Scan
= The time it takes to complete a scan cycle is a measure of how fast the
controller can react to changes in inputs.
= Ifa controller must react to an input
signal that changes states twice during
the scan time, it is possible that the PLC
will never be able to detect this change.
= The scan time is a function of:
The speed of the processor module
The length of the ladder program
The type of instructions executed
The actual ladder true/false conditions
3.1. Program Scan
Input Input Output | Output
Input _ ata image image | data Output
modules table table modules
file file
Examine Return
data result
| Program |
—
ED I 5
Check/compare/examine
specific conditions
Take some action
3.1. Program Scan
Input Output
instructions instructions
1 A si PL 12
DOS 51 Jr «À = PLA
Rung-in Rung-out
condition condition
GO s2 1k Op
s2
PL2
3.1. Program Scan
Processor memory
Input
module
Input EN
device
13/6
Field-device
power supply
Data
Input Output
image image
table table
file file
> 13/6 a
4 J e... eee
4 ose ee em 4 . .... . ef
Horizontal scanning order LA A Zu Zu,
Vertical scanning order
LC Programming Languages
3.2. PLC Programming Language
PLC programming languages
y y
Textural language Graphical language
Y y Y Y Y
Instruction Structured Ladder Functional Sequential
list text diagram block diagram function chart
Standard IEC 61131 languages associated with PLC programming
3.2. PLC Programming Language
PLC language a
(CRT (CR2) soL
B D Y
E
us)
Hardwired relay control circuit Equivalent ladder diagram program
3.2. PLC Programming Languages
Functional block diagram
Functional block
Ladder logic diagram equivalent
A B AND_BOOL
IE ER O MA È
BD
A
] À OR_BOOL
a re
ji BD
a 8 AND_BOOL
Jete e —
arg
3.2. PLC Programming Language
Caution
PLA
| ES | BAND_ot
| ni |
BAND
Boolean And
Ladder diagram
Sensor 2°. - 2] int
Sensor 32°. cl In2
Equivalent function block diagram
3.2. PLC Programming Language
Sequential function chart (SFC)
lan
like a
Wire
loop
The program is split into steps with
multiple operations happening in
parallel branches.
Initial
Step
Action
Wire
Step 2
Transition
Action
Transition
step 3
Action
Transition
Stop
3.2. PLC Programming Language
7 CRI Ra SOL
—_— He O—
ist
ee
Hardwired relay control circuit
START PB1
AND RI
OR st
AND NOT CR2
OUT SOL
Equivalent instruction
list program
3.2. PLC Programming Language
Sensor 1 Sensor 2 soL
IL iL
dC dt
‘Sensor3 Sensor4 ‘Sensor 5
Ladder diagram
IF Sensor_1 AND Sensor_2 THEN
SOL_1:=1;
ELSEIF Sensor_3 AND Sensor_4 AND NOT Sensor_5 THEN
Equivalent structured text program
Relay Type Instructions
3.3. Relay Type Instructions
A
Representations of contacts and coils are the
basic symbols of the logic ladder diagram
instruction set.
3.3. Relay Type Instructions
arme Open Contact i
Associated with each Normally
Open Contact instruction is a
memory bit linked to the status
of an input device or an internal
logical condition in a rung.
3.3. Relay Type Instructions
A 1 corresponds to a true status or on condition.
Bit_ is 1413121109 8 7 6 5 4 3 2 1 0
number
[ 1 FF Status
11/4
Instruction interpreted
as true
1/4
CESSES
If the instruction memory bit is a 1 (true) this instruction will
allow rung continuity through itself, like a closed relay contact.
3.3. Relay Type Instructions
A 0 corresponds to a false status or off condition.
15 14 13 12 # 10 9 876543210
0
Eva
E
Instruction interpreted
as false
o——_—_}
EV4
T
ÉCOLOS
If the instruction memory bit is a 0 (false) this instruction will
not allow rung continuity through itself and will assume a
normally open state, just like an open relay contact.
e Normally Closed Contact inst Symbol
tes normally dre
dt. - _ This instruction asks the PLC’s processor to
o 3 >| 1) examine if the contact is open.
| It does this by examining the bit at the memory
“ | 110) location specified by the address for a 0 or 1.
3.3. Relay Type Instructions
As with any other input the memory bit is set to 1 or 0 depending on the status of the input.
A 1 corresponds to a true status or on condition.
Bit
number 5141312 1109876543210
4 [ Status
E 11/4
a)
2
[1
a Instruction interpreted
lia as false
11/4 jal
The instruction is interpreted as false when the bit is 1
and will not allow rung continuity through itself.
3.3. Relay Type Instructions
AO corresponds to a off condition.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 O
o.
17a
ia
|
L E
| Instruction interpreted
72,9 3 as true
Eva e]
e)
The instruction is interpreted as true when the bit is
0 and will not allow rung continuity through itself.
3.3. Relay Type Instructions
Variable Wal Variable Va] Data Type [Memory Ai ital Vatu Variable Ki[ Used | Comments
ne la
aaa eee =
= =
| ]
| m
Row 2 er
3
| H
cub ¿
¿
| -
¿
A :
¿
¿
20 Allan loa
ms | “LEE em Ce a
3.3. Relay Type Instructions
Symbol
— >— Output energize
This instruction signals the PLC to energize (switch on)
or de-energize (switch off ) the output.
The instruction is associated with a memory bit that energizes the output
when set to 1 and de-energizes the output when reset to 0.
3.3. Relay Type Instructions
Coil instruction is set to 1 to output 43 12 11 10 9 8 7 6
energize the output. — de
Program
1
a y
A true logic path is established by
the input instructions in the rung.
Input
module
3.3. Relay Type Instructions
r ed Coil
[Variable Na] Variable Valu] Data Type [Memory All initial Value] Variable Ki] Used [Comments
1 0 BOOL__IX0.0.0 VAR
2 [swe 0 BOOL 7861%0.01 VAR
EL 0 BOL | 40X020 VAR
3.3. Relay Type Instructions
Bit
status
Ladder logic program
FALSE
[Core
>[o
A signal present makes the
NO bit (1) true; a signal
absent makes the NO bit
(0) false. The reverse is
true for an NC bit.
Lia]
Ladder logic program
TRUE
A OUTPUT
où )—|
à
Ÿ—Corr)-
FALSE
Button actuated
3.3. Relay Type Instructions
Variable Na] Variable Val Data Type | Memory Al] intial Value] Variable Ki] Used | Comments]
=
ao II ry
Row [mar MS == =. == =
=
|| 5 :
Each contact or coil symbol is referenced with an address that identifies what is being
evaluated and what is being controlled.
Inputs Outputs
The same contact instruction can
be used throughout the program 1 i
whenever that condition needs to L >
be evaluated. Rong?) oy
Not place the same addressed Coil
instruction on multiple rungs within v2 va or
the same program. Rung 1 Y ] [ O
3.3. Relay Type Instructions
Rung O —} F T ï | iO) |
A complete closed path is referred |
to as having logical continuity. — Rung! 7 @) |
When logical continuity exists => Rung2—| F y Tr | o.
in at least one path, the rung |
condition and Coil instruction LE 07
are said to be true.
3.3. Relay Type Instructions
Py E 7
are 27]
… E =
DE >
al E N
Arq Ey
eorcacorecones
E
Input Instructions Output instruction The logic states (0 or 1) indicate whether an
NO, Ne a instruction is true or false and is the basis of
) ( 4 controller operation.
The status of the instruction is
Ifthe ar table bit | \ormally Open Contact | Normally Closed Contact Coil
Logic O False True False
Logic 1 True False False
Input instructions
LE u
Output instruction
Coil
The time aspect relates to the repeated scans
of the program, wherein the input table is
updated with the most current status bits.
Instruction outcome Input bit status
Time NO NC Coil NO NC Coil
# (initial) False True False o 0 o
ta True False Goes false 1 1 o
ta False False Remains false o 1 o
3.4. Branch Instructions
The rung will be true |
if either instruction A >
1
]
or Bis true.
3.4. Branch Instructions
on of
JE
Either A and not B, or C provides logical continuity and energizes output D.
3.4. Branch Instructions
3.4. Branch Instructions
Output branching a
path tc
Either A or B provides a true logical path to | ( )
all three output instructions: C, D, and E. D |
| LH
€
\
PA
E Additional input instructions can be
WH programmed in the output branches.
3.4. Branch Instructions
to all three
3.4. Branch Instructions
nested to avoid re
me.
| ] ] If CY |
| ] dL ai \, |
] ] LY
dt | \/
Anested branch starts or e
ends within another branch. | [E IL
3.4. Branch Instructions
In some PLC models, the A 8 (e Y
programming of a nested - F E EX
branch be done 5
directly. MN
~~ A branch within
E a branch
It is possible, however, tr 8 (93 A
to program a E (
branching D a
condition. Bd
> Contact
instruction C
E
repeated
3.4. Branch Instructions
« Maximum 10 contacts >
HAHAHAHAHA KH HE O
HHAHAHHHAHHHHHHHHH
{HEHEHE HEHEHE
HAHAHAHHHAHHHHHHHHH
Maximum 7 |
parallel lines.
Aie oi
Lo Co LL LL Lo
3.4. Branch Instructions
A D Y
The PLC will not allow for programming | ( >
of vertical contacts. => Fa 2
If programmed as shown, contact
combination would be
F
A 8 € y 1,
EE |
Boolean equation: Y = (ABC) + (ADE) + (FE) + (FDBC)
A D E
eLo
circuit,
F D 8 €
Internal Relay Instructions
3.5. Internal Relay Instructions
MW0.0
The advantage of using internal outputs is that there are many situations in
which an output instruction is required in a program but no physical connection
to a field device is needed.
3.5. Internal Relay Insti
Internal relay
t n
es more series contacts than
Discrete inputs
1 2@ 83 10.0
4 5 6 7 «uw
This PLC allows for only Rung 1 HO
7 series contacts when pee! |
12 are required for the |
Discrete inputs call
Programmed logic. “wos 9 10 M 12
ro AAA O
Internal Discrete
relay output
3.5. Internal Relay Instruction
[Variable Val Data Type | Memory Au] (£2
BOOL_ 5410.00
BOL 1%000.1
BOOL |#00.0.10
‘BOL /%400.0.11
-
12 0 BOOL 2.
E = SERIE
he Pump (M) is started b
pped when Stop button is p
n the Selector switch (Manual/Auto) is i
the Solenoid valve (SV)