Data Hazard and Solution for Data Hazard

Here i explain the concept of Data Hazard and Solution for Data Hazard

1. In the name of Allah who is most beneficial and most merciful

2. Rules You can ask question after completion of topics . Your questions should be according to topic. Any misbehave during presentation would lead you to some serious actions like asked to leave the class room.

3. Topic Outline What is Pipelining? Types of Pipelining. What is D ata Hazard? Types of Data Hazard. Solutions for Data Hazards.

4. Pipelining A technique used in advanced microprocessors where the microprocessor begins executing a second instruction before the first has been completed. That is, several instructions are in the pipeline simultaneously, each at a different processing stage.

5. Types of Pipelining CONTROL HAZARD DATA HAZARD STRUCTURE HAZARD Pipelining

6. A situation that prevent the starting next instruction in the next cycle They reduce speedup of pipeline execution Hazards can always be resolved by waiting HAZARD

7. A ttempt to use item before it is ready Instruction depends on result of prior instruction still in the pipeline DATA HAZARD @ @

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9. Types of Data Hazard RAW WAR WAW DATA HAZARD

10. RAW(Read After Write) It is also known as TRUE DEPENDENCY . An instruction modifies a register or memory location Succeeding instruction reads data in that location Hazard if read takes place before write complete

11. Write After Read (RAW) It is also known as Anti dependency An instruction reads a register or memory location Succeeding instruction writes to location Hazard if write completes before read takes place

12. Write After Write (RAW) Two instructions both write to same location Hazard if writes take place in reverse of order intended sequence

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14. Problem with Data Hazard Problem

15. All the instructions after the ADD use the result of the ADD instruction (in R1). The ADD instruction writes the value of R1 in the WB stage . SUB instruction reads the value during ID stage ( IDsub ). This problem is called a data hazard

16. Two instruction with add and Sub using three register $ sO (in addition) and $t2(in subtraction) =Destination Register $ tO , $t1 and $t3 are Read /Write Register While $ sO is read/write register in Subtraction instruction Data hazard occur at this stage

17. Solution of Data Hazard Solution

18. Data Hazards – Forwarding Key idea: connect new value directly to next stage Still read s0, but ignore in favor of new result

19. Forwarding-Data Hazard A instruction goes into four state Let two instruction Add $ sO , $ tO , $t1 Sub $t2, $ sO ,$t3 How to avoid data hazard? $ sO register If we use this path as shown by arrow then we left the $ sO register for instruction SUB

20. Solution Usually solved by data or register forwarding (bypassing or short-circuiting). This is based on the fact that the data selected is not really used in ID but in the next stage: ALU. Forwarding works as follows: ALU result from EX/MEM buffer is always fed back to the ALU input keys. If the forwarding hardware detects that its source operand has a new value, the logic selects the newer result rather than the value read from the register file.

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