From Silicon to Chip: Mastering the Fabrication Processes of Monolithic Integrated Circuits (ICs)

his in-depth technical lecture, authored by Dr. G.S. Virdi, Former Chief Scientist at the CSIR-Central Electronics Engineering Research Institute, is designed for engineering students seeking a complete understanding of Integrated Circuit (IC) fabrication.

Key Topics Covered:
This presentation details the definition, evolution, and 9 basic processes involved in fabricating Monolithic ICs:




Silicon Wafer (Substrate) Preparation: The foundational steps from crystal growth and doping to slicing, polishing, and cleaning.




Epitaxial Growth: Depositing a mono-crystalline film (epitaxial layer) on a substrate.



Oxidation: Forming a protective layer of Silicon Dioxide (SiO
2
​
) using high temperatures to guard against contamination and for use in selective diffusion.


Photolithography: The core process for pattern creation on the wafer. Steps include spin coating with photoresist, mask alignment, exposure (contact, proximity, projection), development, and etching.





Diffusion: Introducing impurities into selected regions of the wafer, such as Boron and Phosphorus, to create different semiconductor types.



Ion Implantation: A low-temperature process to alter the electrical properties of the target by accelerating ions into the solid wafer.



Isolation Technique: Methods like Dielectric Isolation to electrically and physically separate components on the chip.



Metallization: Applying a thin layer of metal (typically Aluminum) via vapor deposition to create conductive pathways and contacts for interconnections.




Assembly Processing & Packaging: Final steps to prepare the chip for use.

Additional Concepts:

IC Advantages: Review the benefits of ICs, including miniaturization, cost reduction (due to batch processing), increased reliability, and higher operating speeds.




IC Evolution: The historical progression of chip density from SSI (Small-Scale Integration) to VLSI (Very Large-Scale Integration).



IC Technologies: An overview of technology types, including Bipolar (TTL, ECL) and MOS (nMOS, pMOS, CMOS).



This presentation is a critical resource for Electrical, Electronics, and Microelectronics engineering students.

1. 1
IC FABRICATION
Dr.G.S.Virdi
Former Chief Scientist
CSIR-Central Electronics Engineering Research
Institute
Pilani-333031 India

2. 2
Anintegratedcircuit(IC)isaminiature,low
costelectroniccircuitconsistingofactiveand
passivecomponentsfabricatedtogetherona
singlecrystalofsilicon.Theactivecomponentsare
transistorsanddiodesandpassivecomponentsare
resistorsandcapacitors.
INTEGRATED CIRCUITS
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Advantages of integrated circuits
1.Miniaturization and hence increased
equipment density.
2.Cost reduction due to batch processing.
3.Increased system reliability due to the
elimination of soldered joints.
4.Improved functional performance.
5.Matched devices.
6.Increased operating speeds.
7.Reduction in power consumption
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Basic processes involved in fabricating
Monolithic ICs
1. Silicon wafer (substrate) preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5.Diffusion
6.Ion implantation
7.Isolation technique
8.Metallization
9.Assembly processing & packaging
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5. An integrated circuits (IC) sometimes called a chip or
microchip is a semiconductor wafer on which thousands or
millions of tiny resistor, capacitors and transistors are
fabricated.
An IC can function as an oscillator ,amplifier, timers,
Computer memory or microprocessor.
An IC is categorized as either linear(analog) or
discrete(digital)
Depending on its intended applications.
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What is IC ?

6. Why the Integrated circuit ?
•Integration improves
–size
–speed
–power
•Integration reduce manufacturing costs
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7. History
•TheintegratedcircuitorICwasputforthby
JackKilbyatTexasInstruments
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8. EVALUATION of IC’S
•SSI –Small Scale Integration( 1960)(10-100)
contained 1 –10 -------logic gates
•MSI –Medium Scale Integration (1970 )(100-1000)
logic functions, counters
•LSI –Large Scale Integration ( 1980 )(1000-10000)
first microprocessors on the chip
•VLSI –Very Large Scale Integration (1995) (10000-
1000000)
–64-bit microprocessors,
complete with cache memory
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9. Power Dissipation
P6
Pentium ® proc
486
386
286
8086
8085
8080
8008
4004
0.1
1
10
100
197119741978198519922000
Year
Power (Watts)
Lead Microprocessors power continues to increase
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10. IC -Technologies
•Bipolar technology
•MOS (Metal-oxide-silicon)
–TTL (transistor-transistor
logic)
–ECL ()
–nMOS (n-channel MOS)
–pMOS (p-channel
MOS)
–CMOS
•Bi CMOS technology
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11. •GaAs -Gallium Arsenide (for high speed)
•Si-Ge -Silicon Germanium (for RF)
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Basic processes involved in fabricating
Monolithic ICs
1. Silicon wafer (substrate) preparation
2. Epitaxial growth
3. Oxidation
4. Photolithography
5.Diffusion
6.Ion implantation
7.Isolation technique
8.Metallization
9.Assembly processing & packaging
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Wafer production

14. Wafer production
The first step is wafer production.
•The wafer is round slice of semiconductor material such as silicon. Silicon is
preferred due to its characteristics.it is more suitable for manufacturing IC.
•It is base or substrate to entire chip.
•First purified polycrystalline silicon is created from the sand. Then it is heated to
produce molten liquid.
•A small piece of solid silicon is dipped on the molten liquid.
•Then the solid silicon (seed) is slowly pulled from the melt. The liquid cools to
form single crystal ingot.
•A thin round wafer of silicon is cut using wafer slicer. Wafer slicer is a precise
cutting machine and each
slice having thickness about 0.01 to 0.025inches.
•When wafer is sliced, the surface will be damaged. It can be smoothening by
polishing.After polishing the wafer, it must thoroughly clean and dried.
•The wafers are cleaned using high purity low particle chemicals .The silicon
wafers are exposed to ultra pure oxygen.
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Silicon wafer (substrate) preparation
1.Crystalgrowth&doping
2.Ingottrimming&grinding
3.Ingotslicing
4.Waferpolicing&etching
5.Wafercleaning
Typical wafer
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Silicon wafer (substrate) preparation
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Silicon wafer (substrate) preparation

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Silicon wafer (substrate) preparation

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Epitaxial growth
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1.Epitaxyrefers to the method of depositing a mono-crystalline film
on a mono-crystalline substrate. The deposited film is denoted as
epitaxial film or epitaxial layer.
2.The term epitaxycomes from the Greek roots, Epimeans “above”
and taxismeans “deposition in ordered manner”.
3.Epitaxial films may be grown from gaseous or liquid precursors.
4.The substrate acts as a seed crystal, the deposited film takes on a
lattice structure and orientation identical to those of the substrate.
Epitaxial growth

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Advantages
VPE provides a very controlled method to produce a film to an atomically
specified thickness. Also, the growth of different multilayer structures is
straightforward. Due to the sensitivity and precision of the equipment, it is
very beneficial to those in the field of microelectronics and
nanotechnology in producing small, but efficient semiconductors.
Disadvantages
High purity of the substrates is very important, and as such, high costs
will ensue. Once the layer has been made and the process is complete,
there may be a requirement of needing to remove excess precursors from
the final product.
Epitaxial growth

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The solid source material sublimates.
They provide angular distribution of atoms or molecules in
beam.
The substrate is heated to the necessary temperature.
The gaseous elements then condense on the wafer where they
may react with each other to form a layer.
Atoms on clean surface are free to move until finding correct
position in the crystal lattice to bond.
Epitaxial growth
PROCESS

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1.Epitaxymeans growing a single crystal silicon structure
upon an original silicon substrate, so that the resulting layer is
an extension of the substrate crystal structure.
2.The basic chemical reaction in the epitaxial growth process of
pure silicon is the hydrogen reduction of silicon
tetrachloride
Epitaxial growth

24. It means the growing of single silicon crystal upon
original silicon substrate.
A uniform layer of silicon dioxide is formed on the
surface of wafer.
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Epitaxial growth

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Etching
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27. Etching
•Selectively removing unwanted material from the surface
of the wafer.
•The pattern of the photo-resist is transferred to the wafer
by means of etching agents.
•The parts of material are protected by this etching mask.
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Oxidation
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Oxidation
SiO
2isanextremelyhardprotectivecoating&is
unaffectedbyalmostallreagentsexceptby
hydrochloricacid.Thusitstandsagainstany
contamination.
ByselectiveetchingofSiO
2,diffusionof
impuritiesthroughcarefullydefinedthrough
windowsintheSiO
2canbeaccomplishedto
fabricatevariouscomponents.
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OxidationFurnace
BoronPredeposition
BoronDrive-in
PhosphorusPredeposition
PhosphorusDrive-in
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Oxidation
Thesiliconwafersarestackedupinaquartzboat&
theninsertedintoquartzfurnacetube.TheSi
wafersareraisedtoahightemperatureintherange
of950to1150
o
C&atthesametime,exposedtoa
gascontainingO
2orH
2Oorboth.Thechemical
actionis
Si+2HO----------->SiO
2+2H2
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Oxidation

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Oxidation

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Oxidation Furnace

35. Masking
•To protect some area of wafer when working on another
area, a process calledphotolithographyis used.
•The process of photolithography includes masking with a
photographic mask and photo etching.
•A photoresist film is applied on the wafer.
•The wafer is aligned to a mask using photo aligner.
•Then it is exposed to ultraviolet light through mask.
•Before that the wafer must be aligned with the mask.
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PHOTOLITHOGRAPHY

37. LITHOGRAPHY
LithographycomesfromtheGreekword“lithos”whichmeans
stones,and“graphia”,meaningtowrite.Itmeansquite
literallywritingonstones.
Theprocessofproducingpatternsonsemiconductorcrystals
foruseasintegratedcircuits.
Insemiconductorlithographyiscalledasphotolithography.
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38. Photo-litho-graphycan be light-silicon wafer-
printing.
Photolithography is a printing method in which light
plays an essential role.
It can produce very small patterns which may be
down to few tens of nanometers in size.
It provides precise control of the shape and size of
the objects.
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39. surface cleaning
Spin coating with photoresist
Soft baking
Alignment of mask
Exposure
Development
Hard baking
Plasma etch –or add layer
Post process cleaning
Final inspection
STEPS INVOLED INPHOTOLITHOGRAPHY
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40. PHOTOLITHOGRAPHY
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41. STEP 1: SURFACE CLEANING
Organic or inorganic contaminations may present on the wafer
surface can be cleaned using a solution containing hydrogen
peroxide.
Solutions containing trichloroethylene, acetone or methanol
can also be used.
Contaminants may be photoresist residue from previous
photolithography, atmospheric dust, bacteria, films from other
sources etc.
PHOTOLITHOGRAPHY
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42. STEP: 2 SPIN COATING WITH PHOTORESIST
Spin coating is a process of depositing uniform thin films onto
flat substrates.
It is intensively used in photolithography to deposit layers of
photoresist about 1 micrometer thick.
An amount of coating material is applied on the center of the
substrate, which is either spinning at low speed.
PHOTOLITHOGRAPHY
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43. STEP: 3SOFT BAKING
•The purpose of this is to clean the wafer by
removing excess solvents.
•Typical soft-bake temperature is around 90°C
for ten to twenty minutes.
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PHOTOLITHOGRAPHY

44. STEP 4:ALIGNMENT OF MASK
One of the most important steps in the photolithography
process is mask alignment.
The mask is aligned with the wafer, so that the pattern
can be transferred onto the wafer surface. Each mask
after the first one must be aligned to the previous
pattern.
Once the mask has been accurately aligned with the
pattern on the wafer's surface, the photoresist is
exposed through the pattern on the mask with a high-
intensity ultraviolet light.
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PHOTOLITHOGRAPHY

45. STEP 5:EXPOSURE
Three primary exposure methods are:
Contact
Proximity
Projection
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PHOTOLITHOGRAPHY

46. STEP 6 & 7:
Development:
The non-exposed areas of the photoresist are
removed by developing the wafer in an acid or base
solution. This is followed by a rinse to stop further
development and remove any residual chemicals.
Hard Baking:
This step removes unwanted particles and enhances
adhesion of the resist to the wafer. It also hardens
the resist, especially along the newly created edges
of the resist film.
The baking temperature is higher than that used in
soft baking.
DEVELOPMENT AND HARD BAKING
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PHOTOLITHOGRAPHY

47. Plasma etching is a type of plasma processing widely
used in the fabrication of integrated circuits.
In this process, plasma generates volatile etch products
at room temperature through chemical reactions
between reactive species and the wafer surface.
It allows selective removal of the upper layerof the
wafer through the openings in the photoresist.
STEP 8: PLASMA ETCHING / ADD LAYER
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PHOTOLITHOGRAPHY

48. contact printing, the resist-coated silicon wafer is brought into physical
contact with the glass photomask. The wafer is held on a vacuum chuck,
and the whole assembly rises until the wafer and mask contact each
other. The photoresist is exposed while the wafer is held in contact
position with the mask. Very high resolution is possible but there is a
high risk of mask damage
.
Proximity Printing exposure method is similar to contact printing except
that a small gap, 10 to 25 microns wide, is maintained between the
wafer and the mask during exposure. This proximity minimizes mask
damage. Approximately 2-to 4-micron resolution is possible with
proximity printing.
Projection Printing avoids mask damage entirely. An image of the
patterns on the mask is projected onto the resist-coated wafer, which is
many centimeters away. In order to achieve high resolution, only a small
portion of the mask is imaged. This small image field is scanned or
stepped over the surface of the wafer.

49. In contact printing, the resist-coated silicon wafer is brought into physical
contact with the glass photomask. The wafer is held on a vacuum chuck,
and the whole assembly rises until the wafer and mask contact each other.
The photoresist is exposed while the wafer is in contact position with the
mask. Very high resolution is possible but at the expense of mask damage.
Proximity Printing exposure method is similar to contact printing except that
a small gap, 10 to 25 microns wide, is maintained between the wafer and
the mask during exposure. This proximity printing mask damage.
Approximately 2-to 4-micron resolution is possible.
Projection Printing avoids mask damage entirely. An image of the patterns
on the mask is projected onto the resist-coated wafer, which is many
centimeters away. In order to achieve high resolution, only a small portion
of the mask is imaged. This small image field is scanned or stepped over
the surface of the wafer.
Printing Methods
PHOTOLITHOGRAPHY

50. STEP:9 POST PROCESS CLEANING
Plasma etching with O2 takes place that is ashing
process takes place.
Simple solvents are used for Positive photoresists
are aceton, trichloroethylene (TCE) and for negative
photoresists are methyl ethyl ketone, methyl isobutyl
keton
PHOTOLITHOGRAPHY

51. STEP 10: FINAL INSPECTION
Photoresists can be completely removed. Quality issues like
step height, defects, particles, critical dimensions can be
check
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Diffusion
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Diffusion
Theprocessofintroducingimpuritiesinto
selectedregionsofasiliconwaferiscalled
diffusion.Therateatwhichvariousimpurities
diffuseintothesiliconwillbeoftheorderof
1µm/hratthetemperaturerangeof900
0
Cto
1100
0
C.Theimpurityatomshavethetendency
tomovefromregionsofhigherconcentrations
tolowerconcentrations
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Diffusion is the process of movement of charge
carriers due to concentration gradientalong the
semiconductor.
The process by which electrons or holesmove
from region of higher concentrationto a region of
lower concentration.
Diffusion

55. Diffusion is the net movement of moleculesfrom an
area where they are at a higher concentrationto
areas where they are at a lower concentration.
The difference in the concentration of a substance
between two areas is called the concentration
gradient.
Diffusion current densityis directly proportional to
the concentration gradient.
Diffusion

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Diffusion
DiffusionFurnace
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Ion implantation
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58. Ion implantation
•Ion implantation is a low-temperature process by which
ions of one element are accelerated into a solid target,
thereby changing the physical, chemical, or electrical
properties of the target.
•Ion implantation is used in semiconductor device
fabrication and in metal finishing, as well as in materials
science research.
•The ions can alter the elemental composition of the
target (if the ions differ in composition from the target) if
they stop and remain in the target.
•Ion implantation also causes chemical and physical
changes when the ions impinge on the target at high
energy.

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IonImplantation
Dose
•Energy
•Species
•Junction depth
•Range of species
•Surface damage
•Impurity activation
Crucial Parameters:
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IonImplantation

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Metallization
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Metallization isthe process of applying a thin layer of
metal to a surface, with applications in electronics for
creating circuits and in manufacturing for corrosion
protection, decorative finishes, or improved
conductivity.In electronics, it involves using techniques
like vapor deposition to create microscopic conductive
pathways on a silicon chip.In other industries, it involves
processes like thermal spraying to coat materials with
metals such as zinc or aluminum for protection and
durability.
Metallization Steps for IC Processing
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63. Metallization Steps for IC Processing
•It is used to create contact with silicon and to make
interconnections on chip.
•A thin layer of aluminium is deposited over the whole
wafer.
•Aluminium is selected because it is a good conductor,
has good mechanical bond with silicon, forms low
resistance contact and it can be applied and patterned
with single deposition and etching process.
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Aluminium is preferred for metallization
1.Itisagoodconductor
2.itiseasytodepositaluminiumfilmsusingvacuum
deposition.
3.Itmakesgoodmechanicalbondswithsilicon
4.Itformsalowresistancecontact
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Dielectric isolation
Indielectricisolation,alayerofsoliddielectric
suchasSiO
2orrubycompletelysurroundseach
componentstherebyproducingisolation,both
electrical&physical.Thisisolatingdielectriclayeris
thickenoughsothatitsassociatedcapacitanceis
negligible.Also,itispossibletofabricatebothpnp&
npntransistorswithinthesamesiliconsubstrate.
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67. PN JUNCTION ISOLATION
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IC packages
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IC packages
1.Metal can package.
2.Dual-in-line package.
3.Ceramic flat package.
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IC package types can be broadly categorized as
eitherThrough-Hole (like DIP) or Surface-Mount (SMD) (like
QFP, SOP, and BGA).Common packages include Dual In-line
(DIP), Quad Flat Package (QFP), Ball Grid Array (BGA), and
Chip Scale Package (CSP), each with unique characteristics
and applications, from legacy boards to mobile devices
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IC packages

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IC packages

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IC Processing Steps
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BasicRequirementsforIC Fabrication:
Clean Room Environment
Ultra Pure Water (18 MΩ)
Semiconductor Grade Chemicals
Stable Power Supply
Class 100 environment means that there are maximum
of 100 particles per cubic foot with particle size larger
than 0.5 μm , and a maximum of 10 particles of size
larger than 5.0 μm
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ICFABRICATIONLAB
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Micro-Electro-Mechanical Systems (MEMS)is the integration of
mechanical elements, sensors, actuators, and electronics on a common
silicon substrate through micro-fabricationtechnology.
While the electronics are fabricated using integrated circuit (IC) process
sequences (e.g., CMOS, Bipolar,or BICMOS processes).
The micromechanical components are fabricated using compatible
"micromachining"processes that selectively etch away partsof the silicon
wafer or add new structural layersto form the mechanical and
electromechanical devices.

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