High bandwidth memory in vlsi chip integration and advanced technology

pavanitellagorla2003 122 views 23 slides Sep 20, 2024
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About This Presentation

HBW high bandwidth memory for the present technology and vibration


Slide Content

Seminar Presentation
on
HIGH BANDWIDTH MEMORY
(HBM)

By
Addagatla Nataraj
218R5A0401

Contents
• Introduction
• Evolution of Memory Technologies
• Emergence of Higher Memory Requirement
• Architecture of HBM
• Advantages & Limitations of HBM
• Applications of HBM
• Conclusion
• Future Scope
• References

Introduction
ØHigh Bandwidth Memory (HBM) redefines memory architecture.
ØUtilizes a 3D-stacked design for unparalleled data transfer rates.
ØIntegrates multiple DRAM dies vertically, reducing latency.
ØAddresses demand for faster memory in graphics cards, High
Performance Computing (HPC), AI.
ØPropels technological advancements across industries.

Evolution of Memory Technologies

Early memory technologies
1.Williams-Kilburn Tube (1947):
ØUtilized cathode ray tube (CRT)
technology.
ØStored binary data as electrically
charged spots on the face of a cathode
ray tube coated with a phosphor screen.
ØEach spot represented a binary digit
(0 or 1).

Early memory technologies (contd..)
2.Delay Line Memory (1940s-1950s):
ØUsed sound waves or electromagnetic
waves to store and retrieve data.
ØData represented as pulses or signals
propagating along a medium, such as
a mercury-filled tube or a wire.
ØEach pulse represented a binary digit
(0 or 1).

Early memory technologies (contd..)
3.Magnetic Drum Memory (1930s-1950s):
ØConsisted of a metal cylinder coated
with a magnetic recording material,
typically ferromagnetic material like
iron oxide.
ØData stored as magnetized areas on the
drum's surface.
ØEach region represented a binary digit
(0 or 1).

Semiconductor Memory Revolution
ØEarly DRAM (1970s-1980s)
ØFast Page Mode DRAM (FPM DRAM) (1980s-1990s)
ØExtended Data Out DRAM (EDO DRAM) (1990s)
ØSynchronous DRAM (SDRAM) (1990s-2000s)
ØDDR SDRAM (2000s-2010s)
ØNext-Generation DRAM (DDR5 and beyond)

Emergence of Higher Memory Requirement
ØData-Intensive Applications
ØEmergence of HPCs and GPUs
ØData Center and Cloud Computing
ØDeep Learning and AI

Architecture of HBM
•HBM utilizes a 3D stacked
architecture, where multiple
DRAM dies are vertically
stacked on top of each other.
•This stacking allows for
higher memory densities and
reduced footprint compared
to traditional memory
architectures.
Fig. Comparison of GDDR5 and High Bandwidth Memory
(HBM) on SoC

Architecture of HBM (contd..)
•The main components of High
Bandwidth Memory (HBM)
include:
ØDRAM Dies
ØThrough-Silicon Vias
(TSVs)
ØLogic Layer
ØInterposer
ØPackage Substrate Fig. Architecture of High Bandwidth Memory (HBM)

Architecture of HBM (contd..)
1.DRAM Dies:
ØEach DRAM die used in HBM
features high-density memory cells
arranged in rows and columns.
ØThese memory cells store data in the
form of electrical charges and are
accessed via row and column address
lines.

Architecture of HBM (contd..)
2.Through-Silicon Vias (TSVs):
ØTSV technology is used to connect
the individual DRAM dies within
the HBM stack.
ØTSV are the vertical electrical
connections that pass through the
silicon substrate, enabling efficient
communication between the stacked
dies while minimizing signal delays.

Architecture of HBM (contd..)
3.Logic Layer:
ØThe logic layer of HBM contains
the memory controller responsible
for managing data transfers
between the DRAM dies and the
external system.
ØIt coordinates read and write
operations, address mapping, and
error correction.

Architecture of HBM (contd..)
4.Interposer:
ØIt provides the physical and
electrical interface for
connecting multiple HBM
memory dies to the
processor.
ØThe interposer is a silicon
substrate with a grid of
through-silicon vias
(TSVs) that enable vertical
stacking of HBM memory
dies.

Advantages & Limitations of HBM
• Advantages of HBM
ØIncreased Bandwidth
ØEnergy Efficiency
ØSpace Efficiency
ØScalability
ØEnhanced System Performance
ØLow Latency

Advantages & Limitations of HBM (contd..)
• Limitations of HBM
ØCost
ØComplex Integration
ØThermal Management
ØSignal Integrity
ØPower Delivery
ØManufacturing Yield

Applications of HBM
ØGraphics Processing Units (GPUs)
ØArtificial Intelligence (AI) and Machine Learning
ØHigh-Performance Computing (HPC)
ØData Centers and Cloud Computing
ØVirtual Reality (VR) and Augmented Reality (AR)
ØNetworking and Communications

Conclusion
•High Bandwidth Memory (HBM) represents a transformative leap in
memory technology, offering unparalleled bandwidth, efficiency, and
performance.
•Despite challenges like cost and manufacturing complexity, its energy
efficiency and scalability make it pivotal for future computing.
•Continued innovation in HBM promises to reshape computing
landscapes and drive technological advancements.

Future Scope
•HBM has developed in several types of generations such as, HBM1,
HBM2, HBM2E, HBM3.
•The future scope of High Bandwidth Memory (HBM) is promising,
with potential advancements in capacity, speed, and energy efficiency.
•As demand grows for faster and more efficient memory solutions in
emerging technologies like AI, HBM's scalability and performance
make it poised to play a vital role in powering next-generation
computing systems.

References
•M. F. Chen, C. H. Tsai, T. Ku, W. C. Chiou, C. T. Wang and D. Yu, "Low Temperature SoIC Bonding and
Stacking Technology for 12-/16-Hi High Bandwidth Memory (HBM)," in IEEE Transactions on Electron
Devices, vol. 67, no. 12, pp. 5343-5348, Dec. 2020.
•K. Son et al., "Thermal Analysis of High Bandwidth Memory (HBM)-GPU Module considering Power
Consumption," 2023 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS), Rose-Hill,
Mauritius, 2023.
•K. Sakui and T. Ohba, "High Bandwidth Memory (HBM) and High Bandwidth NAND (HBN) with the Bump
less TSV Technology," 2019 International 3D Systems Integration Conference (3DIC), Sendai, Japan, 2019.
•A. K. Kabat, S. Pandey and V. T. Gopalakrishnan, "Performance evaluation of High Bandwidth Memory for
HPC Workloads," 2022 IEEE 35th International System-on-Chip Conference (SOCC), Belfast, United
Kingdom, 2022.

References (contd..)
•H. Lee, K. Cho, H. Kim, S. Choi, J. Lim and J. Kim, "Electrical performance of high bandwidth memory
(HBM) interposer channel in terabyte/s bandwidth graphics module," 2015 International 3D Systems
Integration Conference (3DIC), Sendai, Japan, 2015.
•“High Bandwidth Memory”, Retrieved on April 8, 2024, from
https://en.wikipedia.org/wiki/High_Bandwidth_Memory
•“High Bandwidth Memory (HBM) Reliability”, Retrieved on April 8, 2024, from
https://www.proteantecs.com/blog/high-bandwidth-memory-hbm-reliability
•“High-Bandwidth Memory (HBM) REINVENTING MEMORY TECHNOLOGY”, Retrieved on April 8,
2024, from https://www.amd.com/system/files/documents/high-bandwidth-memory-hbm.pdf

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