Input & Output

Input & Output in a microprocessor based system. Programmed I/O vs. Pooling. Interrupt driven I/O to Direct Memory Access.

1. Input & Output CS2052 Computer Architecture Computer Science & Engineering University of Moratuwa Dilum Bandara [email protected]

2. Blocks of a Microprocessor 2 Literal Address Operation Program Memory Instruction Register STACK Program Counter Instruction Decoder Timing, Control and Register selection Accumulator RAM & Data Registers ALU IO I O FLAG & Special Function Registers Clock Reset Interrupts Program Execution Section Register Processing Section Set up Set up Modify Address Internal data bus Source: Makis Malliris & Sabir Ghauri, UWE

3. Input & Output Wide variety of peripherals Different volumes of data, in different formats, & different speeds All slower than CPU & RAM Controlled vial I/O modules/controllers Interface to CPU & Memory Interface to 1 or more peripherals 3 CPU Main Memory I/O Devices System Bus

4. External Devices Interact with humans Monitor, printer, keyboard, mouse Machine readable Monitoring & control e.g., process scheduling, CPU/casing temperature monitoring, fan speed control Communication Network Interface Card (NIC) Modems Dongles – Bluetooth, Wi-Fi, 3G, 4G 4

5. Generic Model of I/O Module 5 Source: William Stallings, Computer Organization and Architecture, 8 th Edition

6. I/O Module Functions Control & Timing CPU communication Device communication Data buffering Error detection 6 Source: http://lilt.ilstu.edu/cheri/itk254/sc/inputoutput/InputOutput_print.html

7. I/O Module Functions – Example 7 Source: http://lilt.ilstu.edu/cheri/itk254/sc/inputoutput/InputOutput_print.html

8. Input Output Techniques Programmed Pooling Interrupt driven Direct Memory Access (DMA) 8

9. Programmed I/O CPU has direct control over I/O Continuously sense status Read/write commands Transferring data CPU waits for I/O module to complete operation Wastes CPU time 9

10. Addressing I/O Devices Under programmed I/O data transfer is like memory access Use instructions like MOVWF, INCF, BTFSS e.g., MOVWF 0x06 Each device given unique identifier CPU commands contain identifier (address) 10

11. I/O Mapping 11 Source: http :// me-lrt.de/memory-map-port-isolated-input

12. I/O Mapping (Cont.) Memory Mapped I/O Devices & memory share same address space I/O looks just like memory read/write No special commands for I/O Large selection of memory access commands Isolated I/O Separate address spaces Need I/O or memory select lines Special commands for I/O Limited set 12

13. Interrupt Driven I/O No repeated CPU checking of device No waiting CPU does its own work I/O module interrupts CPU when ready Steps CPU issues read command I/O module gets data from peripheral whilst CPU does other work I/O module interrupts CPU CPU requests data I/O module transfers data 13

14. Interrupt Processing 14 Source: Robert Love, Linux Kernel Development

15. Interrupt Processing (Cont.) 15 Source: William Stallings, Computer Organization and Architecture, 8 th Edition

16. Direct Memory Access (DMA) Programmed & interrupt driven I/O require active CPU intervention Transfer rate is limited CPU is tied up DMA is the answer Additional module (hardware) on bus DMA controller takes over from CPU for I/O Provide a way of bypassing CPU when transferring data between memory & IO 16

17. 17 DMA (Cont.) CPU IO device Memory DMA CPU IO device Memory

18. Typical DMA Module 18 Source: William Stallings, Computer Organization and Architecture, 8 th Edition

19. 3 Techniques for Input of a Block of Data 19 Source: William Stallings, Computer Organization and Architecture, 8 th Edition

20. Blocks of a Computer 20