INTRODUCTION TO MICROCONTROLLERS(8051) ARCHITECTURE,INSTRUCTION SET ,ADDRESSING MODES

Meeting the computing needs of the task at hand efficiently and cost effectively
Speed
Packaging
Power consumption
The amount of RAM and ROM on chip
The number of I/O pins and the timer on chip
How easy to upgrade to higher performance or lower power-consumption versions
Cost per unitIntel introduced 8051, referred as MCS- 51, in 1981.
The 8051 is an 8-bit processor
The CPU can work on only 8 bits of data at a time
The 8051 became widely popular after allowing other manufactures to make and market any flavor of the 8051.
64KB Program Memory address space
64KB Data Memory address space
4K bytes of on-chip Program Memory
128 bytes of on-chip Data RAM
32 bidirectional and individually addressable I/0 lines
Two 16-bit timer/counters
Full duplex UART
6-source/5-vector interrupt structure with two priority levels
On-chip clock oscillator
There are 128 bytes of RAM in the 8051.
Assigned addresses 00 to 7FH
The 128 bytes are divided into 3 different groups as follows:
A total of 32 bytes from locations 00 to 1F hex are set aside for register banks and the stack.
A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable read/write memory.
A total of 80 bytes from locations 30H to 7FH are used for read and write storage, called scratch pad.
The stack is a section of RAM used by the CPU to store information temporarily.
This information could be data or an address

The register used to access the stack is called the SP (stack pointer) register
The stack pointer in the 8051 is only 8 bit wide, which means that it can take value of 00 to FFH
When the 8051 is powered up, the SP register contains value 07
RAM location 08 is the first location begin used for the stack by the 8051
The storing of a CPU register in the stack is called a PUSH
SP is pointing to the last used location of the stack
As we push data onto the stack, the SP is incremented by one
This is different from many microprocessors

Loading the contents of the stack back into a CPU register is called a POP
With every pop, the top byte of the stack is copied to the register specified by the instruction and the stack pointer is decremented once
The CPU can access data in various ways, which are called addressing modes

Immediate
Register
Direct
Register indirect
External D
These instructions perform several basic operations. After execution, the result is stored in the first operand.
8 bit addition, subtraction, multiplication, increment-decrement instructions can be performed.

MNEMONICS DESCRIPTION BYTE

ADD A, Rn A = A + Rn 1
ADD A, @ Ri A = A+ Ri 1
ADD A, # X A = A + Byte 2
ADDC A, Rn A = A + Rn + C 1
LCALL (long call): 3-byte instruction
2-byte address
Target address within 64K-byte range

ACALL (absolute call): 2-byte instruction
11-bit address
Target address within 2K-byte range

All conditional jumps are short jumps
Target address within -128 to +127 of PC

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1. Introduction
to
Microcontrollers
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2. The necessary tools for a
microprocessor/controller
1.CPU: Central Processing Unit
2.I/O: Input /Output
3.Bus: Address bus & Data bus
4.Memory: RAM & ROM
5.Timer
6.Interrupt
7.Serial Port
8.Parallel Port
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3. Internal Block Diagram of CPU
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4. Address and Data Bus
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5. Microcontroller
•A smaller computer
•On-chip RAM, ROM, I/O ports...
•Example: Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC
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6. Microprocessors
•CPU for Computers
•No RAM, ROM, I/O on CPU chip itself
•Example: Intel's x86, Motorola’s 680x0
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7. Microprocessor vs. Microcontroller
Microprocessor
•CPU is stand-alone, RAM,
ROM, I/O, timer are separate
•Designer can decide on the
amount of ROM, RAM and I/O
ports.
•Expensive
•Versatility
•General-purpose
Microcontroller
•CPU, RAM, ROM, I/O and
timer are all on a single chip
•Fix amount of on-chip ROM,
RAM, I/O ports
•For applications in which cost,
power and space are critical
•Not Expensive
•Single-purpose
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8. Microcontrollers for Embedded Systems
•Home
–Appliances,intercom,telephones,securitysystems,garagedooropeners,
answeringmachines,faxmachines,homecomputers,TVs,cableTVtuner,
VCR,camcorder,remotecontrols,videogames,cellularphones,musical
instruments,sewingmachines,lightingcontrol,paging,camera,pinball
machines,toys,exerciseequipmentetc.
•Office
–Telephones,computers,securitysystems,faxmachines,microwave,copier,
laserprinter,colorprinter,pagingetc.
•Auto
–Tripcomputer,enginecontrol,airbag,ABS,instrumentation,security
system,transmissioncontrol,entertainment,climatecontrol,cellular
phone,keylessentry
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9. Choosing a Microcontroller
•8-bitmicrocontrollers
–Motorola’s6811
–Intel’s8051
–Zilog’sZ8
–Microchip’sPIC
•Therearealso16-bitand32-bitmicrocontrollers
madebyvariouschipmakers
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10. Criteria for Choosing a Microcontroller
•Meetingthecomputingneedsofthetaskathand
efficientlyandcosteffectively
–Speed
–Packaging
–Powerconsumption
–TheamountofRAMandROMonchip
–ThenumberofI/Opinsandthetimeronchip
–Howeasytoupgradetohigherperformanceorlowerpower-
consumptionversions
–Costperunit
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11. Criteria for Choosing a Microcontroller
•Availabilityofsoftwaredevelopmenttools,suchas
compilers,assemblers,anddebuggers
•Wideavailabilityandreliablesourcesofthe
microcontroller
–The8051familyhasthelargestnumberofdiversified(multiple
source)suppliers
•Intel(original)
•Atmel
•Philips/Signetics
•AMD
•Infineon(formerlySiemens)
•Matra
•DallasSemiconductor/Maxim
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12. 8051 Microcontroller
•Intelintroduced8051,referredasMCS-51,in
1981.
•The8051isan8-bitprocessor
–TheCPUcanworkononly8bitsofdataatatime
•The8051becamewidelypopularafterallowing
othermanufacturestomakeandmarketany
flavorofthe8051.
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13. 8051 Family
•The 8051 is a subset of the 8052
•The 8031 is a ROM-less 8051
–Add external ROM to it
–You lose two ports, and leave only 2 ports for I/O operations
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14. 8051 Features
•64KB Program Memory address space
•64KB Data Memory address space
•4K bytes of on-chip Program Memory
•128 bytes of on-chip Data RAM
•32 bidirectional and individually addressable I/0 lines
•Two 16-bit timer/counters
•Full duplex UART
•6-source/5-vector interrupt structure with two priority
levels
•On-chip clock oscillator
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15. Pin Diagram of the 8051
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16. Interrupt
Control
CPU
4K
ROM
128 B
RAM
OSC
Bus
Control
4 I/O Ports
Serial
Port
Timer 1
Timer 0
General Block Diagram of 8051
TXDRXD
P0P1P2P3
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17. Detailed Block Diagram
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18. 8051
Memory Space
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19. 8051 Memory Structure
External
INT
128
SFR
External
Program Memory Data Memory
64K
EA = 0
EA = 1
4K
64K
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20. 128 Byte RAM
•Thereare128bytesofRAMinthe8051.
–Assignedaddresses00to7FH
•The128bytesaredividedinto3different
groupsasfollows:
1.Atotalof32bytesfromlocations00to1F
hexaresetasideforregisterbanksandthe
stack.
2.Atotalof16bytesfromlocations20Hto2FH
aresetasideforbit-addressableread/write
memory.
3.Atotalof80bytesfromlocations30Hto7FH
areusedforreadandwritestorage,called
scratchpad.
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128 BYTE
INTERNAL RAM
Register Banks
RegBank 0
RegBank 1
RegBank 2
RegBank 3
BIT Addressable
Area
General Purpose
Area

21. 8051 Programming Model
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22. 8051 RAM with addresses
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23. 8051 Register Banks with address
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24. Bit Addressable & Byte Addressable
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25. Bit Addressable Programming
•Example: Find out to which by each of the following bits
belongs. Give the address of the RAM byte in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH (d) SETB 28H, (e) CLR 12, (f) SETB 05
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26. Special Function Registers [SFR]
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27. Internal RAM Structure
Direct &
Indirect
Addressing
Direct
Addressing
Only
SFR [ Special Function
Registers]
128 Byte Internal RAM
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28. Program Status Word [PSW]
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C AC F0 RS1 RS0 OV --P
Register Bank Select
Carry
Auxiliary Carry
User Flag 0
Parity
Reserved for future use
Overflow

29. Flags in PSW
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30. Flags in PSW
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31. Flags in PSW
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32. Example for Overflow flag
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33. 8051 instructions that affects flag
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34. 8051 Stack
•ThestackisasectionofRAMusedbytheCPUtostore
informationtemporarily.
–Thisinformationcouldbedataoranaddress
•TheregisterusedtoaccessthestackiscalledtheSP
(stackpointer)register
–Thestackpointerinthe8051isonly8bitwide,whichmeans
thatitcantakevalueof00toFFH
–Whenthe8051ispoweredup,theSPregistercontainsvalue
07
–RAMlocation08isthefirstlocationbeginusedforthestackby
the8051
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35. 8051 Stack
•ThestoringofaCPUregisterinthestackiscalledaPUSH
–SPispointingtothelastusedlocationofthestack
–Aswepushdataontothestack,theSPisincrementedbyone
–Thisisdifferentfrommanymicroprocessors
•LoadingthecontentsofthestackbackintoaCPU
registeriscalledaPOP
–Witheverypop,thetopbyteofthestackiscopiedtothe
registerspecifiedbytheinstructionandthestackpointeris
decrementedonce
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36. Pushing onto Stack
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37. Popping from Stack
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38. Single bit Instructions
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39. 8051 Addressing Modes
•The CPU can access data in various ways, which are
called addressing modes
1.Immediate
2.Register
3.Direct
4.Register indirect
5.External Direct
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40. Immediate Addressing Mode
•Thesourceoperandisaconstant.
•Theimmediatedatamustbeprecededbythepoundsign,“#”
•Canloadinformationintoanyregisters,including16-bitDPTR
register
–DPTRcanalsobeaccessedastwo8-bitregisters,thehighbyteDPHand
lowbyteDPL
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41. Register Addressing Mode
•Use registers to hold the data to be manipulated.
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•The source and destination registers must match in size.
MOV DPTR,A will give an error
•The movement of data between Rn registers is not allowed
MOV R4,R7 is invalid

42. Direct Addressing Mode
•It is most often used the direct addressing mode to
access RAM locations 30 –7FH.
•The entire 128 bytes of RAM can be accessed.
•Contrast this with immediate addressing mode, there is
no “#” sign in the operand.
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43. SFR Registers & their Addresses
MOV0E0H,#55H;is the same as
MOVA,#55H ;which means load 55H into A (A=55H)
MOV0F0H,#25H;is the same as
MOV B,#25H ;which means load 25H into B (B=25H)
MOV0E0H,R2 ;is the same as
MOVA,R2 ;which means copy R2 into A
MOV0F0H,R0 ;is the same as
MOVB,R0 ;which means copy R0 into B
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44. SFR Addresses ( 1 of 2 )
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45. SFR Addresses ( 2 of 2 )
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46. Example
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47. Stack and Direct Addressing Mode
•Only direct addressing mode is allowed for pushing or
popping the stack.
•PUSH Ais invalid.
•Pushing the accumulator onto the stack must be coded
as PUSH 0E0H.
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48. Register Indirect Addressing Mode
•Aregisterisusedasapointertothedata.
•OnlyregisterR0andR1areusedforthispurpose.
•R2–R7cannotbeusedtoholdtheaddressofan
operandlocatedinRAM.
•WhenR0andR1holdtheaddressesofRAMlocations,
theymustbeprecededbythe“@”sign.
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49. Register Indirect Addressing Mode
•Theadvantageisthatitmakesaccessingdatadynamic
ratherthanstaticasindirectaddressingmode.
•Loopingisnotpossibleindirectaddressingmode.
•Write a program to clear 16 RAM locations starting at
RAM address 60H.
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50. Index Addressing Mode
For example
1.MOVC A, @ A + DPTR ( This instruction moves the
data from the memory to accumulator; whose
address is computed by adding the contents of
accumulator and DPTR)
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51. External Direct
•External Memory is accessed.
•There are only two commands that use External Direct
addressing mode:
–MOVX A, @DPTR
MOVX @DPTR, A
•DPTR must first be loaded with the address of external
memory.
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52. Register Indirect Addressing Mode
•Write a program to copy the value 55H into RAM memory locations 40H
to 41H using (a) direct addressing mode, (b) register indirect addressing
mode without a loop, and (c) with a loop.
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53. 8051 Instruction Set
•DATA TRANSFER GROUP
•ARITHMETIC GROUP
•LOGICAL GROUP
•CONTROL TRANSFER GROUP
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54. Structure of Assembly Language
ORG 0H ;start (origin) at location 0
MOV R5,#25H;load 25H into R5
MOV R7,#34H;load 34H into R7
MOV A,#0 ;load 0 into A
ADD A,R5 ;add contents of R5 to A
;now A = A + R5
ADD A,R7 ;add contents of R7 to A
;now A = A + R7
ADD A,#12H ;add to A value 12H
;now A = A + 12H
HERE: SJMP HERE ;stay in this loop
END ;end of asm source file
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55. Data Types & Directives
ORG 500H
DATA1: DB 28 ;DECIMAL (1C in Hex)
DATA2: DB 00110101B ;BINARY (35 in Hex)
DATA3: DB 39H ;HEX
ORG 510H
DATA4: DB “2591” ; ASCII NUMBERS
ORG 518H
DATA6: DB “My name is Joe” ;ASCII CHARACTERS
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56. Data Transfer Instructions
MNEMONIC DESCRIPTION BYTES
•MOV A, Rn (A) (Rn) 1
•MOVA,Rx (A)(Rx) 2
•MOVA,@Ri (A)(Ri) 1
•MOVA,#X (A)Data 2
•MOVRn,A (Rn)(A) 1
•MOVRn,#X (Rn)Data 2
•MOVRx,A (Rx)(A) 2
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57. Data Transfer Instructions
MNEMONIC DESCRIPTION BYTES
•MOV Rx, @ Ri (Rx) (Ri) 2
•MOV Rx, # X (Rx) Data 3
•MOV @ Ri, A (Ri) (A) 1
•MOV @ Ri, Rx (Ri) (Rx) 2
•MOV @ Ri, #X (Ri) Data 2
•MOV DPTR, #X (DPTR) Data 3
•MOVC A @ A+DPTR (A) (A+DPTR) 1
•MOVC A@A+PC (A) (A+PC) 1
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58. Data Transfer Instructions
MNEMONIC DESCRIPTION BYTES
•MOVX A, @ DPTR (A) (DPTR) 1
•MOVX @Ri, A (Ri) (A) 1
•MOVX A,@ Ri A (Ri) 1
•XCH A, Rn (A) (Rn) 1
•XCH A, Rx (A) (Rx) 2
•XCH A, @Ri (A) (Ri) 1
•MOVX @DPTR, A (DPTR) (A) 1
•PUSH Rx Push directly addressed 2
Rx register on stack
•POP Rx (A) (Rx) 2
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59. Data Transfer Instructions
•XCHD Exchange 4 lower bits in 1
accumulator with indirectly
addressed register
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60. MOV Instruction
•MOV destination, source ; copy source to destination.
•MOV A,#55H;load value 55H into reg. A
MOV R0,A;copy contents of A into R0
;(now A=R0=55H)
MOV R1,A;copy contents of A into R1
;(now A=R0=R1=55H)
MOV R2,A;copy contents of A into R2
;(now A=R0=R1=R2=55H)
MOV R3,#95H;load value 95H into R3
;(now R3=95H)
MOV A,R3;copy contents of R3 into A
;now A=R3=95H
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61. Arithmetic Instructions
•These instructions perform several basic operations.
After execution, the result is stored in the first operand.
•8 bit addition, subtraction, multiplication, increment-
decrement instructions can be performed.
MNEMONICS DESCRIPTION BYTE
•ADD A, Rn A = A + Rn 1
•ADD A, @ Ri A = A+ Ri 1
•ADD A, # X A = A + Byte 2
•ADDC A, Rn A = A + Rn + C 1
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62. Arithmetic Instruction
•ADDC A, @ Ri A = A + Ri + C 1
•ADDC A, # X A = A + Byte + C 2
•SUBB A, Rn A = A –Rn –1 1
•SUBB A, @ Ri A = A –Ri –1 1
•SUBB A, # X A = A –Byte –1 2
•INC A A = A + 1 1
•INC Rn Rn = Rn + 1 1
•INC @ Ri Ri = Ri + 1 1
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63. Arithmetic Instruction
•DEC A A= A –1 1
•DEC Rn Rn= Rn –1 1
•DEC @ Ri Ri= Ri –1 1
•INC DPTR DPTR= DPTR + 1 1
•MUL AB B:A = A * B 1
•DIV AB A = [A/B] 1
•DA A Decimal adjustment of 1
accumulator according
to BCD code
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64. ADD Instruction
•ADD A, source;ADD the source operand to the
accumulator
•MOV A, #25H ;load 25H into A
MOV R2,#34H ;load 34H into R2
ADD A,R2 ;add R2 to accumulator
;(A = A + R2)
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65. 8051 Microcontroller 65

66. Subtraction
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67. 8051 Microcontroller 67

68. 8051 Microcontroller 68

69. DECIMAL ADJUST for Addition
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70. ASCII TO BCD and BCD TO ASCII
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71. Multiplication of Unsigned Numbers
MULAB; A B, place 16-bit result in B and A
MOV A,#25H;load 25H to reg. A
MOV B,#65H;load 65H in reg. B
MUL AB ;25H * 65H = E99 where B = 0EH and A = 99H
Table 6-1:Unsigned Multiplication Summary (MUL AB)
MultiplicationOperand 1 Operand 2 Result
byte byte A B A=low byte,
B=high byte
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72. 8051 Microcontroller 72

73. Division of Unsigned Numbers
DIV AB; divide A by B
•MOV A,#95H ;load 95 into A
•MOV B,#10H ;load 10 into B
•DIVAB ;now A = 09 (quotient) and B = 05 (remainder)
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Table 6-2:Unsigned Division Summary (DIV AB)
Division Numerator DenominatorQuotientRemainder
byte / byteA B A B

74. Logical Instructions
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75. Logical Instructions
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76. Logical Instructions
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77. Logical Instructions
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78. Logical Instructions
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79. Logical Instructions
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80. Logical Instructions
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81. Logical Instructions
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82. Logical Instructions
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83. Logical Instructions
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84. Program Flow Control Instructions
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85. Program Flow Control Instructions
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86. PROGRAM USING LCALL INSTRUCTION
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87. Program Flow Control Instructions
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88. Program Flow Control Instructions
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89. Conditional Jump Example
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90. Unconditional Jump Instructions
•All conditional jumps are short jumps
–Target address within -128 to +127 of PC
•LJMP(long jump): 3-byte instruction
–2-byte target address: 0000 to FFFFH
–Original 8051 has only 4KB on-chip ROM
•SJMP(short jump): 2-byte instruction
–1-byte relative address: -128 to +127

91. Call Instructions
•LCALL(long call): 3-byte instruction
–2-byte address
–Target address within 64K-byte range
•ACALL(absolute call): 2-byte instruction
–11-bit address
–Target address within 2K-byte range

92. 8051 Software Overview
1.Addressing
Modes
2.Instruction Set
3.Programming
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93. Checking an input bit
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JNB (jump if no bit) ; JB (jump if bit = 1)

94. Switch Register Banks
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95. Pushing onto Stack
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96. Popping from Stack
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97. Looping
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98. Loop inside a Loop (Nested Loop)
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99. 8051 Conditional Jump Instructions
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100. Conditional Jump Example
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101. Unconditional Jump Instructions
•All conditional jumps are short jumps
–Target address within -128 to +127 of PC
•LJMP(long jump): 3-byte instruction
–2-byte target address: 0000 to FFFFH
–Original 8051 has only 4KB on-chip ROM
•SJMP(short jump): 2-byte instruction
–1-byte relative address: -128 to +127
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102. Conditional Jump Example
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103. Call Instructions
•LCALL(long call): 3-byte instruction
–2-byte address
–Target address within 64K-byte range
•ACALL(absolute call): 2-byte instruction
–11-bit address
–Target address within 2K-byte range
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104. 8051 Microcontroller 104