Microcontrollers and its applications unit 1

This ppt provides a introduction about 8051 microcontrollers.

1. Sri Ramakrishna Institute of Technology Department of ECE UNIT I 8051 MICROCONTROLLER Course Co-Ordinator Ms.S.Dhivya , AP/ECE

2. 8051 Microcontroller Architecture of 8051 Register set I/O Pins Ports and circuits Instruction set Addressing modes Assembly language programs for arithmetic and logical operations.

3. Microcontroller A microcontroller  (μ-controller) is a small computer on a single integrated circuit . The general microcontroller consists of the processor, the memory (RAM, ROM, EPROM), Serial ports, peripherals (timers, counters), etc . Microcontrollers are designed for embedded applications, in contrast to the microprocessors used in personal computers or other general purpose applications consisting of various discrete chips.

4. Microcontrollers vs Microprocessors Microcontroller Microprocessor A microcontroller is a part of an embedded system. A microprocessor is the main part of a computer system. It has a processor along with its internal memory and the I/O components. It has only a memory so its memory and I/O components are required to be connected externally. Memory and I/O components are present, and the internal circuit is quite small. Memory and I/O components are connected externally, hence the circuit becomes large. It can be used in compact systems. It cannot be used in compact systems. The entire system cost of a microcontroller is low. The entire system cost of a microprocessor is high. It can be used in stored powered devices as its external components are few and consumption of power is low. It is not suitable for stored powered devices like batteries because of the external components, the power consumption is high.

5. Microcontrollers vs Microprocessors Microcontroller Microprocessor Several microcontrollers offer power-saving modes Many microprocessors don't have a power-saving mode. It is used in washing machines, MP3 players, automobiles, and embedded systems. It is used for personal computers. It is based on Harvard architecture. It is based on the Von Neumann model. It has a CPU along with RAM, ROM, and other peripherals embedded on a single chip. It has no RAM, ROM, and other peripherals on a chip These systems run up to 200MHz or more depending on the architecture. These systems can run at a very high speed. It is used for application-specific systems. It's used for general purpose applications. It is simple and low cost with fewer instructions. It is complex and expensive with a large number of instructions.

6. Microcontroller VS Microprocessor

7. TYPES OF MICROCONTROLLERS Microcontrollers are divided into various categories based on memory, architecture, bits and instruction sets . Following is the list of their types − Bit Memory Instruction sets

8. 1.Bit 8-bit microcontroller  − This type of microcontroller is used to execute arithmetic and logical operations like addition, subtraction, multiplication division, etc. For example, Intel 8031 and 8051 are 8 bits microcontroller. 16-bit microcontroller  − This type of microcontroller is used to perform arithmetic and logical operations where higher accuracy and performance is required. For example, Intel 8096 is a 16-bit microcontroller. 32-bit microcontroller  − This type of microcontroller is generally used in automatically controlled appliances like automatic operational machines, medical appliances , etc.

9. MEMORY External memory microcontroller  − This type of microcontroller is designed in such a way that they do not have a program memory on the chip . Hence, it is named as external memory microcontroller. For example: Intel 8031 microcontroller. Embedded memory microcontroller  − This type of microcontroller is designed in such a way that the microcontroller has all programs and data memory, counters and timers, interrupts, I/O ports are embedded on the chip . For example: Intel 8051 microcontroller.

10. INSTRUCTION SET Based on the instruction set configuration, the microcontroller is further divided into two categories. CISC  − CISC stands for complex instruction set computer. It allows the user to insert a single instruction as an alternative to many simple instructions . RISC  − RISC stands for Reduced Instruction Set Computers. It reduces the operational time by shortening the clock cycle per instruction .

11. Applications of Microcontrollers Microcontrollers are widely used in various different devices such as − Light sensing and controlling devices like LED. Temperature sensing and controlling devices like microwave oven, chimneys. Fire detection and safety devices like Fire alarm. Measuring devices like Volt Meter.

12. Types of Microcontrollers

13. ARCHITECTURE OF 8051

14. FEATURES 8051 is a family of 8 bit microcontroller by Intel. Operating frequency is 12MHz. Available in ROM/EPROM/EEPROM versions Separate 64K external program and 64K external data memory . Multiply and divide instructions available. 32 I/O can be either used as four 8 bit ports or 32 I/O. It has 8 bit data bus (Port 0) and 16 bit address bus multiplexed with Port 0 and Port 2.

15. DESCRIPTION The 8 bit CPU with Registers A and B Internal ROM-4 KB 16-bit program counter(PC) and data pointer(DPTR) Internal RAM of 128 bytes 8-bit Program Status word(PSW) Two 16 bit Counter / timers 4 eight-bit ports 3 internal interrupts and 2 external interrupts. Control register Oscillator and clock circuits.

16. OSCILLATOR AND CLOCK The 8051 requires an external oscillator circuit . The oscillator circuit usually runs around 12MHz. The crystal generates 12M pulses in one second. An 8051 machine cycle consists of 12 crystal pulses (clock cycle). The first 6 crystal pulses (clock cycle) is used to fetch the Opcode and the second 6 pulses are used to perform the operation on the operands in the ALU . This gives an effective machine cycle rate at 1MIPS (Million Instructions Per Second).

17. TIMING and CONTROL The whole operation of 8051 microcontroller is synchronous with the clock. Apart from timings, there are control signals ALE/, PSEN/ and RD/,WR/ that are generated by timing and control unit for accessing the off chip devices.

18. ALU Arithmetic and Logic Unit of 8051 performs arithmetic and logical operations on 8 bit operands. Apart from addition and subtraction operations, the 8051 hardware also performs multiplication and division operation. Logical operation involves AND, OR, NOT and EX-OR operations.

19. A (ACCUMULATOR) REGISTER 8051 has an 8 bit accumulator register. Accumulator is used by all arithmetic and logical instructions . Accumulator is the register, which gets the outputs of the ALU in most of the arithmetic and logical operations with few exceptions. Access to accumulator is faster than access to main memory . Because accumulator has direct path to ALU and can immediately store the intermediate result of operation.

20. B REGISTER B register is an 8 bit wide register. This is available as a general purpose register when it is not being used by multiplication and division operation. While multiplying , it holds one of the operands and after the execution of the multiplication instruction, it stores the higher byte of result . While dividing , it holds 8 bit divisor and after the execution of the division instruction, the remainder is stored in B register.

21. PROGRAM COUNTER (PC) The program counter is 16 bits wide The program counter points to the address of the next instruction to be Executed As the CPU fetches the opcode from the program ROM, the program counter is increasing to point to the next instruction.

22. CONTINUE… This means that it can access program addresses 0000 to FFFFH, a total of 64K bytes of code . PC is affected by CALL and JUMP instructions . This register has no internal (On Chip) RAM address.

23. DPTR The data pointer is 16 bit register. It is used to hold the address of the data in the memory (Off chip memory) and code with the MOVX and MOVC commands. It can be used as a 16 bit data register or two independent data register. The DPTR register can be accessed separately as lower eight bit( DPL ) and higher eight bit ( DPH ).

24. PSW The program status word is an 8 bit register . The PSW contains the carry(c),auxiliary carry(AC), overflow(OV) and parity(p) flag , User program flag F0,and the register select bits(RS1 and RS0) that identify which of the four General-purpose register banks is currently in use by the program. Each of the PSW bits is referred to as PSW.X Thus PSW.0 is the LSB

25. STACK POINTER The stack is a section of RAM used by the CPU to store information temporarily This information could be data or an address The register used to access the stack is called the SP (stack pointer) register The stack pointer in the 8051 is only 8 bit wide .

26. CONTINUE… It is incremented during PUSH or CALL operations and is decremented during POP or RETURN operation. After the RESET operation, the stack pointer is initialized to 07H, causing the stack to begin at 08H.

27. Operation of stack p u sh pop stack stack pointer

28. SPECIAL FUNCTION REGISTER(SFR) The on-chip RAM locations from 80H to 0FFH are reserved for the special functions and therefore called as Special Function Registers and must not be used by the 8051 programmer. These are used for control or to show the status of the various functions done by 8051 . These are reserved for the special functions and cannot be used for any other purpose.

29. CONTINUE… The SFR (Special Function Register) can be accessed by their names or by their addresses and can be read or written as well. Not all the address space of 80 to FF is used by SFR. There are 21 SFRs .

30. TIMER REGISTER Register pairs (TH0 ,TL0) and (TH1 ,TL1) forms the 16bit timer/counter registers. The operation may be timing or counting. There are various modes in which timers can be configured. For this purpose, there are timer control (TCON) and timer mode register(TMOD)

31. PORTS 0 to 3 8051 has for 8 bit ports named as Port 0 (P0), Port 1 (P1), Port 2 (P2), and Port 3 (P3) , that are used either as four 8 bit ports or each of the port pins could be addressed individually. Each of these ports is bit addressable as well as byte addressable

32. PROGRAM MEMORY (ROM) The code is typically stored in ROM/EPROM. The program memory of 8051 is 4K ROM

33. DATA MEMORY (RAM) Data memory can be Internal RAM and (128Bytes) Off-chip external data RAM (64KB) To access the off chip data RAM, 16 bit address is used. The lower order byte of the address-data bus is multiplexed(AD0-AD7) and which is available in (Port 0) and higher order byte of the address (A8-A15) is available in (Port 2)

34. REGISTER SETS (8051)

35. REGISTERS 8051 registers are listed below: General purpose or Working registers Stack pointer Program Counter Special function registers Program Status Word (PSW) For detailed content of these registers, Refer slide numbers from 20-32.

36. I/O PINS (8051) PIN DIAGRAM

37. Pin Diagram

38. Pin Description Pins 1-8: Port 1 Each of these pins can be configured as an input or an output. Pin 9: RST A logic one on this pin disables the microcontroller and clears the contents of most registers. In other words, the positive voltage on this pin resets the microcontroller. By applying logic zero to this pin, the program starts execution from the beginning. Pins10-17: Port 3 Similar to port 1, each of these pins can serve as general input or output. Besides, all of them have alternative functions.

39. Pin Description Pins10-17: Port 3 Similar to port 1, each of these pins can serve as general input or output. Besides, all of them have alternative functions: Pin10: RXD Serial asynchronous communication input or Serial synchronous communication output. Pin11: TXD Serial asynchronous communication output or Serial synchronous communication clock output. Pin 12: INT0 Interrupt 0 inputs. Pin 13: INT1 Interrupt 1 input. Pin 14: T0 Counter 0 clock input. Pin 15: T1 Counter 1 clock input. Pin 16: WR Write to external (additional) RAM. Pin 17: RD Read from external RAM. Pin 18, 19: XTAL2/XTALI is for oscillator input Pin 20: GND-Ground.

40. Pin Description Pin 21-28: Port 2- If there is no intention to use external memory then these port pins are configured as general inputs/outputs. In case external memory is used, the higher address byte, i.e. addresses A8-A15 will appear on this port. Even though memory with capacity of 64Kb is not used, which means that not all eight port bits are used for its addressing, the rest of them are not available as inputs/outputs. Pin 29: PSEN’- Program Store Enable. If external ROM is used for storing program, then a logic zero(0) appears on it every time the microcontroller reads a byte from memory. Pin 30: ALE – Address latch enable 1 – Address on AD 0 to AD 7 0 – Data on AD 0 to AD 7 Pin 31: EA’ – it indicates the presence of external memory Pin 32-39: Port 0 Similar to P2. Pin 40: VCC → +5V power supply.

41. BLOCK DIAGRAM (8051)

42. Functional Block Diagram

43. Description The Intel 8051 contains two separate buses for both program and data. So, it has two distinctive memory spaces of 64K x 8 size for both program and data. It is based on an 8 bit central processing unit with an 8 bit accumulator and another 8-bit B register as main processing blocks. Other portions of the architecture include few 8 bit and 16bit registers and 8-bit memory locations. It has some amount of data RAM built in the device for internal processing. This area is used for stack operations and temporary storage of data. 8051 is supported with on-chip peripheral functions like I/O ports, Timers/ Counters, Serial communication port.

44. Description CENTRAL PROCESSING UNIT The CPU is the brain of the microcontrollers expected task reading user's programs and executing the as per instructions stored there in. Its primary elements are an Accumulator (AC), Stack Pointer (SP) Program Counter (PC), Program Status Word (PSW), Data Pointer (DTPR) and few more 8-bit register.

45. PORTS AND CIRCUITS (8051)

46. I/O Ports Each port of 8051 has bi-directional capability. Port is called 'true bidirectional port' as it floats (tri-stated) when configured as input. Port-1, 2, 3 are called 'quasi bidirectional port' . To communicate data with the external world the microcontroller needs ports. The ports may support either parallel or serial data transfer. It has 4 I/O ports namely, Port 0, Port 1, Port 2 & Port 3 Port 1: is exclusively for input & output functions. Port 0, 2 & 3: perform functions other than parallel data transfer. All 4 ports are bidirectional. The 8 port pins are connected through 8 D type port latches.

47. PORT 0 Port -0 has 8 pins (P0.0-P0.7). Port-0 can be configured as a normal bidirectional I/O port or it can be used for Address / data interfacing for accessing external memory. When control is '1', the port is used for address/data interfacing. When the control is '0', the port can be used as a normal bi-directional I/O port. Port 0 is written with 1’s when used for external memory access.

48. PORT 1 Port-1 has 8 pins (P1.1-P1.7) Port-1 does not have any alternate function i.e. it is dedicated solely for I/O interfacing. When used as output port, the pin is pulled up or down through internal pull-up. To use port-1 as input port, '1' has to be written to the latch. In this input mode when '1' is written to the pin by the external device then it read fine. But when '0' is written to the pin by the external device then the external source must sink current due to internal pull-up. If the external device is not able to sink the current the pin voltage may rise, leading to a possible wrong reading.

49. PORT 2 Port-2 has 8-pins (P2.0-P2.7) Port-2 is used for higher external address byte or a normal input/output port. The I/O operation is similar to Port-1. Port-2 latch remains stable when Port-2 pin are used for external memory access. Here again due to internal pull-up there is limited current driving capability.

50. PORT 3 Port-3 has 8 pin (P3.0-P3.7) Port-3 pins have alternate functions. Each pin of Port-3 can be individually programmed for I/O operation or for alternate function. The alternate function can be activated only if the corresponding latch has been written to '1’. To use the port as input port, 1 should be written.

51. Alternate Functions of Port 3 P3.0 and P3.1 are used for the RxD (Receive Data) and TxD (Transmit Data) serial communications signals. Bits P3.2 and P3.3 are meant for external interrupts. Bits P3.4 and P3.5 are used for Timers 0 and 1 and P3.6 and P3.7 are used to provide the write and read signals of external memories connected in 8031 based systems

52. 8051 Instruction Set

53. 8051 Instruction Set The microcontroller 8051 instructions set includes 110 instructions, 49 of which are single byte instructions, 45 are two bytes instructions and 17 are three bytes instructions. The instructions format consists of a function mnemonic followed by destination and source field. All the instructions of microcontroller 8051 may be classified based on the functional aspect are given below Data transfer group. Arithmetic group. Logical group. Bit manipulation group. Branching or Control transfer group.

54. Instruction Format An 8051 Instruction consists of an Opcode (short of Operation – Code) followed by Operand (s) of size Zero Byte, One Byte or Two Bytes. The Op-Code part of the instruction contains the Mnemonic , which specifies the type of operation to be performed. All Mnemonics or the Opcode part of the instruction are of One Byte size. The format of instruction is as follows: MNEMONIC DESTINATION OPERAND, SOURCE OPERAND  

55. Instruction Format MNEMONIC DESTINATION OPERAND, SOURCE OPERAND   The operand can be any of the following: No Operand Data value I/O Port Memory Location CPU register

56. DATA TRANSFER ARITHMETIC LOGICAL BOOLEAN PROGRAM BRANCHING MOV ADD ANL CLR LJMP MOVC ADDC ORL SETB AJMP MOVX SUBB XRL MOV SJMP PUSH INC CLR JC JZ POP DEC CPL JNC JNZ XCH MUL RL JB CJNE XCHD DIV RLC JNB DJNZ DA A RR JBC NOP     RRC ANL LCALL SWAP ORL ACALL       CPL RET RETI         JMP 8051 Instruction Set Classification

57. Data Transfer Instructions The Data Transfer Instructions are associated with transfer of data between registers or external program memory or external data memory. The contents of the source location are unchanged.

58. Mnemonic Description MOV Move Data MOVC Move Code MOVX Move External Data PUSH Move Data to Stack POP Copy Data from Stack XCH Exchange Data between two Registers XCHD Exchange Lower Order Data between two Registers The Mnemonics associated with Data Transfer are given below.

59. Data Transfer Instructions MOV Instruction format Example Function MOVA, Rn MOV A, R1 Move byte form register Rn to accumulator MOV Rn, A MOV R5, A Move data from accumulator to register Rn MOV Rn, direct MOV R3, 30H Move data from direct address to register Rn. MOV Rn, # data MOV R7, #20H Move immediate data to register Rn. MOV direct, A MOV 80H, A Move data from accumulator to direct address MOV direct, Rn MOV 30H, R5 Move data from register to direct address MOV direct, direct MOV 20H, 30H Move data form source direct address to the destination direct address. MOV direct, @Ri MOV 20H, @R1 Move data from address specified in register Ri to direct address. MOV direct, #data MOV 10H, #10H Move immediate data to direct address MOV @Ri, A MOV @ R0,A Move data form accumulator to memory location pointed by Ri

60. Data Transfer Instructions 2. MOVC – All data is moved from the code memory to A register Instruction Example Description MOVC A, @A+DPTR MOV DPTR, #1234h MOV A, #56h MOVC A, @A+DPTR Copy the immediate no. 1234 to DPTR Copy the immediate no 56 to A Copy the content of the address 128Ah found at ROM to A. MOVC A, @A+PC This instruction will copy the contents of code memory location formed by adding PC and A, to the accumulator.

61. Data Transfer Instructions 3. MOVX- Normally used with external RAM, I/O address. All external data move must involve A register Instruction Example Description MOVX A, @ Ri MOVX A, @R0 This instruction will copy the data from 8 bit address pointed by register Ri of the selected register bank to the accumulator. MOVX A, @DPTR MOVX A, @DPTR This instruction will copy the contents of external data memory location, pointed by DPTR to the accumulator. MOVX @ Ri , A MOVX @R1, A This instruction will copy the contents of the accumulator to the external data memory location pointed by register Ri of selected register bank. MOVX @ DPTR, A MOVX @ DPTR, A This instruction will copy the contents of the accumulator to the 16-bit address, pointed by DPTR.

62. 4. PUSH PUSH ADDR; Increment SP, copy the data in the address to the internal RAM address contained in SP.

63. 4. POP POP ADDR; copy the data in the internal RAM address contained in SP.to address, decrement SP

64. Example Description XCH A, R1 This instruction will load the contents of register R1 of selected register bank in the accumulator and at the same time the contents of original accumulator will be copied in register R1 XCH A, 10H This instruction will load the contents of memory location whose address is 10H to the accumulator and at the same time the contents of accumulator are transferred to the memory location whose address is 10H XCH A,@RO This instruction will load the contents of memory location pointed by register R0 of selected register bank to the accumulator and at the same time the contents of accumulator arc copied to the memory location pointed by R0 register of the selected register bank. XCHD A, @R0 This instruction exchange the lower nibble of accumulator (bit 3-0) with the lower nibble of the memory location indirectly addressed by the specified register R0/R1. 5. XCH –Exchange the contents from destination to source and source to destination

65. List of All Possible Data Transfer Instruction

66. Arithmetic Group Using Arithmetic Instructions, you can perform addition, subtraction, multiplication and division. The arithmetic instructions also include increment by one, decrement by one and a special instruction called Decimal Adjust Accumulator.

67. Arithmetic Group Mnemonic Description ADD Addition without Carry ADDC Addition with Carry SUBB Subtract with Carry INC Increment by 1 DEC Decrement by 1 MUL Multiply DIV Divide DA A Decimal Adjust the Accumulator (A Register)

68. ADD Instruction Mnemonic Example Description ADD A, Rn ADD A, R0 This instruction will add the byte in register Rn of the selected register bank with the byte in accumulator. The result is contained in the accumulator ADD A, direct ADD A, 20H This instruction will add the contents of the memory location whose direct address is specified in the instruction with the accumulator contents. The result of addition will he stored in the accumulator. ADD A, @ Ri ADD A, @ R0 This instruction will add the contents of memory location whose address is pointed by register Ri of the selected register bank with contents of the accumulator. The result of addition is stored in the accumulator ADD A, # data ADD A, # 30H This instruction will add the immediate 8 bit data with data in the accumulator. The result of addition is stored in the accumulator.

69. ADDC Instruction Mnemonics Addressing mode Example Description ADDC A, Rn Register addressing ADDC A, Rl This instruction will add the contents of accumulator with the contents of register Rn of the selected register bank and carry flag. The result of addition is stored in accumulator. ADDC A, direct Direct addressing ADDC A, 10H This instruction will add the contents of memory location whose direct address is specified in the instruction with the contents of accumulator and carry. The result of addition is stored in the accumulator. ADDC A, @Ri Register Indirect ADDC A, @R0 This instruction will add the contents of memory location pointed by register Ri of selected register bank with the accumulator and earn' flag. The result is stored in accumulator. ADDC A, #data Immediate addressing ADDC A, #40H This instruction will add the contents of accumulator with immediate data specified in the instruction along with carry.

70. SUBB Instruction Mnemonics Addressing mode Example Description SUBB A, Rn Register addressing SUBB A, Rl This instruction will subtract the contents of register Rn of the current register bank and carry flag together, from the accumulator. The result is stored in accumulator. SUBB A, direct Direct addressing SUBB A, 10H This instruction will subtract the contents of memory location whose direct address is specified in the instruction and carry flag together from the contents of accumulator. The result is stored in accumulator. SUBB A, @ Ri Register Indirect SUBB A, @R0 This instruction will subtract the contents of memory location pointed by register Ri and contents of carry flag from the accumulator. The result is stored in accumulator. SUBB A, #data Immediate addressing SUBB A. #40H This instruction will subtract the contents of data specified m the instruction and contents of carry flag from the contents of accumulator. The result is stored in accumulator.

71. INC Instruction and DEC Instruction Mnemonics Addressing mode Example Description INC Rn Register addressing INC R5 This instruction will increment the contents of register Rn of selected register bank by 1. INC direct Direct addressing INC 10H This instruction will increment the contents of memory location whose address is specified in the instruction by 1 INC @Ri Register Indirect INC, @R0 This instruction will increment the contents of memory location that is pointed by register Ri by 1. Mnemonics Addressing mode Example Description DEC Rn Register addressing DEC R5 This instruction will decrement the contents of register Rn of selected register bank by 1- DEC direct Direct addressing DEC 10H This instruction will decrement the contents of memory location whose direct address is specified in the instruction by 1. DEC @Ri Register Indirect DEC @R0 This instruction will decrement the contents of memory location that is pointed by register Ri by 1.

72. MUL AB This instruction multiplies an eight bit unsigned integer in the Accumulator and the 13 register. The low-order byte of the sixteen-bit product is left in the accumulator, and the high-order byte in B. Example: Let A = 50 H, B = A0 H after execution of MUL AB the content of register B = 32 H and register A = 00 H (as (50H) X (A0 M) = (3200H)). DIV AB This instruction divides the unsigned number in accumulator with the unsigned number in register B. Accumulator contents the quotient of the result and register B contains the remainder. Example; Let [A] = FB H and [B] = 12 H then DIV AB will result [A] = 0DH (quotient), [B] = 11 H (remainder) DAA Decimal Adjust Accumulator for addition, to adjust to BCD format(0 to 9) All no. must be in BCD before addition, only ADD and ADDC are adjusted to BCD

73. Logical Instructions The next group of instructions are the Logical Instructions, which perform logical operations like AND, OR, XOR, NOT, Rotate, Clear and Swap. Logical Instruction are performed on Bytes of data on a bit-by-bit basis. Mnemonic Description ANL Logical AND ORL Logical OR XRL Ex-OR CLR Clear Register CPL Complement the Register RL Rotate a Byte to Left RLC Rotate a Byte and Carry Bit to Left RR Rotate a Byte to Right RRC Rotate a Byte and Carry Bit to Right SWAP Exchange lower and higher nibbles in a Byte

74. Rotate

75. Bit Manipulation Instruction

76. Examples SET B 00h CPL 7Fh CLR C CLR ACC.5 ANL P0, #0Fh SETB TR1

77. Branching Instructions in 8051 A microcontroller sequentially executes instructions but in some cases, transferring this control to another block of code becomes essential. The  branching instructions in the 8051  microcontroller are responsible for performing this operation, Tasks like looping, calling delays, and conditional execution of code can be performed using these branching instructions.

78. List of Branching Instructions in 8051 Operation Mnemonics Description Call ACALL Address11 Calls a subroutine in the maximum address range of 2K bytes LCALL Address16 Calls a subroutine in the maximum address range of 64K bytes Return RET Returns the control from subroutine RETI Returns the control from an interrupt subroutine Jump AJMP Address11 Jumps to an address in a 2KB range LJMP Address16 Jumps to an address in a 64KB range SJMP Relative address Jumps to an address in a 256-byte range (0 to 127 (0-7FH) range and -1 to -128 (FFH-80H). JMP @A+DPTR [DPTR]<-[DPTR+A] JZ Relative address Jumps to address when accumulator=0 JNZ Relative address Jumps to address when accumulator!=0 CJNE A, Direct address, Relative address Jumps to relative address when accumulator=data stored at a direct address CJNE A, #Data,Relative address Jumps to relative address when accumulator=data given by the programmer CJNE @Rn, #Data,Relative address Jumps to relative address when data at memory location stored in register=data given by the programmer DJNZ Rn, Relative address Decrements value in Rn and jump to relative address till Rn!=0 DJNZ Direct address, Relative address Decrements value at memory location stored in a register and jump to relative address till memory location stored in register =0

79. Call and Return instructions in 8051 In some cases, a microcontroller needs to perform the same tasks multiple numbers of times across the program, such as generating a delay. A subroutine is responsible for performing these repetitive tasks. Using subroutines saves memory and makes the program more efficient. Instead of repeating the same few lines of code for some task you need to execute multiple times, you can just write it once and give it a label. Every time you need those lines to execute, just use the label to jump to the area where you had stored the labeled code. In essence, a subroutine is like a function, and it is placed at a different memory location then the program memory. The call instruction is used to transfer the control from the presently executing program code to the subroutine, and the return instruction is used to return the control to the program code

80. Stack and control transfer The stack of the 8051 plays a crucial role in the transfer of control when it comes to call instructions. When the call instruction executes, the program counter increments so that it points to the next instruction. The contents of the program counter are pushed into the stack (lower byte first). After this, the program counter is loaded with the starting instruction of the subroutine transferring the control. Once the RET instruction is encountered, the contents stored in the stack are popped back into the program counter, and the microcontroller starts executing the program code from where it had left it.

81. Stack and control transfer in CALL

82. LCALL Instruction Opcode Operand Description Size Execution Time Flags affected Carry Overflow Auxilary carry LCALL ADDRESS(16 BIT) Transfers the control to the specified address(64KB) 3 bytes 24 clock cycles Unaffected Unaffected Unaffected LCALL instruction can access an address of 16 bits. Due to this reason, this instruction can access any memory location in the ROM space, but this instruction takes up 3 bytes of space and can waste memory resources. To save memory, the ACALL instruction is used.

83. Example (LCALL) ORG 0000H; Directive for starting address of the program code MOV A,#50H; Moves 50H into the accumulator MOV R0,#25H; Moves 25H into the accumulator LCALL Delay; Calls delay subroutine ADD A, R0; Adds A and R0. stores the result in A ORG 1000H; Directive for starting address of delay subroutine DELAY: NOP; Performs no operation for 1 machine cycle NOP; Performs no operation for 1 machine cycle RET; Returns control to program code

84. ACALL Instruction Opcode Operand Description Size Execution Time Flags affected Carry Overflow Auxilary carry ACALL ADDRESS(11 BIT) Transfers the control to the specified address restricted to a page of 2KB 2 bytes 24 clock cycles Unaffected Unaffected Unaffected The ACALL instruction is 2 bytes in size and can be used to access any address in a 2KB page. This instruction affects only 11 bits or the program counter as compared to 16 in the case of LCALL. When this instruction is executed, the PC saves its current value on the stack, then the lower byte of the  ADDRESS  is stored in the lower byte section of PC, the remaining 3 bits of  ADDRESS  are stored in bits 0, 1, and 2 of PC. The bits 3-7 of the PC are empty.

85. Example Example ORG 0000H; Directive for starting address of the program code MOV A,#50H; Moves 50H into the accumulator MOV R0,#25H; Moves 25H into the accumulator ACALL Delay; Calls delay subroutine ADD A, R0; Adds A and R0. stores the result in A ORG 0300H; Directive for starting address of delay subroutine DELAY: NOP; Performs no operation for 1 machine cycle NOP; Performs no operation for 1 machine cycle RET; Returns control to program code

86. RET Instruction Opcode Operand Description Size Execution Time Flags affected Carry Overflow Auxilary carry RET NONE Returns control to the program code 1 byte 24 clock cycles Unaffected Unaffected Unaffected The RETI instruction is used to return from interrupt subroutines and works in the same way as the RET instruction if used outside a subroutine. When used inside a subroutine, RETI first enables interrupts of equal and lower priorities to the interrupt that it is used in. The program execution continues at the address that is calculated by popping the topmost 2 bytes off the stack. The most-significant-byte is popped off the stack first, followed by the least-significant-byte.

87. Jumps in 8051 The jump instruction is also used to transfer control in the 8051 microcontroller. But unlike a Call instruction, it does not call a subroutine and jumps to an address in the same program memory. Jumps in the 8051 microcontroller are used to perform looping and conditional execution of program code. Jumps in the 8051 are of two types

88. Unconditional jumps- as the name suggests these jumps do not evaluate a condition to transfer the control to another address. Conditional jumps- these jumps evaluate a particular condition to transfer the control to another address in the program code. All conditional jumps are short jumps.

89. Unconditional jumps Opcode Operand Description Size Execution Time Flags affected Carry Overflow Auxilary carry LJMP ADDRESS(16 BITS) Transfers control within program code. The maximum range of this jump is 64KB 3 bytes 24 clock cycles Unaffected Unaffected Unaffected AJMP ADDRESS(11 BITS) Transfers control within program code. The maximum range of this jump is 2KB 2 bytes 24 clock cycles Unaffected Unaffected Unaffected SJMP Relative Address Uses the given address as an offset to the executing address and transfers the control to the new address. The maximum range of 256 bytes 2 bytes 24 clock cycles Unaffected Unaffected Unaffected

90. Example MOV TMOD #0110000B ; sets counter1, mode 2,C/T=1(counts external pulses) MOV TH1, #0 ; clears TH1 register AGAIN:SETB P3.5;sets P3.5 as input port (all ports are configured as output ports by default) BACK: MOV A,TL1; sends the value in TL1 to accumulator MOV P2, A ; sends values to port 2 JNB TF1,BACK ; checks overflow condition CLR TR1; stops the counter CLR TF1; makes TF=0 SJMP AGAIN; performs tasks infinitely

91. Conditional jumps in 8051 Opcode Operand Description Size Execution Time Flags affected Carry Overflow Auxilary carry JZ Relative Address Uses the given address as an offset to the executing address and transfers the control to the new address if the value in the accumulator=0. The maximum range of 256 bytes 2 bytes 24 clock cycles Unaffected Unaffected Unaffected JNZ Relative Address Uses the given address as an offset to the executing address and transfers the control to the new address if the value in the accumulator !=0. The maximum range of 256 bytes 2 bytes 24 clock cycles Unaffected Unaffected Unaffected

92. Conditional jumps in 8051 Opcode Operand Description Size Execution Time Flags affected Carry Overflow Auxilary carry CJNE A, Direct address, Relative address Compares the data stored in the accumulator with the data stored at the direct address. If the values are the same, then the control is transferred to the relative address 3 bytes 24 clock cycles Unaffected Unaffected Unaffected A, #Data,Relative address Compares the data stored in the accumulator with the data given by the programmer. If the values are the same, then the control is transferred to the relative address 3 bytes 24 clock cycles Unaffected Unaffected Unaffected @Rn, #Data,Relative address Compares the data stored at the address stored in the register with the data given by the programmer. If the values are the same, then the control is transferred to the relative address 3 bytes 24 clock cycles Unaffected Unaffected Unaffected

93. Conditional jumps in 8051 Opcode Operand Description Size Execution Time Flags affected Carry Overflow Auxilary carry DJNZ Rn, Relative address This instruction is used for looping in 8051. It decrements the value stored in Rn and jumps to the relative address till the value in the register!=0 2 bytes 24 clock cycles Unaffected Unaffected Unaffected Direct address, Relative address This instruction is used for looping in 8051. It decrements the value stored at the given address and jumps to the relative address till the value in the address!=0 3 bytes 24 clock cycles Unaffected Unaffected Unaffected

94. Example The program given below adds 3 ten times to the accumulator. It uses the DJNZ instruction for looping. MOV A,#0; clears the accumulator MOV R2,#10; moves 10 into r2 which cats as a counter AGAIN: ADD A,#03; adds 3 into the accumulator till r2!=0 DJNZ R2,AGAIN; decrements value in r2 and jumps to again label till value !=0 MOV R5,A; Moves the result into R5

95. ADDRESSING MODES OF 8051

96. DEFINITION The CPU can access the data in various ways. The data could be in a register, or in memory or be provided as an immediate value. The method of specifying the data to be operated by the instruction is called addressing. The different ways that a microprocessor can access data are referred to as addressing modes.

97. CLASSIFICATION There are 5 addressing modes supported by 8051 microcontroller. 1.Immediate 2.Register 3.Direct 4. Register indirect 5. Indexed

98. IMMEDIATE ADDRESSING In this addressing mode the source operand is constant. In immediate addressing mode, when the instruction is assembled, the operand comes immediately after the op-code. The immediate data must be preceded by ‘#’ sign . This addressing mode can be used to load information into any of the register, including the DPTR.

99. EXAMPLE… MOV A,#25H - Load 25H in to A MOV R4,#62 - Load the decimal value 62 into R4. MOV DPTR,#4532H – Load DPTR=4532H MOV DPH,#45H MOV DPL,#32H

100. CONTINUE… This addressing mode can be used to send data to 8051 ports . MOV P1, #55 H

101. REGISTER ADDRESSING Register addressing mode involves the use of registers to hold the data to be manipulated. In this addressing, registers (R0 to R7 from the selected register bank), accumulator, B-register and DPTR are used.

102. CONTINUE… The source and destination registers should be of same size. The data can be moved from A register to Rn register . But movement of data between Rn registers are not allowed.

103. EXAMPLE… MOV A,R0 - copy the contents of R0 in to A. MOV R2,A - copy the contents of A in to R 2 . ADD A,R5 - add the content of R5 to content of A. MOV R7,DPL - copy the contents of DPL in to R 7 . MOV R4,R3 – Invalid instruction.

104. DIRECT ADDRESSING In direct addressing mode, the data is in a RAM memory location whose address is known, and this address is given as a part of the instruction . Contrast this with the immediate addressing mode in which the operand itself is provided with the instruction. The sign “#” distinguishes between the two addressing modes.

105. CONTINUE… This addressing mode is limited to accessing RAM locations (00 – FF H) and registers located inside the 8051. Only direct addressing mode is allowed for pushing onto the stack . Therefore an instruction ‘PUSH A’ is invalid. Pushing the accumulator onto the stack must be coded as ‘PUSH 0E0 H’ . (Address of A register is 0E0)

106. EXAMPLE… MOV R0,40H - save content of RAM location 40h into R0. M O V 5 6 H , A - save content of A in RAM location 56H. MOV A, 02 – is same as MOV A,R2 – which means copy R2 into A

107. REGISTER INDIRECT ADDRESSING In the register indirect addressing mode, a register is used as a pointer to the data. If the data is inside the CPU, only register R0 and R1 are used for this purpose. In other words,R2-R7 cannot be used to hold the address of an operand located in RAM when using this addressing mode.

108. CONTINUE… When R0 and R1 are used as pointers , that is, when they hold the address of RAM locations , they must be preceded by the “@” sign . The advantage of using this addressing mode is that, it makes accessing data dynamic rather than static as in the case of direct addressing mode. The registers R0 and R1 usage is limited to accessing any information in the internal RAM.(30 H – 7F H)

109. EXAMPLE… MOV A,@R0 - move contents of RAM location whose address is held by R0 into A. MOV @R1,B - move contents of B RAM location whose address is held by R1

110. INDEXED ADDRESSING Indexed addressing mode is widely used in accessing data elements of look-up table entries located in the program ROM space of the 8051. The instruction used for this purpose is “MOVC A, @A+DPTR”.

111. CONTINUE… The 16-bit register DPTR and register “A” are used to form the data element stored in on-chip ROM. Because the data elements are stored in the program space ROM of the 8051,it uses the instruction MOVC instead of MOV. The “C” means code .

112. EXAMPLE… “ MOVC A, @A+DPTR ” I n t h i s i n st ru c t i o n t h e c o n t e n t o f A ar e added to the 16-bit register DPTR to form the 16-bit address of the needed data.