oLecture09-Internal Organization of CPU.pptx

IsuriUmayangana 4 views 122 slides Mar 02, 2025
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About This Presentation

internal structure of cpu


Slide Content

Week 2 –Internal Organization of CPU Computer Architecture

“The brain of the computer” that takes care of all the computations and processes. Central Processing Unit

Processing In this chapter, we will focus on the central processing unit (CPU) in more detail. Input Processing Output Secondary Storage

CPU/Processor The main functions of the processor Control the sequence of instructions Give command to all parts of the computer system Carry out processing

The CPU The CPU interacts(affects) closely with memory (primary storage). CPU Memory Memory, however, is not part of the CPU.

Parts of the CPU The CPU consists of a variety of parts including: Control Unit ALU Registers Control unit Arithmetic/logic unit (ALU) Registers

CPU Architecture CPU/Processor 10 11 12 13 14 … … 100 101 102 103 104 Control Unit ALU Registers Accumulator MAR MDR PC Data Memory 0000001011 0001110000 … … … 1100101010 Ins truction IR …

The Control unit Directs the other parts of the computer system to execute(perform) stored program instructions. The control unit communicates with the ALU and memory. Control Unit Control Unit Directs and manages the activities of the processor.

Control Unit All computer operations are controlled by the control unit. Reads & Interprets Program Instructions Directs the Operation of the Processor Controls the flow of programs and data into and out of memory The timing signals that govern the I/O transfers are also generated by the control unit. Control unit is usually distributed throughout the machine instead of standing alone. Operations of a computer: Accept information in the form of programs and data through an input unit and store it in the memory Fetch the information stored in the memory, under program control, into an ALU, where the information is processed Output the processed information through an output unit Control all activities inside the machine through a control unit

The Arithmetic & Logical Unit… performs mathematical operations as well as logical operations. ALU Arithmetic and Logic Unit. Performs Arithmetic and Logical operations.(+, - , x, /, >,<, =)

Mathematical Operations The ALU can perform four kinds of mathematical calculations: addition subtraction multiplication division

Logical Operations The ALU can perform logical operations. Logical operations can test for these conditions(position): Equal- to (=) Less- than (<) Greater- than (>)

Registers are temporary storage areas for data or instructions. Registers Data held temporarily in registers can be accessed at greater speeds than data stored in memory.

Registers Primary roles Hold data for currently executing program that is needed quickly or frequently (general- purpose registers) Store information about currently executing program and about status of CPU (special- purpose registers)

Registers PC- program counter AC- Accumulator MAR –Memory Address Register MDR- Memory Data Register CIR /IR– Current Instruction Register Stack pointer Status Register/ Flag Register AX (AH,AL) BX( BH, BL) Etc.

Program Counter (PC) A special register, determines the location in memory (memory address) from which the next instruction will be fetched. Usually, the counter is just incremented to the next value. Branches (if statements, while statements, calls on methods, etc.) change the program counter to say where to find the next instruction. Move PC value to the MAR when instruction fetch

Accumulator The Accumulator is an internal CPU register used as the default location to store any calculations performed by the arithmetic and logic unit . is a special purpose register that is there in the ALU.

MAR Registers The CPU uses the two registers MAR and MDR to access the main memory. Reading data from memory Writing data to memory MAR Contains the memory address of the current memory location accessed by the CPU.

MDR/MBR MDR ( also known as the memory buffer register or data buffer ) Contains the data that was read or that is going to be written to the memory.

Instruction Register(IR) Contains a copy of the current instruction being executed.

Memory (Primary Storage) Memory is the part of the computer that stores data and program instructions for processing. CPU Memory

Memory CPU Memory is also referred to as RAM (random- access memory). RAM is temporary , finite , and more expensive than secondary storage.

Information Handled by a Computer Instructions/machine instructions Govern the transfer of information within a computer as well as between the computer and its I/O devices Specify the arithmetic and logic operations to be performed Program Data Used as operands by the instructions Source program

Instructions Activity in a computer is governed by instructions. To perform a task, an appropriate program consisting of a list of instructions is stored in the memory. Individual instructions are brought from the memory into the processor, which executes the specified operations. Data to be used as operands are also stored in the memory. machine code of an instruction set consists of two separate fields: Opcode Operand(s)

A T yp i cal Instruction Add LOCA, R0 Add the operand at memory location LOCA to the operand in a register R0 in the processor. Place the sum into register R0. The original contents of LOCA are preserved. The original contents of R0 is overwritten. Instruction is fetched from the memory into the processor – the operand at LOCA is fetched and added to the contents of R0 – the resulting sum is stored in register R0.

Separate Memory Access and ALU Operation Load LOCA, R1 Add R1, R0 Whose contents will be overwritten?

Memory Access Three access modes Immediate Access - Actual Data Value MOV AL, #6 Direct Access - Memory address where data (operand) resides MOV AL, 5 Indirect Access - Memory address where memory address of data (operand) resides MOV AL, @5

Instruction Set Example LOAD MOVE INC ADD MUL JMP etc

Fetch Execute Cycle

Fetch Execute Cycle The fetch- execute cycle of the processor refers to the sequence that is completed for each instruction in a program. Fetch Sequence Move the value in the program counter to the memory address register Send the value in the memory address register to memory via the address bus Return the value stored in memory via the data bus Store the value in the memory data register Copy the instruction from the memory address register to the instruction register Increment the program counter. The instruction in the instruction register is then Decoded Execute Sequence The instruction is Executed

Connection Between the Processor and the Memory

T y p i cal Operating Steps Programs reside in the memory through input devices PC is set to point to the first instruction The contents of PC are transferred to MAR A Read signal is sent to the memory The first instruction is read out and loaded into MDR The contents of MDR are transferred to IR Decode and execute the instruction

T y p i cal Operating Steps (Cont’) Get operands for ALU General- purpose register Memory (address to MAR – Read – MDR to ALU) Perform operation in ALU Store the result back To general- purpose register To memory (address to MAR, result to MDR – Write) During the execution, PC is incremented to the next instruction

Executing Program Instructions Before the CPU can execute a program, program instructions and data must be placed into memory from an input device or storage device. Input Processing Secondary Storage

Fetch Execute Cycle Once the necessary data and instructions are in memory, the CPU performs the following steps for each instruction: Fetching- Calls an instruction from memory Decoding- Figures out what the instruction is trying to do Executing- Does the decoded instruction (e.g. Add 2+2) Storing- Puts the answer(4) into memory for use by another instruction

Control Unit ALU Registers Fetching Instruction The control unit fetches (gets) the instruction from memory. Memory

Decoding(solve) Instructions The control unit decodes the instruction and directs that the necessary data be moved from memory to the ALU. Control Unit ALU Registers Memory

Executing Arithmetic/Logic Operations The ALU performs the arithmetic or logical operation on the data. Control Unit ALU Registers Memory

Storing Results The ALU stores the result of its operation on the data in memory or in a register. Control Unit ALU Registers Memory

Executing Program Instructions Eventually, the control unit sends the results in memory to an ou t put device or secondary storage. Output Secondary Storage Control Unit ALU Registers Memory

Interrupt Normal execution of programs may be preempted if some device requires urgent servicing. The normal execution of the current program must be interrupted – the device raises an interrupt signal. Interrupt- service routine Current system information backup and restore (PC, general- purpose registers, control information, specific information)

Bus Structures There are many ways to connect different parts inside a computer together. A group of lines that serves as a connecting path for several devices is called a bus . Address Data control

Bus Structure Single- bus

Computer Speed and Power Speed and power are determined by: Microprocessor speed Bus lines Cache

Microprocessor Speeds Microprocessor speeds can be measured in a variety of ways: Megahertz MIPS Megaflops Fsb

Speed Issue Different devices have different transfer/operate speed. If the speed of bus is bounded by the slowest device connected to it, the efficiency will be very low. How to solve this? A common approach – use buffers.

Instruction Time The time it takes to fetch an instruction and decode it is called instruction time. Memory Control Unit + Memory Control Unit ALU

Execution Time The time it takes to execute an ALU operation and then store the result is called execution(perform) time. + ALU Memory ALU Registers

Control Unit Memory Locations and Addresses The control unit can find data and instructions because each location in memory has an address . Memory

Processor Clock Cycle Clock, clock cycle, and clock rate A Crystal Oscillator on the Motherboard The execution of each instruction is divided into several steps, each of which completes in one clock cycle. 🞄 Hertz – cycles per second 🞄 Measured in MHz or GHz 🞄 Megahertz = 1,000,000 cycles/sec 🞄 Gigahertz = 1,000,000,000 cycles/sec 🞄 One clock cycle is calculated by dividing 1 by the MHz or GHz Example: (800 MHz CPU) 1/800,000,000 =0.00000000125 or 1.25 nanoseconds The shorter the clock cycle the faster the processor

Two types: Socket type Slot type. Pin arrangement in the Socket type processor is known as Pin Grid Array (PGA). Slot type processor is also known as Single Edged Contact Cartridge (SECC). Processor T yp e s

Types of Processors PGA SECC

Processor Manufacturers Intel (Integrated Electronics) AMD (Advanced Micro Devices) VIA Cyrix TRANSMETA MOTOROLA

Intel

AMD

MOTOROLA & IBM

Processors - Intel Brand Pentium I Pentium Pro Pentium MMX Pentium II Pentium III Pentium IV Pentium D Celeron Centrino M Core 2 Duo Core 2 Extreme Core 2 Quad Core i3 Core i5

Intel’s Core i7 Today latest processors…….

Processors –AMD Brand Athlon Duron Sempron Turion

Multicore New modern processors are launched How to make a use of new technologies? Dual- core CPU Quad- core CPU 61

Multicore Dual- Core A dual- core CPU combines two independent processors and their respective caches and cache controllers onto a single silicon chip

EXTRA…

Fetch Decode Execute Cycle The computer repeatedly performs the following cycle of event; Fetch an instruction from memory Fetch any data required by the instruction from memory Execute the instruction (process the data) Store results in memory Go back to step (a)

Some important properties Data and program are stored in the same space (memory) Thus, the machine can alter its own program or data – this is the property that makes computer viruses possible Conditional go to other points in the program

Instruction fetch Move PC value to MAR Activate memory to perform a fetch opera t i on . T o perform the fetch operation memory receive the address from MAR via the address bus, extracts a copy of contents of specified memory location, and transmits the extracted value to the MDR via data bus Update the value of PC,The PC value is incremented by 1 so that it addresses the next instruction in sequence. Move the fetched instruction from the MDR to IR

Data fetch (for those instructions that require one) The address portion of the instruction is placed on the MAR (this time from the instruction register IR), then on the address bus. The contents at the address specified on the address bus are copied to the data bus, then the MDR Where the contents of the data go from here depends on the opcode of the instruction.

Fetch Execute Cycle PC - Program Counter IR - Instruction Register The control unit uses these two registers during the fetch execute cycle.

PC Register PC - Sequence Control Register A special register, determines the location in memory from which the next instruction will be fetched. Usually, the counter is just incremented to the next value. Branches (if statements, while statements, calls on methods, etc.) change the program counter to say where to find the next instruction

IR Register IR - Current Instruction Register Contains a copy of the current instruction being executed. This is connected to special decoder IR circuits in the Control Unit and is used to decode and determine the type of instruction.

Fetch Execute cycle The control unit fetches instruction given in the register PC from the memory making use of the MAR and MDR registers. A copy of the instruction is placed in the IR register. The PC register is incremented to address of the next instruction. The control unit interprets the instruction given in the IR and causes the instruction to be executed by sending command signals to the appropriate devices, registers etc.

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Registers in a PC … AX,BX general purpose registers CX – counter DS, CS data segment, Code segment

Execution Cycle Animated Explanation This web site provides better explanation for execution cycle via animation Click http://www.eastaughs.fsnet.co.uk/cpu/exec ution- fetch.htm link to open URL.

Fetch Execute Cycle- Simulation T ool Click http://homepages.feis.herts.ac.uk/~msc_ic e/fe2/fetch_execute.htm ( http://homepages.feis.herts.ac.uk/~msc_ice /fe2/# )