PCI & ISA bus

1. G.H.RAISONI COLLEGE OF ENGINEERING ( AN AUTONOMOUS INSTITUTE UNDER UGC ACT 1956 ) PCI & ISA bus Submitted by Sushant burde (ETRX B-48) Tarun dhiraj (CSE B-56)

2. Block diagram of a PCI bus system

3. Latest Generation of PCI Chipsets

4. The PC I read transfer burst

5. The PC I write transfer burst.

6. The PCI Express Bus Point to point protocol x1, x2, x4, x8, x12, x16 or x32 point-to-point Link Differential Signaling

7. PCI Express Topology

8. ISA BUS In 1982 w hen ISA BUS appeared on the first PC the 8-bi t ISA bus ran at a modest 4.77 MHZ – the same speed as Intel 8088 . ISA BUS is extremely slow by today's standards and not suited to the use of a graphical operating system like Windows. In 1984 the IBM AT was introduced using the Intel 80286; at this time the bus was doubled to 16 bits (the 80286's data bus width) and increased to 8 MHz (the maximum speed of the original AT, which came in 6 MHz and 8 MHz versions and 24 address lines ).

9. ISA BUS Bus width 8 - bit Compatible with 8 bit ISA Pins 62 Power +5 V, -5 V, +12 V, -12 V Clock 4.7727266 MHz Bus width 16 - bit Compatible with 16 bit ISA Pins 98 Power +5 V, -5 V, +12 V, -12 V Clock 8.333333 MHz 8-bit ISA BUS 16-bit ISA BUS

10. ISA BUS Original 8 bit ISA connectors Additional connections converts to 16 bit ISA VESA connectors

11. Describing the Read operation of the ISA CPU sends out a high on the ALE signal, then sends out the A0-A19 lines. On the address of the target port to be read will be latched. Then the BUS takes the -IOR signal to a low level. So that the addressed device will take a data byte to the D0-D7 data bus. The microprocessor will read then the data bus and take the -IOR signal to a high again.

12. ISA BUS A ddress bus(32 bit) Data bus (32 bit) A to A 31 D to D 31 RD WR IO/M Control bus I/O bus (16 bit data) Memory Int e l 80386DX CPU

13. Elimination of ISA Bus The ISA bus is limited to 24 bits of address. 2^24 = 16 MBytes. It means that an ISA card that uses DMA cannot physically access memory beyond 16 MBytes of RAM. This is a limitation of the ISA bus. Motherboard gets 32-bit data from ISA BUS at two times. Meanwhile at this time ISA BUS declares “wait state” to the motherboard. Therefore ISA BUS may reduce System Performance.