PLL_report for application in design RF system.pdf

PLL

1. 11
HCM, 10/09/2025
PLL

2. 22© 2025 RFICSLab
Work plan
2
Task Results
Modeling
Model
PLL
Model Charge pump
Model PFD
Model full PLL
Reseach
Re-
search
SSPLL
Work plan this week
Work plan next week
Task Process
Modeling system Model circuits
-

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1.Model PLL
2.Research SSPLL
Content

4. 44© 2025 RFICSLab
1. Model PLL
Model
PFD
DFF

5. 55© 2025 RFICSLab
1. Model PLL
Model charge pump
Pulse width of I_CP out when switch turn on/off equal to switching
period of UP/DN signal

6. 66© 2025 RFICSLab
1. Model PLL
Testbench PFD&CP
Testbench PFD&CP&LPF

7. 77© 2025 RFICSLab
VC cannot reach stable
Model PLL
1. Model PLL
Loop
bandwidth
Charge
pump
Phase
margin
KVCO N=fVCO/fREF
??????
�????????????=1536??????????????????;??????
??????��=32??????????????????;??????
??????��=384??????????????????
60kHz 30uA 50 80MHz/V 48
C1 R2 C2 R3 C3
6.36E-11 7.87E+03 9.26E-10 9.93E+04 4.71E-12

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10. 1010
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