processes involved in the preparation of semiconductor wafers

processes involved in the preparation of semiconductor wafers

1. Introduction to Fabrication of Electronic Components/Devices: BY: Dr. Prashant Kumar Mishra Assistant Professor Galgotias University SEMICONDUCTOR AND OPTOELECTRONIC DEVICES

2. COURSE: "C1UD124B SEMICONDUCTOR AND OPTOELECTRONIC DEVICES" Theory: - Introduction to Fabrication of Electronic Components/Devices: Semiconductor wafers, Doping, Diffusion, Annealing, Metallization, Masking, Bottom-up approach vs Top-down approach, Lithography/Screen printing. B asic Quantum Mechanics: Overview of Blackbody radiation, Planck hypothesis, and Photoelectric effect; Postulates of quantum mechanics Matter Waves, Uncertainty Principle, Wave-function, Schrodinger equation, Solution of Schrodinger equation for particle in a box, Quantum tunneling and its examples, Scanning tunneling microscope, Quantum confinement at nano scale and concepts of quantum dot, quantum wire & quantum well. Physics of Basic Semiconductors devices: Overview of semiconductor Physics, Qualitative description of formation of energy bands in solids and band gap, Density of states & Fermi energy in intrinsic semiconductor, E-K diagram, and Effective mass & concept of hole. Doped semiconductors, Direct-indirect band gap semiconductors, Temperature dependence on electron and hole concentration, Concept of mobility, Hall effect, PN junction diode, Zener diode. Physics of Opto-electronic Components/Devices: Interaction of radiation with Matters, absorption, Spontaneous and stimulated emission of radiation Principle of Lasers, three level and four level laser, Gas lasers (He-Ne Laser), Recombination /generation of electron- hole, Semiconductor laser (laser diode); Solar cell, Light Emitting Diode (LED), Organic Light `Emitting Diode (OLED), Semiconductor sensors i.e., Photodiode sensor, IR sensor; Fiber Optics .

3. Metals, Semiconductors and Insulators

4. Metals, Semiconductors and Insulators Classification

5. At absolute zero Kelvin temperature:  At this temperature, the  covalent bonds  are very strong, there are no free electrons, and the semiconductor behaves as a perfect insulator. Above absolute temperature:  With an increase in temperature, a few valence electrons jump into the conduction band, and hence, it behaves like a poor conductor.

6. For an intrinsic semiconductor, at finite temperature, the probability of electrons existing in a conduction band decreases exponentially with an increasing band gap ( E g ). n = n e -Eg/2.Kb.T Where, Eg = Energy band gap K b  =  Boltzmann’s constants Extrinsic Semiconductor The conductivity of semiconductors can be greatly improved by introducing a small number of suitable replacement atoms called IMPURITIES. The process of adding impurity atoms to the pure semiconductor is called DOPING. Usually, only 1 atom in 10 7  is replaced by a dopant atom in the doped semiconductor. An  extrinsic semiconductor  can be further classified into types: N-type Semiconductor P-type Semiconductor

7. Applications of Semiconductors

8. Czochralski technique: Then, after re-melting of a small portion of the dipped seed, the seed is slowly withdrawn from the melt (often under rotation) and the melt crystallizes at the interface of the seed by forming a new crystal portion. During the further growth process, the shape of the crystal, especially the diameter, is controlled by carefully adjusting the heating power, the pulling rate, and the  rotation rate  of the crystal. Therefore, an automatic diameter control is generally applied. This diameter control is based, either on the control of the meniscus shape (e.g., for silicon) or on the weighing of the crystal (e.g., for GaAs, InP ) or of the melt (for oxides).

9. The monocrystalline ingots manufactured by the CZ process go through five carefully controlled steps to become polished wafers. Slicing The circumference of the monocrystalline ingot is ground down to a uniform diameter. Based on the resistivity desired by the customer, the ingot is then cut into slices of around 1mm thickness, using an inner-diameter saw or wire saw, to form the wafers.

10. 2. Lapping The sliced wafers are polished by alumina abrasive in a lapping machine to the desired thickness, while improving the surface parallelism.

11. 3. Etching Mechanical damage to the wafer surface resulting from the earlier steps is removed by chemical etching. 4. Polishing The wafer surfaces are made perfectly flat and given a mirror finish by means of mechano-chemical polishing using colloidal silica.

12. 5. Cleaning and inspection After cleaning, stringent inspections are performed, and the SUMCO polished wafer is completed. The exceptionally high quality of the polished wafers manufactured by SUMCO ensures they are favored by customers all over the world.

13. Wafers What is a Wafer? A wafer is a substrate or a thin slice of semiconductor material that’s used in fabricating integrated circuits. Since wafers function as the base on which integrated circuits are embedded, they’re considered the heart of electronic devices. Moreover, various substances are diffused and deposited into the wafers to construct microcircuits. In most cases, raw silicon is turned into a singular crystal substrate through a series of steps that aim to eliminate impurities such as  iron , aluminum, and boron. When samples of a single crystal orientation are produced via crystal growing, these are then sliced into thin portions called wafers.

14. What is a Chip? Also referred to as an  Integrated Circuit (IC),  a chip is a small electronic package of pathways, circuits, and transistors that work together to carry out a specific task – or even a series of tasks. This assembly of electronic components serves as the backbone for microprocessors, automobiles, audio and video equipment, and other modern electronic devices.  As previously mentioned, chips are embedded in the wafer to provide logic circuitry.

15. Silicon wafer is used in electronics because it is suited for mass manufacturing and is also a cost-effective option because of their abundance on earth.  Silicon, Si  - the most common semiconductor, single crystal Si can be processed into wafers up to 450 mm in diameter. Wafers are thin (thickness depends on wafer diameter, but is typically less than 1 mm), circular slice of single-crystal semiconductor material cut from the ingot of single crystal semiconductor. All lattice planes and lattice directions are described by a mathematical description known as a Miller Index. In the cubic lattice system, the direction [ hkl ] defines a vector direction normal to surface of a particular plane or facet. A crystal can always be divided into a fundamental shape with a characteristic shape, volume, and contents.

16. A particular application requires a wafer to have very specific properties. 1. Size: Die count 2. Orientation 3. Dopants Why are Wafer Flats used? Any plant can make wafers with any flat cut out of them that they want. A silicon wafer flat's purpose is to help the end user see the dopant type and orientation of the wafer. This function helps avoid mistakes when using the wafer in equipment.

17. Important Methods

18. Diffusion Mechanisms: Substitutional Interstitial Diffusion: Diffusion is the movement of impurity atoms in a semiconductor material at high temperatures. The driving force of diffusion is the concentration gradient. There is a wide range of diffusivities for the various dopant species, which depend on how easy the respective dopant impurity can move through the material. Diffusion is applied to anneal the crystal defects after ion implantation or to introduce dopant atoms into silicon from a chemical vapor source. Diffusion

19. Diffusion and Ion Implantation Process

20. Annealing A nnealing is to heat a material to an appropriate temperature for a certain period, and then cooling it down slowly is called annealing. Annealing is used mostly to reduce the hardness of the materials cold deformation processing. Elimination of the internal stresses. Process hardening and to prevent deformation and cracking. Improve formability, recrystallize cold-worked metals Decrease electrical resistance and improving the magnetic properties Increase toughness

21. Metallization The process of metallization which connects semiconductor devices using metals such as aluminium and copper. As these interconnections provide power and enable the chip’s operation, they highlight the significance of metallization in semiconductor manufacturing. Metallization is often accomplished with a vacuum deposition technique. The most common deposition processes include: filament evaporation, electron-beam evaporation, flash evaporation, induction evaporation, and sputtering. Filament evaporation , also called resistive evaporation, is the simplest method.

22. A photomask is basically a “master template” of an IC design. A mask comes in different sizes. A common size is 6- x 6-inch. A basic and simple mask consists of a quartz or glass substrate. The photomask is coated with an opaque film. More complex masks use other materials. At one time, the term “photomask” was used to describe a “master template” used with a 1X stepper or lithography system. The term “ reticle ” was used to described a “master template” used in a 2X, 4X or 5X reduction stepper. Today, the terms “photomask” and “reticle” are used interchangeably. They are basically the same thing. Photomask and Masking Making masks To mask a photomask, the first step is to create a substrate or mask blank. A basic blank consists of a quartz or glass substrate, which is coated with an opaque film. At a photomask manufacturer, the materials on the blank are patterned using an e-beam mask writer. Then, the pattern is etched and cleaned, creating a photomask. The mask is then inspected for defects. Finally, a  pellicle , a thin membrane, is mounted on top of the mask, which protects the mask from falling particles or contamination. The mask with the pellicle on top is then shipped to the fab.

23. Overview of the Lithography Process Optical lithography is a photographic process by which a light-sensitive polymer, called a photoresist, is exposed and developed to form 3D relief images on the substrate . In general, the ideal photoresist image has the exact shape of the designed or intended pattern in the plane of the substrate, with vertical walls through the thickness of the resist. Thus, the final resist pattern is binary: parts of the substrate are covered with resist while other parts are completely uncovered. This binary pattern is needed for pattern transfer since the parts of the substrate covered with resist will be protected from etching, ion implantation, or other pattern transfer mechanism.

24. Top down and Bottom up approach There are two approaches for the manufacturing of nanomaterials: The “top-down” approach, which involves the breaking down of large pieces of material to generate the required nanostructures from them. The “bottom-up” approach, which implies assembling single atoms and molecules into larger nanostructures.

25. Thanks