Stick diagram and layout diagram ppt.pptx

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1. Stick Diagram and Layout Diagram

2. Stick Diagrams stick diagrams are a means of capturing topography and layer information using simple diagrams. Stick diagrams convey layer information through colour codes (or monochrome encoding). Acts as an interface between symbolic circuit and the actual layout.

3. Stick Diagrams Gnd V DD X X X X V DD Gnd Stick Diagram

4. Stick Diagrams Gnd V DD X X X X V DD Gnd

5. Stick Diagrams It show s all components/ vias . It shows relative placement of components. Goes one step closer to the layout . Helps plan the layout and routing .

6. Stick Diagrams Does not show Exact placement of components Transistor sizes Wire lengths, wire widths, tub boundaries. Any other low level details such as parasitics ..

7. Stick Diagrams – Notations Metal 1 poly ndiff pdiff Can also draw in shades of gray/line style. Similarly for contacts, via, tub etc..

8. Stick Diagrams – Some rules Rule 1. When two or more ‘sticks’ of the same type cross or touch each other that represents electrical contact.

9. Stick Diagrams – Some rules Rule 2. When two or more ‘sticks’ of different type cross or touch each other there is no electrical contact. ( If electrical contact is needed we have to show the connection explicitly).

10. Stick Diagrams – Some rules Rule 3. When a poly crosses diffusion it represents a transistor. Note: If a contact is shown then it is not a transistor.

11. Stick Diagrams – Some rules Rule 4. In CMOS a demarcation line is drawn to avoid touching of p-diff with n-diff. All pMOS must lie on one side of the line and all nMOS will have to be on the other side.

12. How to draw Stick Diagrams Stick diagram of an Inverter

13. Stick diagram of NOR gate

14. Power Ground B C Out A

15. Layout Diagrams It specifies the geometric arrangement of various components and the interconnections between them. A layout diagram is a symbolic design that uses rectangles to represent layers. Each rectangle represents a layer, and can be color-coded or have striped patterns. It can be used to estimate the total layout area of the circuit.

16. Layout Diagrams N+ N+ Layout diagram of NMOS

17. Layout Diagrams Layout diagrams provide a precise, detailed representation of the circuit. Designers can optimize the layout for space, performance, and power consumption. Proper layout design can minimize parasitic capacitances and resistances.

18. Layout Diagram Creating and optimizing layout diagrams can be complex and time-consuming. As technology nodes shrink, the complexity of the layout design increases.

19. Layout Diagram - Lambda rules Lambda rules, also known as design rules, are a set of guidelines used in CMOS layout design to ensure manufacturability and reliability of integrated circuits. Lambda (λ) is a scalable unit that simplifies the design process by providing a uniform way to express these dimensions. Lambda (λ) is given by, λ=L(channel length)\2

20. Layout Diagram - Lambda rules Carver Mead and Lynn Conway provided these rules. According this rule line widths, separations and extensions are expressed in terms of λ .

21. Lambda Rules n-diffusion p-diffusion Minimum width Minimum separation (where specified) Polysilicon

22. Lambda Rules Minimum width Minimum separation (where specified) Metal 2 Metal 1

23. Lambda Rules minimum minimum Transistor Design Rules (Metal 1 to Polysilicon or to Diffusion)

24. X X X X V DD Gnd Gnd V DD Layout diagram of an Inverter

25. V DD Gnd X X B A X X X Y s s s s d d d d Layout diagram of Nand gate

26. C D A E B g GND Vdd Layout diagram for the given equation