Mode 0:
Max value =(1FFF)h =(8191)d
(COUNT= MAX VALUE- INITIAL VALUE)
Time Delay = COUNTX (12/ Crystal Freq.)
Time Delay = 8191 X (12/ Crystal Freq.)
( If Crystal Freq. = 11.0952 Mhz)
Time Delay = 8191 X (12/ 11.0952 x 10^6.)
Time Delay =8.8 m sec
Mode 1:
Max value =(FFFF)h =(65535)d
(COUNT= MAX VALUE-INITIAL VALUE)
Time Delay = COUNTX (12/ Crystal Freq.)
Time Delay = 65535 X (12/ Crystal Freq.)
( If Crystal Freq. = 11.0592 Mhz)
Time Delay = 65535 X (12/ 11.0592 x 10^6.)
Time Delay =0.071 sec
Mode 2/3:
Max value =(FF)h =(255)d
(COUNT= MAX VALUE-INITIAL VALUE)
Time Delay = COUNTX (12/ Crystal Freq.)
Time Delay = 255 X (12/ Crystal Freq.)
( If Crystal Freq. = 11.0592 Mhz)
Time Delay = 255 X (12/ 11.0952 x 10^6.)
Time Delay =0.2 m sec
Max value =(FF)h =(255)d
(COUNT= MAX VALUE-INITIAL VALUE)
Time Delay = COUNTX (12/ Crystal Freq.)
Time Delay =( MAX VALUE-INITIAL VALUE)X (12 / Crystal Freq.)
Td = (MV-IV) * (12/ Fc)
Td *(Fc/12) = MV- IV
IV = MV - { Td *(Fc/12) }
Initial Value = Max.Value - { time delay * (crystal Freq/12)
(IV) dec=(IV)hex
Initial value in hexadecimal to be loaded to THx and TLx Register of the
timer - x choosen
TIMER
PROGRAMMING
8051
P1.6
8051
P1.6
8051
P1.6
Th=0.5ms, Tlow = 0.5ms
8051
P1.6
DC= 75 % [ DC =Ton/T, where T = ton+toff.]
TON=75%
TOFF = 25%
INTERRUPTS
8051
P1.1
8051
P1.1
Th=5us, Tlow = 5Us
8051
INTERRUPTS
cont..
When an interrupt occurs, the updated PC is pushed on the stack and is loaded
with the vector address corresponding to the interrupt.
The table gives the vector addresses. The order of entries in the table is also the
order in which the 8051 will poll these in case of multiple interrupts.
Sequence of Events after an interrupt
When an enabled interrupt occurs,
1. The PC is saved on the stack, low byte first. This is because the stack grows
upwards in 8051.
2. Other interrupts of lower priority and same priority are disabled.
3. PC is loaded with the vector address corresponding to the interrupt. ---PGM--
When the handler executes ‘RETI”
1. PC is restored by popping the stack.
2. Interrupt status is restored to its original value. (Same and lower priority
interrupts restored to original status)