UNIT 5.pptx digital electronics notes ppt

Digital electronics

1. UNIT 5 Multitasking and Virtual 8086 Mode

2. Multitasking:-   Multitasking is the ability of a computer to run more than one program or task at the same time. On a single processor multitasking system, multiple processes do not actually run at the same time since there is only one processor. Instead , the processor switches among the processes that are active at any given time. Because of this action, it appears to the user as though the processor is executing all of the tasks at once.

3. Support Registers and Data Structures To provide efficient, protected multitasking, the 80386 employs several special data structures. The registers and data structures that support multitasking are: 1.Task state segment 2.Task state segment descriptor 3.Task register 4.Task gate descriptor

4. 1. TSS(Task State Segment):- It is a special type of segment, used to manage the task. The 80386 uses TSS like a scratch- pad. It stores everything it needs to know about a task in TSS. This means that task environment (context) is stored in the TSS.   • The fields of a TSS are divided into two sets: Dynamic set and Static set.

5. 1. Dynamic set:  The 80386 updates dynamic set when it switches from one task to another task. This set includes:  The general registers (EAX, EBX, ECX, EDX, ESP, EBP, ESI, EDI)  The segment registers (CS,SS,DS,ES,FS,GS)  The flag registers (EFLAGS) The instruction pointer(EIP)  Back link.   The first four fields (general registers, segment registers/selectors, flags and instruction pointer) save the state of the microprocessor, 80386. Saving EIP guarantees that the task can be restarted at the point at which it was stopped and saving EFLAGS allows 80386 to execute conditional instructions properly, when the task is restarted. The back link is used by the 80386 to keep track of a previous task. By executing a return instruction at the end of the new task, the back link selector for the previous TSS is automatically loaded into task register.  This activates the previous task and restores the prior program environment.

6.  2. Static Set:  The 80386 only reads fields from this set.  This set includes:  The selector for the task's LDT.  The register (PDBR) that contains the base address of the task's page directory.  Pointers to the stacks for privilege levels 0-2.  The T-bit (debug trap bit) which causes the 80386 to raise a debug exception when a task switch occurs.  The I/O map offset.

7. 2. Task state segment descriptor:-

8. 3. Task register:- Whenever a task switch occurs,80386 automatically save the content of old task in TSS and load new task from another TSS. The new TSS can be identified by using TSS Descriptor which is pointed by TASK GATE . But there is some problem i.e 80386 is not aware as to which TSS to store old task hence task Register is needed. The selector of Current running TSS descriptor is always kept in TR(Task Register). TR is used to point to TSS descriptor in GDT Table. TR has two part Visible and Invisible Part . Visible   Part is accessible to user . Invisible Part is automatically loaded .

9. Explore the role of Task Register in multitasking and the instructions used to modify and read Task Register.

10. 4 .  Task Gate Descriptor:- We know that TSS Descriptor provides information about the privilege level of the task with the help of DPL Field. If any task with lower priority is currently being executed then it may result in  privilege Violation. With the help of Task Gate  we obtain multitasking or task switching.The Task gate descriptor serves as an interface between the TSS and user code.Thus Task Gate indirectly points to TSS Segment. Task gate contains selector to TSS Segment of New task as well as ARB. In Task Switching ,task can be invoked indirectly by calling a Task gate.This method is used to transfer control to a task at RPL is higher than CPL. Max(CPL,RPL)<=Task gate DPL.

11. Steps involved in Task Switching Privilege Check:- The current task is checked to see whether it is allowed to switch to the designated task. This is done by checking DPL of the designated TSS with RPL and CPL of the current task. If the DPL of the TSS descriptor is numerically greater than or equal to the maximum of CPL and the RPL of the selector then only the current task is allowed to switch to the designated task. Limit and Present Bit Checking: - The TSS descriptor for the designated task is checked for its limits and presence. Saving the State of the Current Task: - The 80386DX finds the base address of the current TSS cached in the task register. It copies the registers into the current TSS(EAX ,ECX , EDX, EBX, ESP, EBP,ESI , Edl , ES , CS, DS, SS,FS,GS, the flag register and EIP ).The EIP field of the TSS points to the instruction after the one that caused the task switch . The selector for the current task is saved as a back link selector in the new task.

12. Loading of Task Register: The visible portion of the task register is loaded with the selector of the designated task's TSS descriptor. This sets the TS (Task Switch) bit in the Machine Status Word (MSW). This TS bit is useful to systems software when a coprocessor is present. The TS bit signals that the context of the coprocessor may not correspond to the current 80386DX task. The B bit in the new task's descriptor is marked busy. Then the corresponding task state descriptor is read from the GDT and loaded into the task register cache (hidden portion of task register). Resuming Execution : Finally, 80386 starts execution of designated task, with the instruction pointed by the new contents of the code segment selector (CS) and instruction pointer(EIP). The old program environment is preserved by saving the selector for the old TSS as the back link selector in the new TSS. By executing a return instruction at the end of the new task, the back link selector for the old TSS is automatically reloaded into TR and then program execution resumes at the point where it left off in the old task

13. Virtual Mode:- Virtual Mode is one of the operating mode of 80386. The 80386 microprocessor can switch back and forth rapidly between the Virtual Mode(VM-86) and Protected mode. 80386 microprocessor enters VM-86 mode and execute 8086 programs and after program execution 80386 leave V86 mode and switch to protected mode. The V86 program executes at Privilege level 3.

14. Physical Memory

15. 4. Explain the structure of a V86 Task in detail. How is protection provided within the V86 task?   Ans :- A V86 task consists partly of the 8086 program to be executed and partly of 80386 "native mode" code that serves as the virtual-machine monitor. The task must be represented by an 80386 TSS . The processor enters V86 mode to execute the 8086 program and returns to protected mode to execute the monitor or other 80386 tasks. To run successfully in V86 mode, an existing 8086 program needs the following: A V86 monitor. Operating-system services. The V86 monitor is 80386 protected-mode code that executes at privilege-level zero . The V86 monitor consists primarily of initialization and exception-handling procedures . As for any other 80386 program, executable-segment descriptors for the monitor must exist in the GDT or in the task's LDT. The linear addresses above 10FFEFH are available for the V86 monitor, the operating system, and other systems software. The monitor need data-segment descriptors so that it can examine the interrupt vector table or other parts of the 8086 program in the first megabyte of the address space.

16. With the necessary diagram, explain entering and leaving the virtual mode of 80386. (2) Entering & Leaving V86 Mode

17. The processor can enter V86 by either of two means: 1. A task switch to an 80386 task loads the image of EFLAGS from the new TSS. The TSS of the new task must be an 80386 TSS,, which contains the VM flag. A value of one in the VM bit of the new EFLAGS indicates that the new task is executing 8086

18. The processor can enter V86 by either of two means: 1. A task switch to an 80386 task loads the image of EFLAGS from the new TSS. The TSS of the new task must be an 80386 TSS,, which contains the VM flag. A value of one in the VM bit of the new EFLAGS indicates that the new task is executing 8086 instructions; therefore, while loading the segment registers from the TSS, the processor forms base addresses as the 8086 would. 2. An IRET from a procedure of an 80386 task loads the image of EFLAGS from the stack. A value of one in VM in this case indicates that the procedure to which control is being returned is an 8086 procedure. The CPL at the time the IRET is executed must be zero, else the processor does not change VM. The processor leaves V86 mode when an interrupt or exception occurs. There are two cases: 1. The i nterrupt or exception causes a task switch. A task switch from a V86 task to any other task loads EFLAGS from the TSS of the new task. If the new TSS is an 80386 TSS and the VM bit in the EFLAGS image is zero or if the new TSS is an 80286 TSS, then the processor clears the VM bit of EFLAGS, loads the segment registers from the new TSS using 80386- style address formation, and begins executing the instructions of the new task according to 80386 protected-mode semantics. 2. The interrupt or exception vectors to a privilege-level zero procedure. The processor stores the current setting of EFLAGS on the stack, then clears the VM bit. The interrupt or exception handler, therefore, executes as "native" 80386 protected-mode code. If an interrupt or exception vectors to a conforming segment or to a privilege level other than three, the processor causes a general-protection exception; the error code is the selector of the executable segment to which transfer was attempted.

19. List and explain various features of virtual 8086 mode . Virtual 8086 Mode Multiple 8086 real mode applications can execute at one time in virtual mode . In virtual mode, the paging mechanism and protection capabilities are available at the service of the programmers . In its protected mode of operation, 80386DX provides a virtual 8086 operating environment to execute the 8086 programs. Once the 80386 enters the protected mode from the real mode, it cannot return back to the real mode without a reset Operation .  Thus, the virtual 8086 mode of operation of 80386, offers an advantage of executing 8086 programs while in protected mode. The address forming mechanism in virtual 8086 mode is exactly identical with that of 8086 real mode. In virtual mode, 8086 can address 1Mbytes of physical memory that may be anywhere in the 4Gbytes address space of the protected mode of 80386. Like 80386 real mode, the addresses in virtual 8086 mode lie within 1Mbytes of memory.

20. 7. Explore memory management in the Virtual 8086 Mode. (2) The address forming mechanism in virtual 8086 mode is exactly identical with that of 8086 real mode.   In virtual mode, 8086 can address 1Mbytes of physical memory that may be anywhere in the 4Gbytes address space of the protected mode of 80386.    Like 80386 real mode, the addresses in virtual 8086 mode lie within 1Mbytes of memory.  Paging unit may not be necessarily enable in virtual mode, but may be needed to run the 8086 programs which require more than 1Mbyts of memory for memory management function.   In virtual mode, the paging unit allows only 256 pages, each of 4Kbytes size. • Each of the pages may be located anywhere in the maximum 4Gbytes physical memory. The virtual mode allows the multiprogramming of 8086 applications.  The virtual 8086 mode executes all the programs at privilege level 3.Any of the other programmes may deny access to the virtual mode programs or data  However, the real mode programs are executed at the highest privilege level, i.e. level 0.