VLSI testing.failures andFaults in digital ciruits

VLSI testing
Faults in digital circuits

1. Faults in Digital Systems

2. Failures and Faults A failure is said to have occured in a circuit or system if it deviates from its specified behavior A fault is a physical defect that may or may not cause a failure.

3. A fault is characterised by its nature, value,extent and duration. Nature: logical fault--opposite value non logical fault like power failure,malfunction of clock signal Value: creates fixed or varying errorneous values Extent: Effect of the fault is localized or distributed Duration: of a fault refers to whether the fault is permanent or temporary

4. Modeling of faults The effect of a fault is represented by a model, which represents the change the fault produces in circuit signals. The fault models are 1.Stuck at fault 2Bridging fault 3.Stuck open fault

5. Stuck at faults classical fault model represents most common model for logical faults A fault in a logic gate results in one of its inputs or the output being fixed to either a logic 0 (stuck-at-0 --->s-a-0) or a logic 1( stuck- at- 1-----> s-a-1)

6. Ex: Nand gate with input A s-a-1

7. Example: Multiple Stuck at model

8. Bridging Faults Unintended shorts between the lines form a class of permanent faults known as bridging faults, which cannot be modelled as stuck-at-faults. Physical defects in MOS are manifested as bridging faults. Three Categories: Input bridging Feed back Bridging Non Feedback bridging

9. Feedback bridging fault occurs if there is a short between output line and input line. Which can cause the ciruit to oscillate

10. Breaks and Transistor stck on open faults

11. Intragate breaks An intragate break occurs internal to a gate . Such a break can disconnect the source, the drain, or tne gate from the transistor (b1,b2,b3 in figure) An intragate can also disconnect the p-newtwork or the n network, or both networks from the circuit (b4,b5,b6 in figure)

12. Stuck -on and stuck -open faults Circuits should be tested for shorts and opens at the transistor level for realistic modelling. A short corresponds to a stuck-on transistor An open corresponds to stuck-open transistor

13. A Stuck open fault causes the output to be connected neither to GND nor to VDD.

14. Delay faults Smaller defects (partial open or short) result in the failure of a circuit to meet its timing specification. A small defect may delay the transition of a signal on a line either from 0 to 1or vice versa. Two types --- Gate delay fault ( model defects that cause propagation delay of faulty gate) ---- path delay fault( isolated & distributed defects)

15. Temporary Faults 90% of total maintenance expence Difficult detect and isolate 2 categories 1.Transient temporary faults -- non recurring α prticle radiation or power supply fluctuation 2.Intermittent faults: Reappear on a regular basis due to loose connections ,faulty components,environmental conditions