TWO’S COMPLIMENT HOW COMPUTERS REPRESENT NEGATIVE NUMBERS IN BINARY. Tinotenda C Machanja R226764N Masinga Kelly M R2213259Z Takudzwa Muzavazi R229382X Munashe Sanyamandwe R2212967T Mutisu Sampson Sipho R221650V Munyaradzi Muchafuruka R2213428B Tinayeishe Gwatinetsa R2216821J
What is 2’s Complement and why signed Numbers Two’s complement is the dominant way computers represent signed integers in binary. It makes addition, subtraction, and sign handling simple and fast Essential in computing & embedded systems, as in the real world, there are some negative values. Coordinates and geometry: positions left/behind/origin-centered math needs negatives (x/y/z can be < 0). Signals and media: audio waves are centered around 0; image filters and FFTs produce negative values. Control, finance, science: PID controllers, P&L, residuals, and derivatives all rely on sign. Simplicity and speed: with two’s complement, the same hardware handles + and −; subtraction becomes “add the negative.”
Why 2s Compliment? Short answer: because it makes hardware and software simpler, faster, and less error‑prone. One adder for everything: Subtraction is just addition of the two’s complement (~B + 1). CPUs can use the same adder circuit for + and −, saving gates, power, and latency. Works with ordinary binary adders: Arithmetic is modulo 2^N, so bit patterns “wrap around” naturally. Increment/decrement, loops, and pointer math become efficient. Unique zero: There’s only one 0. Alternatives like one’s complement and sign‑magnitude have “+0” and “−0,” which complicates comparisons and edge cases.
2’s Compliment 2’s Complement encodes signed integers so the same binary addition works for both positive and negative numbers. Positive values stay as normal binary. Negative numbers are formed by inverting all bits and adding 1. This avoids having two zeros like in older methods. If the number is non-negative: Write it in binary and pad with leading zeros to N bits. Example (8-bit): +18 → 00010010 If the number is negative (say −x): Write x in binary (unsigned). Invert all bits. Add 1. Example (8-bit): −18 +18 = 00010010 invert → 11101101 +1 → 11101110
Range & Overflow Range (for n bits): −2^(n−1) to 2^(n−1) − 1 4-bit: −8 to +7 : 8-bit: −128 to +127 Reason: one bit is effectively the sign; the rest set the magnitude. Two’s complement uses all 2^n bit patterns, so half represent negatives. Why overflow happens: Hardware keeps only n bits. Arithmetic is done “mod 2^n,” so results wrap around past the ends of the range. Signed overflow = the true mathematical answer is outside [−2^(n−1), 2^(n−1) − 1]. Quick overflow test (for addition): If you add two positives and get a negative → overflow. If you add two negatives and get a positive → overflow. Equivalent hardware rule: carry into the sign bit differs from carry out.
Example (4-bit) 7 + 5: 7 = 0111, 5 = 0101 0111 + 0101 = 1100 (keep only 4 bits) 1100 is a negative in two’s complement: invert 0011, +1 → 0100 = 4 → so 1100 = −4 True sum 12 is outside −8..7, so it wrapped to −4. That’s signed overflow. Another quick example: −5 + −5: 1011 + 1011 = 1 0110 → 0110 = +6 (overflow: two negatives gave a positive) 6 + (−2): 0110 + 1110 = 0100 = +4 (no overflow, result is in range)
Arithmetic with 2’s complement Addition (n bits) Add normally, keep only the lowest n bits. Ignore the final carry-out bit. Signed overflow if: adding two positives gives a negative, or two negatives give a positive. Hardware rule: overflow when carry into MSB ≠ carry out of MSB. Subtraction A − B = A + (~B + 1) (add the two’s complement of B). Same adder handles + and −.
Advantages of 2’s complement One adder for everything: subtraction is just addition of (~B + 1), so hardware is simpler, smaller, and faster. Single zero: no “+0”/“−0” ambiguity; comparisons and logic are cleaner. Uses all bit patterns: full 2^n coverage with an extra negative value (range −2^(n−1) to 2^(n−1)−1). Ubiquitous standard: supported by virtually all CPUs, toolchains, and languages—fewer edge cases and bugs.
Real-world Applications 2s compliment CPUs and instruction sets ALUs do add/sub with one adder; branches use sign/overflow flags. Sign extension of immediates and narrow loads (e.g., load byte → sign‑extend to 32/64 bits). Operating systems and ABIs Syscalls return negative error codes (e.g., −1). time_t and file offsets (off_t) are signed; pre‑1970 times are negative; Y2038 on 32‑bit signed time_t. Programming and algorithms Languages use signed ints for deltas/indices; −1 as a sentinel. Bit hack x & −x isolates lowest set bit (relies on two’s complement), used in Fenwick trees and bitboards.
Audio and DSP PCM audio: 16‑bit/24‑bit samples are signed two’s complement (−32768..32767). Fixed‑point Q15/Q31 arithmetic; SIMD has saturating add/sub for two’s‑complement data. Imaging, graphics, and video Convolution kernels and residuals are signed; intermediate pixels go negative. JPEG/H.26x store signed transform/quantized coefficients. Sensors, robotics, and embedded IMUs, accelerometers, gyros report signed readings; encoders count forward/backward. Many ADCs stream signed two’s‑complement output in differential modes.
Summary & Key Takeaways De facto standard for signed integers across CPUs, languages, and file formats. Simplifies hardware: one adder handles add/sub; easy negation (−x = ~x + 1); straightforward overflow detection. Clean semantics: single zero; fixed, contiguous range −2^(n−1) to 2^(n−1) − 1; sign extension preserves value when widening. Plays well with binary logic: same circuits for signed/unsigned; predictable modulo 2^n wraparound. Fewer edge cases than alternatives (no “−0,” no end‑around carry), making software more robust. Bottom line: two’s complement is the universal, simple, and reliable way to represent signed integers in binary hardware.