8th sem tech seminarnnnnnnnnnnnnnnnnnnn.pptx

smanjunarayana 18 views 20 slides Jun 21, 2024
Slide 1
Slide 1 of 20
Slide 1
1
Slide 2
2
Slide 3
3
Slide 4
4
Slide 5
5
Slide 6
6
Slide 7
7
Slide 8
8
Slide 9
9
Slide 10
10
Slide 11
11
Slide 12
12
Slide 13
13
Slide 14
14
Slide 15
15
Slide 16
16
Slide 17
17
Slide 18
18
Slide 19
19
Slide 20
20

About This Presentation

3d ic


Slide Content

3 DIMENSIONAL INTEGRATED CIRCUITS BY MANJU NARAYANA S (1CR20EC082) Under the Guidance of: Prof . Dr . SUSHEEL KUMAR S 1

CONTENTS INTRODUCTION IDEA OD 3D IC WHY 3D ARE BETTER THAN 2D DIFFRENCES 3D IC MANAFACTURING PROCESS ADVANTAGES CHALLENGES APPLICATIONS CONCEPT OF SOC EDA TOOLS 3D TRANSISTOR REFRENCES 2

INTRODUCTION In electronics, a three-dimensional integrated circuit is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. In contrast, a 3D IC is a single chip in which all components on the layers communicate using on-chip signaling, whether vertically or horizontally.

To continue the legacy of Moore's law There is rapid growth in software and IT industry which requires complex but also compact hardware. To reduce delays which will otherwise occur between different IC’s on a system. Also helps reduce cost and power required. IDEA OF 3D IC

WHY 3D ARE BETTER THAN 2D CHIPS Increase in performance increases complexity which increases no of gates which in turn will increase the number of transistors. Considering this only in two dimensions will lead wastage of area . This will also increase the delay. There will be to much connection complexity which might cause hindrance in transfer of signal due to the resistance of the wire and capacitance formed. Whereas 3D IC’s can improve the performance save area and increase the transistor density

Differences

3D IC manufacturing process Monolithic Wafer on wafer Die on wafer Die on die

Monolithic process Electronic components and their connections (wiring) are built in layers on a single semiconductor wafer, which is then diced into 3D ICs. There is only one substrate, hence no need for aligning, thinning, bonding, or through-silicon vias.

Wafer on wafer Electronic components are built on two or more semiconductor wafers, which are then aligned, bonded, and diced into 3D ICs.

Die on a wafer Electronic components are built on two semiconductor wafers. One wafer is diced aligned and bonded onto die sites of the second wafer.

Die on a die Electronic components are built on multiple dice, which are then aligned and bonded. One advantage of die-on-die is that each component die can be tested first, so that one bad die does not ruin an entire stack

Advantages of 3D architecture 3D integration can reduce the wiring reduces the capacitances and resistance. Low power dissipation Low chip area High transistor density It more cost effective then 2D integration.

challenges IC testing and yielding Heat removal Power delivery Design complexity testing

Applications of 3D IC Mobile devices (Soc) Wearables Medical industry Defence industry Automative industry

The concept of SOC The system on chip design is the major application of the 3D IC It is a piece of tech containing the entire system on a single chip. In soc design the processing elements the memory the RF equipment and many more devices are connected in 3D using TSV’s. This kind of design dominate the mobile and desktop industry these days

View of 3D IC

EDA TOOLS Synopsys Fusion Design Platform Cadence 3D IC design solutions Simens xpedition IC packaging Xilinx vivado

THE 3D TRANSISTOR

REFRENCES PANEL: EDA Challenges at Advanced Technology Nodes C Keh-Jeng Chang, Ph.D. TSMC Hsinchu, Taiwan Modeling and Design of Dual-Purpose MIV in Monolithic 3D IC MADHAVA SARMA VEMURI , (Student Member, IEEE), AND UMAMAHESWARA RAO TIDA , (Member, IEEE) AN OVERVIEW OF 3D INTEGRATED CIRCUITS VACHAN KUMAR,AZAD NAEEMI WIKIPEDIA GOOGLE

THANK YOU 20
Tags