AddersIn digital logic design, an adder is a combinational circuit that performs the arithmetic addition of binary numbers.pptx
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May 10, 2025
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About This Presentation
In digital logic design, an adder is a combinational circuit that performs the arithmetic addition of binary numbers.
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Added: May 10, 2025
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Adders
Adders In digital logic design, an adder is a combinational circuit that performs the arithmetic addition of binary numbers. It takes two or more binary inputs and produces a sum and sometimes a carry as outputs.Binary addition of two 1-bit numbers :
Applications of adder Arithmetic Logic Unit (ALU) : Adders are core components of the ALU in a CPU, responsible for performing arithmetic operations like addition, subtraction, and even multiplication. Central Processing Unit (CPU): Every time a CPU performs calculations or manipulates data, it often uses adders to process binary numbers. Digital Calculators: Adders help carry out mathematical operations in electronic calculators by processing binary arithmetic. Data Path Design in Processors: Adders are used in designing data paths for efficient data movement and control between registers and memory.
Digital Signal Processing (DSP) : Adders are extensively used in DSP for filtering, convolution, and Fourier transforms which involve numerous additions. Timers and Counters: Adders are used in incrementing values in digital clocks, timers, and event counters. Address Calculation in Memory Units: Memory addresses are often calculated using adders, especially in array indexing and pointer arithmetic. Multipliers and Dividers: Many multiplication and division algorithms are based on repeated addition or subtraction, which makes adders essential.
Half adder A half adder is a fundamental digital circuit used in digital logic and design to perform the addition of two single-bit binary numbers.The half-adder accepts two binary digits on its inputs and produces two binary digits on its outputs—a sum bit and a carry bit.
Half Adder Cout=AB, Σ=ĀB+A¯B
Full Adder A full adder is a combinational logic circuit that performs the addition of three binary bits : Two significant bits ( A and B ) One carry-in bit ( C in ) from the previous stage. It produces two outputs: Sum (∑) Carry-out (C out )
Full Adder Outputs: Logical Expression for SUM: = A’ B’ C IN + A’ B C IN ’ + A B’ C IN ’ + ABC IN = C IN (A’ B’ + A B) + C IN ’ (A’ B + A B’) Sum (S) = A ⊕ B ⊕ C in C out = A’ B C IN + A B’ C IN + A B C IN ’ + A B C IN = =C IN (A’ B+ A B’ ) + A B (C IN ’ + C IN ) = C IN (A ⊕ B) + AB
Full adder with two half adder
Full adder with two half adder
Parallel Adder A single full adder performs the addition of two one bit numbers and an input carry. But a Parallel Adder is a digital circuit capable of finding the arithmetic sum of two binary numbers that is greater than one bit in length by operating on corresponding pairs of bits in paralle l. It consists of full adders connected in a chain where the output carry from each full adder is connected to the carry input of the next higher order full adder in the chain. A n bit parallel adder requires n full adders to perform the operation.So for the two-bit number, two adders are needed while for four bit number, four adders are needed and so on. Parallel adders normally incorporate carry lookahead logic to ensure that carry propagation between subsequent stages of addition does not limit addition speed.
N bit parallel adder
4 bit parallel adder
Subtractor A subtractor is a digital circuit that performs subtraction of two binary numbers. Half subtractor :
Half Subtractor Half Subtractor : A half subtractor is a combinational logic circuit that subtracts two binary digits (A and B) and gives two outputs: Subtracts two single bits Has two outputs: Difference (D) Borrow (B) — indicates if borrowing is needed
Half Subtractor Logical Expression of Half Subtractor: Difference (D) = A ⊕ B (XOR gate) Borrow (B) = Ā B Input A Input B Difference (D) Borrow (B) 1 1 1 1 1 1 1 Truth table of half subtractor
Full Subtractor A full subtractor is a combinational logic circuit that subtracts three binary inputs : A (minuend) B (subtrahend) Bin (borrow-in from the previous stage) It produces two outputs: Difference (D): The result of the subtraction. Borrow-out (B-OUT): Indicates if a borrow is needed for the next stage.
Full Subtractor The full subtractor is essential because a half-subtractor can only subtract the least significant bit (LSB) of binary numbers. However, if a borrow is generated during the subtraction of the LSBs, it will affect the subtraction in the next stages. A full subtractor handles this situation by considering the borrow from the previous stage, ensuring accurate subtraction even when a borrow is present.
Logical Expression of Full Subtractor: D = A’B’Bin + A’BBin’ + AB’Bin’ + ABBin D = A’B’Bin + A’BBin’ + AB’Bin’ + ABBin D = A’B’Bin +ABBin+ A’BBin’ + AB’Bin’ D = Bin(A’B’ +AB) + Bin’ (A’B + AB’ ) D = Bin(A XNOR B) + Bin’ (A XOR B) D = A ⊕ B⊕ Bin Bout = A’B’Bin + A’BBin’ + A’BBin + ABBin Bout =ABBin+A’B’Bin + A’BBin’ + A’BBin Bout = Bin(AB + A’B’) + A’B(Bin + Bin’) Bout = Bin(A XNOR B) + A’B
Logic Circuit for Full Subtractor
Implementation of Full Subtractor using Half Subtractors
Multiplexer A Multiplexer is a combinational logic circuit that selects one input from multiple inputs and sends it to a single output line, based on select lines.It’s also called a data selector.For N input lines, log2(N) selection lines are required, or equivalently, for 2n input lines, n selection lines are needed. Multiplexers are also known as “N-to-1 selectors,” parallel-to-serial converters, many-to-one circuits, and universal logic circuits. They are mainly used to increase the amount of data that can be sent over a network within a certain amount of time and bandwidth .
Multiplexer As already mentioned, a multiplexer, also referred to as MUX, is a combination logic circuit that is designed to accept multiple input signals and transfer only one of them through the output line. In simple words, a multiplexer is a digital logic device that selects one-out-of-N (N = 2n) input data sources and transmits the selected data to a single output line. The multiplexer is also called data selector as it selects one from several
Applications of MUX Applications of MUX : Data Routing : The Mux is used for data routing in the digital system where they select one of the several data lines and re-route it the output. Data Selection : The Mux is used for data selection where they select data source according to the select lines. Analog-to-Digital Conversion : The Mux are used in ADC to select different analog input channels. Address Decoding : The Mux are used in Microprocessors or memory for address decoding. Logic Function Implementation : Mux can be used to implement various logic functions .
Types of Multiplexers The Mux can be of different types based on input 2×1 Mux 4×1 Mux 8×1 Mux 16×1 Mux
4×1 Multiplexer 4×1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines s1 & s0 and one output Y. The block diagram of 4×1 Multiplexer is shown in the following figure.
4×1 Multiplexer The output of the multiplexer is determined by the binary value of the selection lines When S1S0=00, the input I0 is selected. When S1S0=01, the input I1 is selected. When S1S0=10, the input I2 is selected. When S1S0=11, the input I3 is selected.
Circuit Diagram of 4×1 Multiplexers
Demultiplexer A Demultiplexer is a combinational logic circuit that accepts a single input and distributes it over several output lines. Demultiplexer is also termed as DEMUX in short. As Demultiplexer is used to transmit the same data to different destinations, hence it is also known as data distributor.
Types of Demultiplexer Based on the number of output lines (2n), Demultiplexers can be classified into several types. Some commonly used types of Demultiplexers are − 1×2 Demultiplexer 1×4 Demultiplexer
Applications of DEMUX DEMUXs are majorly used to design the ALU circuits and parallel data segments. The DEMUXs convert the output of the MUX into the actual input. On the receiver end, the DEMUX can be used to verify the original form of the data to carry out the entire communication process. DEMUX helps to save the output. The output generally saved to the ALU. The output will be saved in the registers and the various storage units of the system. Each DEMUX has a connection with multiple registers which helps to store the processed data into it. The counterpart of the DEMUX regulates the data signal at the output stage of the DEMUX operation. These data can be retrieved later to read out parallelly.
Types of Demultiplexer Based on the number of output lines (2n), Demultiplexers can be classified into several types. Some commonly used types of Demultiplexers are − 1×2 Demultiplexer 1×4 Demultiplexer
1X4 DEMUX The 1×4 Demultiplexer has 1 input line (I), 2 select line (S0 and S1), and 4 output lines (Y0, Y1, Y2, and Y3). The logic level applied to the select lines determines the output line to which the input data (I) will be transmitted.
Truth Table Of A 1X4 DEMUX DEMUX Select Line Outputs S 1 S Y 3 Y 2 Y 1 Y I 1 I 1 I 1 1 I
DEMUX From this truth table of 1×4 Demultiplexer, we can directly write the Boolean expression for each output as follow.