analog2digital converter for real time application.ppt
prateekjain415709
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Jul 08, 2024
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About This Presentation
A/D converter design
Size: 1.07 MB
Language: en
Added: Jul 08, 2024
Slides: 16 pages
Slide Content
From analog to digital circuits
A phenomenological overview
Bogdan Roman
2Outline
•Insulators, conductors and semiconductors
•Semiconductor diodes: the p-njunction
•The Field Effect Transistor (FET):
–The Junction FET (JFET)
–The Metal Oxide Semiconductor FET (MOSFET)
•The MOS Inverter
–Resistive and same MOS type
–Complementary MOS (CMOS) technology
•Elementary gates
•Flip-flops
•Examples
Loosely based on the IA and 3B Engineering dept. courses
(Linear Circuits and Devices, Digital Circuits,
Information Processing, Integrated Digital Electronics)
3Insulators and conductorsMean velocity of electron:
where = mobility
uE
Current given by:
conductivity
resistance
I I ne u A
V ne A
u E I V
LL
ne
L
R
A
Ohm's Law:
V
I
R
4Semiconductors: Intrinsic silicon
At room temperature, the thermal energy kT
~ 1/40 eV is enough to break a few covalent
bonds to produce free electrons. This also
leaves holes(i.e. positive net charges left by
the broken covalent bond).
Both electrons and holes contribute to
current flow.
At low temperatures, silicon is an
insulator since there is not enough
thermal energy to break the covalent
bonds.
5Semiconductors: Extrinsic siliconhole concentration
hole mobility
-type conductivity
p
pp
p
p pe
when then
np
np electron concentration
electron mobility
-type conductivity
n
nn
n
n ne
6The p-njunction: The diode
Reverse biased diode:
Forward biased diode:
8The Junction Field Effect Transistor (JFET)
JFET Interactive(opens browser)
-Proposed by Shockley in 1951
-First made by Teszner in 1958 in
France
9Metal Oxide Semiconductor FET (MOSFET)
-First made in 1960 at Bell Laboratories in
the USA by Atalla and Kahng.
-Offers extremely high component density
in integrated circuits.
-Very high input resistance, low noise,
simpler fabrication than bipolar transistors.
MOSFET Interactive(opens browser)
10The NMOS inverter
Resistive load:
-When input is low (0) then T1 is off,
hence output goes high (1) (i.e. V
DD)
-When V
IN= high (1) then T1
conducts (linear region) and brings
the output low (0), depending on R
L
-High R
L= low logic zero and low
power consumption but large area on
silicon and slow switching =>
compromise
NMOS load:
-T2 has the gate tied to its drain and
is always on (and in saturation). Acts
as a pseudo-resistor load.
-Similar operation to the resistive
load inverter
-Smaller area on silicon (so easier to
manufacture) and faster switching but
has a lower high logic voltage (V
DD–
V
T), and high power consumption
when input high.
11Complementary MOS (CMOS) inverter
In CMOS technology, the output is
clamped to one of the power rails by a
conductive (on) device, while the other
device serves as a load of effectively
infinite resistance (off). This leads to
static properties that approximate those
of the ideal inverter.
-The PMOS devices is slower (lower
mobility of holes) so it has to be larger
to compensate. It is also more complex
to manufacture.
12NOR and NAND gatesNAND Gate
A
B
A·B NOR Gate
A
B
A+B
The 74HC00 IC has four
2-input NAND gates
The 74HC02 IC has
four 2-input NOR gatesA B
A+B
+V A
B
+V
A B
A+B B
A
A·B
+V A B
B
A
A·B
+V
13Flip-flops and clocked flip-flopsS
R
E
Q
Q
=Master
S
R
Ck Slave
Q
Q
14Multiplexer
A crucial circuit, vital for implementing functions: