BJT MOSFET POWER ELECTRONICS VTU MODULE 1.pdf

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About This Presentation

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Slide Content

Module-1
MOSFET & BJT

BiasinginBJTAmplifierCircuits
•Thebiasingproblemisthatofestablishingaconstantdccurrent
inthecollectoroftheBJT.
•Thiscurrenthastobecalculated,predictable,andinsensitiveto
thevariationsintemperatureandtoalargevariationsinthe
valueofβencounteredamongthetransistorsofthesametype.
Two obvious schemes
for biasing the BJT: (a)
by fixing V
BE; (b) by
fixingI
B.
Both result in wide
variations in IC and
hence in VCE and
therefore are considered
to be “bad.” Neither
scheme is
recommended.

The Classical Discrete-Circuit BiasArrangement
Figure(a)belowshowsthearrangementmostcommonlyusedforbiasingadiscrete-circuit
transistoramplifierifonlyasinglepowersupplyisavailable.Thetechniqueconsistsof
supplyingthebaseofthetransistorwithafractionofsupplyvoltageVCCthroughthevoltage
dividerR1,R2.Inaddition,aresistorREisconnectedtotheemitter.Thefigurein(b)below
showsthesamecircuitwiththevoltagedividernetworkreplacedbyitsTheveninequivalent.
ClassicalbiasingforBJTsusingasingle
powersupply:
(a)circuit;
(b)circuitwiththevoltagedivider
supplyingthebasereplacedwithits
Theveninequivalent.

R
1+R
2
R
1R
2
21
R
2
V
R+R
B
R=
CCBB
V=
The current I
E can be determined by writing a Kirchhoff’s loop equation for the base-emitter-ground, labelled L,andby
substituting I
B = I
E /(β+1):
BE
−V
BEV
BB
R+R/(+1)
E
I=
…(3.1)
…(3.2)
…(3.3)

To make IE insensitive to temperature and β variations, we design thecircuit
to satisfy the following twoconstraints:
V
BE
R
B
V
BB
R
E
+1
•ConditiongivenaboveforV
BBensuresthatsmallvariationsinV
BE(≈0.7V)willbeswampedby
themuchlargerV
BB.ThereisalimitonhowlargeV
BBcanbe:foragivenvalueofthesupply
voltageV
CC,thehigherthevalueofV
BB,thelowerwillbethesumofthevoltageacrossR
Cand
thecollectorbasejunction(V
CB).
•OntheotherhandwewantthevoltageacrossR
Ctobelargeinordertoobtainhighvoltagegain
andlargesignalswing(beforetransistorsaturation).Asaruleofthethumb,onedesignsforV
BB
about1/3V
CC,V
CB(orV
CE)about1/3V
CCandI
CR
Cabout1/3V
CC.
•ConditiongivenbyR
EmakesI
Einsensitivetovariationsinβandcouldbesatisfiedbyselecting
R
Bsmall.ThisinturnisachievedbyusinglowvaluesofR
1andR
2.LowervaluesofR
1andR
2
willmeanhighercurrentdrainfromthepowersupply,andwillresultinloweringoftheinput
resistanceoftheamplifier(iftheinputresistanceiscoupledtothebase).TypicallyoneselectsR
1
andR
2suchthattheircurrentisintherangeofI
Eto0.1I
E.
…(3.4)
…(3.5)

A Two-Power-Supply Version of the ClassicalBiasArrangement
A somewhat simpler bias arrangement is possible if the two power supplies are available,as
shown in figurebelow:
BiasingtheBJTusingtwopowersupplies.ResistorRBis
neededonlyifthesignalistobecapacitivelycoupledtothe
base.Otherwise,thebasecanbeconnecteddirectlyto
ground,ortoagroundedsignalsource,resultinginalmost
totalβ-independenceofthebiascurrent.

Writing the loop equation for the loop Lgives:
BE
−V
BEV
EE
R+R(+1)
E
I=
ThisequationisidenticaltoequationofIEgivenearlierexceptforVEEreplacingVBB.Thus
thetwoconstraintsoftheequationsgivenbeforeapplyherealso.Notethatifthetransistoris
tobeusedwiththebasegrounded(i.e.)inthecommon-baseconfiguration,thenRBcanbe
eliminatedaltogether.Ontheotherhand,iftheinputsignalistobecoupledtothebase,then
RBisneeded.
…(3.6)

Biasing Using a Collector-To-Base FeedbackResistor
Figures given below shows a simple but effective alternativebiasing
arrangement suitable for common-emitteramplifiers.
(a)Acommon-emittertransistor
amplifierbiasedbyafeedback
resistorRB.
(b)Analysis of the circuit in(a).

BEB
I
E
+1
=I
E R
C+
+V
BE=I
E R
C+I
B R
BV
CC
R+V
Thus the emitter bias current is givenby
BC
−V
BEV
CC
R+R(+1)
E
I=
…(3.7)
…(3.8)
…(3.9)

It follows that to obtain a value of IEthatisinsensitive to
variation of β, we select RB / (β + 1) << RC. Note that the valueof
RB determines the allowable signal swing at the collectorsince
R
B
+1
EBBCB
V=IR=I
…(3.10)

Small signal operation andModels

Fig.1.5 Circuit diagram of a transistor amplifier (a) with a small time
varying signal superimposed on top of a DC voltage bias source, (b) withthe
small signal turned off (Courtesy of Sedra andSmith).

Before proceeding further, one is also reminded of the i-v characteristics of aBJT.
(1.9)iC =ISe
v
BE/V
T
iE =iC/α (2.0)
iB =iC/β (2.1)
vCE = vCC −iCRC (2.2)
Intheabove
iC=IC+ic,vBE=VBE+vbe,etc (2.3)
Furthermore,anuppercasevariableimpliesaDCvalue,alowercasevariablewithuppercase
subscriptimpliesthetotalvalue.Butalowercasevariablewithlowercasesubscriptimpliesa
smallvaluewhichcanbetimevarying.

As aconsequence
iC = ISe
v
BE/V
T = ISe
(VBE+vbe)/VT
=ISe
VBE/VTe
vbe/VT
(2.4)
By defining the DC quantity IC = ISe
VBE/VT
, the above can be rewrittenas
where it is assumedthat
(2.5)
. The above is the essence of Taylor series expansion,as
implicitly, it has been used in the aforementioned approximation. From the above, one
gathers that the small signal collector currentis
(2.6)
where is thetransconductance.

The transconductance, is related to the incremental conductance, and hence is alsogiven
by
(2.7)
Fig. 1.6Graphical
depiction of the
small signal
analysis forBJT.

Small Signal Analysis with BaseCurrent
By the same token, one can perform a small signal analysis of the base current, using the
approximation for iC in (1.7), to arriveat
(2.8)
where IB = IC/β andconsequently,
(2.9)
Similarly, one candefine
(3.0)
In the above, rπ is the incremental resistance seen by a small signal driving the small base
current from the base to theemitter.

Small Signal Analysis of the EmitterCurrent
Applying small signal analysis to the emitter current, onegets
(3.1)
where
(3.2)
Onecandefineincrementalemitterresistancefromtheabovetobegivenby
,forlargeβ. (3.3)
Itistoberemindedthattheformulagm=IC/VThasbeenusedabove.Bynoticingthatvbe=
ibrπ = iere, one deducesthat
rπ = (ie/ib)re = (β+1)re (3.4)

VoltageGain
The total collector voltage vCE, by Kirchhoff voltage law (KVL),is
vCE = VCC−iCRC = VCC−(IC+ic)RC = (VCC−ICRC)−icRC =VCE−icRC
(3.5)
Thus the small collector voltage isthen
vce = −icRC ≈−gmvbeRC = (−gmRC)vbe =Avvbe (3.6)
where
(3.7)
Finally, the voltage gain can be expressedas
(3.8)

Hybrid-πModel
The hybrid-π model shown in Figure 5(a) does correctly predict the collector current ic =
gmvbe and ib = vbe/rπ. Moreover, it also correctly predicts the correct value for ie,namely
(3.9)
Alternatively, one can relate the voltage vbe to the current ib, and use the controlled
current source model shown in Figure 5(b) instead. To this end,one writes
gmvbe = gm (ibrπ) = (gmrπ)ib=βib (3.10)

Fig.1.9 Two different versions of the hybrid-π model for small signals (a) voltage controlled
current source (VCCS), and (b) current controlled current source (CCCS) (Courtesy of
Sedra andSmith).
Fig.1.10Twodifferentversionsofthehybrid-πmodelforsmallsignalswiththeEarly
effect,byincludingro,shownin(a)VCCS,(b)CCCS

Introduction
•Q: What, in simplest terms, is the
desired operation of a three-
terminaldevice?
–A: Employ voltage between two
terminals to control current flowing
in to thethird.

Introduction
•Q: What are two major typesof
three-terminal semiconductor
devices?
–metal-oxide-semiconductor
field-effect transistor(MOSFET)
–bipolar junction transistor(BJT)
•Q: Why are MOSFET’s morewidely
used?
–size(smaller)
–ease ofmanufacture
–lesser powerutilization
•MOSFETtechnology
–Itallowsplacementof
approximately2billion
transistorsonasingleIC
•backbone of very large
scale integration(VLSI)
–It is considered preferable to BJT
technology for many
applications.
note: MOSFET is more widely used in
implementation of modern electronic
devices

Oxford UniversityPublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith(0195323033)
5.1. DeviceStructure
andOperation
▪Figure 5.1. shows general structure of the n-channel
enhancement-typeMOSFET
Figure 5.1: Physical structure of the enhancement-type NMOS transistor: (a) perspective view, (b) cross-
section. Note that typically L = 0.03um to 1um, W = 0.1um to 100um, and the thickness of the oxide
layer (t
ox) is in the range of 1 to10nm.

Oxford UniversityPublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith(0195323033)
5.1.3. Creatinga
Channel for
CurrentFlow
▪Q: What happens if (1) source and
drain are grounded and (2) positive
voltage is applied to gate? Refer to
figure toright.
▪step #1: v
GS is applied to the
gate terminal, causing a positive
build up of positive charge along
metalelectrode.
▪step #2: This “build up” causes
free holes to be repelled from
region of p-type substrateunder
gate. Figure 5.2: The enhancement-type NMOS transistor
with a positive voltage applied to the gate. An n
channel is induced at the top of the substrate
beneath thegate

Oxford UniversityPublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith(0195323033)
Q: What happens if (1) source
and drain are grounded and(2)
positive voltage is applied to
gate? Refer to figure toright.
▪step #3: This “migration”
results in the uncovering of
negative bound charges,
originally neutralized by the
freeholes
▪step #4: The positive gate
voltage also attractselectrons
from the n
+ source and drain
regions into thechannel.
Figure 5.2: The enhancement-type NMOS transistor
with a positive voltage applied to the gate. An n
channel is induced at the top of the substrate
beneath thegate

5.1.3. Creatinga
Channel for
CurrentFlow
▪threshold voltage (V
t) –is the
minimum value of v
GS required to
form a conducting channelbetween
drain andsource
▪typically between 0.3 and0.6V
dc
▪field-effect –when positive v
GS is
applied, an electric field develops
between the gate electrode and
induced n-channel –the
conductivity of this channel is
affected by the strength offield
▪SiO
2 layer acts asdielectric
Oxford UniversityPublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith(0195323033)
▪oxide capacitance (C
ox) –is the
capacitance of the parallel plate
capacitor per unit gate area(F/m
2
)
▪effective / overdrive voltage –is
the difference between v
GS applied
andV
t.
(eq5.1) v
OV v
GS−V
t
ox
ox
(eq5.3)C
t
inF/m
2
=

ox
oxispermittivityofSiO2=3.45E−11(F/m)
tox is thickness of SiO2layer
V
tn is used for n-type
MOSFET, V
tp is used for
p-channel

Oxford UniversityPublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith(0195323033) DS
Figure 5.5: Operation of the e-NMOS transistorasvisincreased.
v
DS
v
OV
The voltage differential
between both sides of n-
channel increases withv
DS.

Oxford UniversityPublishing
Figure 5.6(a): For a MOSFET with v
GS = V
t + v
OV application of vDS causes the voltage drop along the
channel to vary linearly, with an average value of vDS at the midpoint. Since v
GD > V
t, the channel still
exists at the drain end. (b) The channel shape corresponding to the situation in (a). While the depth of
Microelectronic CircuitstbhyeAdcehl Sa.SnendrealanadtKtehnneethsoC.uSmrciteh(0is19s5t3i2l3l0p33r)oportional to v
OV, the drain end isnot.
note the averagevalue note that we can define total
charge stored in channel|Q|
as area of thistrapezoid
( )
1
2OV DSQ=v−vL

Oxford UniversityPublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith(0195323033)
5.1.6. Operationfor
v
DS >>v
OV
▪In section 5.1.5, we assume
that n-channel is tapered but
channel pinch-off does not
occur.
▪Trapezoid doesn’tbecome
triangle for v
GD >V
t
▪Q: What happens if v
DS >v
OV?
▪A: MOSFETenters
saturationregion.Any
DS
further increasein vhas
no effect oni
D.
Figure 5.8: Operation of MOSFET with v
GS = V
t +
v
OV as v
DS is increased to v
OV. At the drain end,
v
GD decreases to V
t and the channel depth at
the drain-end reduces to zero (pinch-off). At
this point, the MOSFET enters saturation more
of operation. Further increasing v
DS (beyond
v
OV) has no effect on the channel shape and i
D
remainsconstant.
pinch-off does notmean
blockage ofcurrent

Oxford UniversityPublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith(0195323033)
1
2
1
nox OV2DSDS
D
nox OV
L
W
v
2
L
inA
saturation:(C)

triode:(C)
W
(v−v)v
(eq5.14)i=




if v
DSv
OV
otherwise

saturationoccurs
once v
DS >v
OV

Oxford UniversityPublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith(0195323033)
5.1.7. Thep-Channel
MOSFET
▪Figure 5.9(a) shows cross-
sectional view of ap-channel
enhancement-typeMOSFET.
▪structure is similarbut
“opposite” ton-channel
▪complementarydevices–
twodevicessuchasthep-
channelandn-channel
MOSFET’s.
Figure 5.9(a): Physical structure of the PMOS transistor. Note that it is similar to the NMOS transistor
shown in Figure 5.1(b), except that all semiconductor regions are reversed in polarity. (b) A negative
voltage v
GS of magnitude greater than |V
tp| induces a p-channel, and a negative v
DS causes a current i
D
to flow from source todrain.

BIASING IN MOS AMPLIFIERCIRCUITS
Biasing by FixingVGS
Biasing by fixing VGS is not a goodtechnique.
1.Vt, Cox and W/L vary widely amongdevices
2.Vt and µ
n depend ontemperature

BIASING IN MOS AMPLIFIERCIRCUITS
Biasing by FixingVGS
Fig.1.11Biasingusingafixedvoltageatthegate,V
G,anda
resistanceinthesourcelead,R
S:(a)basicarrangement;(b)
reducedvariabilityinI
D;
Resistor Rs provides negative feedback,
which acts to stabilize the value of thebias
current I
D. This gives it the name
degenerationresistance

Two possible practical discrete implementations of this bias scheme are shown in Fig.
1.11(c) and (e).
Fig.1.11 (c) practical implementation using a single supply; (d) practical
implementation using twosupplies

Small signal operation ofMOSFET

Fig.1.12: A figure to remind us of the definition
of v
GS, v
OV , v
DS, and v
GD in the trioderegion

Fig.1.13 illustrates an NMOS operating as an amplifier. It is
being biased with a DC voltage, and a small signal is
superimposed on top of the DCvoltage.
Fig.1.13 Circuit diagram of a transistor MOSFET (NMOS)
amplifier with a small time-varying signal superimposed on
top of a DC voltage bias source (Courtesy of Sedra andSmith).

Before proceeding further, one is also reminded of the i-v characteristics of
a MOSFET. Namely, that in the saturationregion
(4.2)
where
vGS = VGS+vgs,vOV = VOV+vov (4.3)
where vOV = vGS − Vt. Again, the notation will be that the total value is denoted by a lower-
case letter with upper-case subscript, the DC value or the Q point is denoted by a upper-
case letter with upper-case subscript. The small signal is denoted by a lower-case letter
with lower-case subscript. However, the threshold voltage, which is a DC value is denoted
as Vt in order not to be confused with VT the thermalvoltage.
It is noted that the overdrive voltage vOV is definedas
vOV=vGS−Vt=VGS+ vgs−Vt (4.4)
If we further define that vOV = VOV + vov, equating the time varying and DC parts, onegets
VOV=VGS−Vt,vov=vgs (4.5)
If the time-varying signals are turned off, then (1.1), keeping only the DC signals,
becomes
(4.6)

which is the i-v relation obtained at the Q point, or the operating point. In (1.1), by
letting
vGS = VGS +vgs (4.7)
then
(4.8)
For small signal analysis, vgs is assumed to be small. Then v
2
is even smaller; andhence,
gs
the last term can be ignored in the above. By letting the total current here as iD = ID + id, a
DC term plus a time-varying term, then from the above, one can see that thetime-varying
term is approximately givenby
id ≈kn(VGS−Vt)vgs=gmvgs (4.9)
where quadratic term proportional to v
2
has been ignored,and
gs
(5.0)
The above has the unit of conductance, and it is called the MOSFET transconductance.
The last equality follows from that the transconductance is the ratio between two
incrementally small quantities at the operating point. This incremental relationship is
shown in Figure3.
A more detail analysis by comparing the last two terms on the right-hand side, one can
show that the last term in (1.7) can be ignoredif
(5.1)

Also, it is seen from the Figure 3 that in order for the small signal analysis to be valid, it is
requiredthat .
Figure 3: Graphical depiction of the small signal analysis for MOSFET (Courtesy of
Sedra andSmith).

(5.2)
Furthermore, it is seen that at the DC operating point, byKVL
VDS = VDD −RDID
If VDD is held fixed, then by KVLagain
vDS = VDD − RDiD = VDD − RD(ID + id) = VDD −RDID −RDid(1.12)
From the above, by first letting vDS = VDS + vds, and then equating the timevarying terms
and the DC terms, one concludes that the time varying part of vDS, or vds, is givenby
vds = −idRD=−gmvgsRD (5.3)
One can define the voltage gainas
(5.4)

Figure 4: Total instantaneous voltage vGS and vDS for the circuit in Figure 2. Note the sign
reversal of the amplified signal (Courtesy of Sedra andSmith).

By looking at the i-v characteristic curve of the MOSFET as shown in Table 2, it is seen
for incremental vds, the current id does not change. This relationship can be modelled by a
current source. Moreover, the gate of the MOSFET is essentially an open circuit at DC.
Hence, the small-signal equivalent-circuit model is presented in Figure 5(a).
Figure 5: The small-signal model for a MOSFET: (a) no Early effect (channel length
modulation effect); (b) Early effect is included by adding ro =|VA|/ID

When the Early effect has to be accounted for, an output resistor ro can be added as
shown in Figure 5(b). The value of ro is givenas
,
where
(5.5)
where VA = 1/λ, and −VA is the negative intercept of the i-vcurve.
Here, ro is typically 10 kΩ to 1000 kΩ. When ro is included, then the voltage gain
becomes
) (5.6)
In other words, the inclusion of ro reduces the voltagegain.
The above analysis can be used for PMOS by noting for the sign change in PMOS,and
by using |VGS|, |Vt|, |VOV |, and |VA| in the formulas, and replacing kn withkp.

Transconductancegm
The transconductance can be looked at with more detailsbyusing ),giving
(5.7)
The transconductance can be increased by increasing the W/L ratio, and also increasing
the overdrive voltage VOV . But increasing VOV implies that the operating point for VDS has
to increase in order for the MOSFET to be in the saturationregion.
Also, by using the factthat
(5.8)
or that VOV =SQRT (2ID/(kn

(W/L)), then gm in (5.7) can be alternatively rewrittenas
gm = SQRT(2kn

) SQRT (W/L)SQRT(ID) (5.9)
implying that gm is proportional to the square roots of the drain current ID, and W/L. At
this point, notethat
1.ThetransconductancegmofaMOSFETisgeometrydependentwhereasthatoftheBJT
isnot.
2.The transconductance of a BJT is much larger than that of aMOSFET.
For example, with biasing point of ID = 50mA,with A/V
2
, with W/L = 1, gm=
0.35 mA/V, whereas when W/L = 100, gm = 3.5 mA/V. But typically, the gm = 20 mA/V
for BJT when IC = 0.5mA.
Alternatively, by seeing that from (1.5) and that gm = knVOV from (1.9), an
by dividing the two equations, it can be shownthat
(6.0)

Since gm is an incremental relationship, this relationship can be shown graphically as in
Figure 6 where the slope is also showngraphically.
Figure 6: The relationship between ID, VOV , and gm as shown in the iD versus vOV curve
(Courtesy of Sedra andSmith).
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