Ch 7 FET biasing Unlike BJT the transfer characteristics (ID vs VGS)of FET being non-linear the mathematical approach to DC analysis is complicated..pptx

Unlike BJT the transfer characteristics (ID vs VGS)of FET being non-linear the mathematical approach to DC analysis is complicated.

1. Introduction Unlike BJT the transfer characteristics (I D vs V GS )of FET being non-linear the mathematical approach to DC analysis is complicated. Although less accurate we will use graphical solution approach, being quicker and most popular. General relationships These are for FET’s and they don’t change with the network configuration (in active region) The network simply defines the level of current and voltage associated with the operating point through its own set of equations

2. Fixed-bias Configuration Both the graphical and mathematical solutions are simple and presented here Can be removed for DC analysis Can be shorted since IG≈0, Mostly there to ensure the appearance of AC signal For DC analysis Therefore KVL @ input Loop V GG being a DC supply is fixed and hence the name Current ID is governed and controlled by input V GS through shockleys equation Mathematical solution is pretty direct VGS being a fixed quantity Use is limited since this network configuration uses two separate supplies

3. Graphical Analysis 3 point graph using Shockley Equ Equ V GS =-V GG from the network describes a straight vertical line on graph. Intersection with FET graph gives operating point Corresponds to measured value KVL@ output loop to find V DS Since

4. Self-Bias Configuration Eliminates the need of two supplies For DC analysis Note: V GS is a function of output I D and not fixed Defined by network Shockley’s equ would relate now the input to output with same variables ( I D and V GS ) permitting either a mathematical or graphical solution Mathematical solution insert Rearrangement gives you quadratic equ Can now be solved for I D

5. Graphical Solution First obtain the “device” graphical transfer characteristics from shockley’s equ Find two points from straight line equ i.e , For I D =0, V GS =0 For I D =I DSS /2, V GS =-I DSS R S /2 Connect these 2 points and draw a straight line. The point of intersection gives Q-point and its projection a solution Once I D and V GS are determined using Q point, then we can proceed to find V DS among other parameters By KVL

6. Now superimposing the two graphs

7. Voltage-Divider Bias Although the basic construction is similar to that of the BJT voltage divider The DC analysis is different Eg , I G =0A, unlike I B (which influences the output current and bias levels). It is the V GS value that takes on that role in a quadratic manner. I R1 =I R2 , since I G =0A (KCL) For Series equivalent circuit appearing to the left Applying KVL to the indicated loop   1. @     So plotting the straight line (not passing through the origin) by connecting the 2 points Point of intersection is Q point. Once determined the rest of the parameter follows

8. Effect of R S  

9. Common-Gate Configuration Applied input@ source terminal Network equation By KVL So that Load line is drawn by connecting the 2 points of a straight line and the intersection determines the operating point Q. By KVL By So that with &

10. SpeciaL Case: V GSQ FET Biasing= v A simple Practically recurring configuration VGS=0V Network equation VGS=0V Vertical Straight Line on y-axis Point of intersection with device transfer characteristics @ By KVL or with &