CMP 221.pptx computer science machine and assembly language

Machine and assembly language

1. CMP 221 Machine and Assembly Language

2. Outline Introduction to Machine Language and Assembly Language Programming - Hardware/Software Interface. Overview of data and instruction representation modes; Computer instruction sets. Modes of memory addressing; Instruction execution and flow of control. Programming in an assembly language e.g. Intel IA -32, MIPS or ARM assembly languages; or Motorola series Inter-facing assembly language programs to high level programs; Laboratory exercises.

3. Introduction Programs and programming languages Types of languages a. Low Level Language Machine Language Assembly language b. High level Language C, C++, Java, Python etc

4. Advantages of High Level Languages Program development is faster Programs are easier to maintain Programs are portable

5. Machine Language Native language of computer 0s and 1s based on the flow of current CPU specific Direct access to the hardware Requires no translator

6. Sample Instruction

7. Machine Language

8. Machine Language cont…

9. Reading Machine Language first nine bits specifies the operation, last 6 (or 7) bits specifies the arguments: 100000010 01 00101 Load Memory 5 --> R1 100000010 10 00101 Load Memory 5 --> R2 1010000100 00 01 10 R1 + R2 --> R0 100000100 00 00110 Store R0 --> Memory 6 1111111111111111 HALT

10. Merit and Demerit of ML Merit Efficient use of computer resources Fast demerit Tedious and cumbersome Prone to error Time consuming Expensive preparation and debugging

11. Assembly Language Machine Language Equivalent Assembly 1000000100100101 LOAD R1, 5 1000000101000101 LOAD R2, 5 1010000100000110 ADD R0, R1, R2 1000001000000110 SAVE R0, 6 1111111111111111 HALT

12. Assembly language Assembler: converts source code programs from assembly language to machine language Linker: combines individual files created by an assembler into a single executable program Debugger: allows you to step through a program while it is running and examine registers and memory Registers : named storage locations in the CPU that hold intermediate results of operations

13. Reasons for assembly language programming Two major reasons: Efficiency (space and time) and accessibility to system hardware. Time efficiency Time convenience applications (to improve performance, e.g graphic package: Time critical applications (real-time applications) e.g aircraft navigation systems, process control systems, robot control software, communication software, target acquisition ( eg missile tracking) software Accessibility to hardware : system software requires direct control of hardware, e.g OS, assembler, compiler, linker, loader, device drivers, network interfaces, video games is an example of applications that require hardware control Space efficiency: important in portable and handheld devices, and spacecraft control system.

14. Reasons for learning assembly language It is useful in writing embedded programs. direct access to computer hardware understanding of the interaction between computer hardware, operating systems and application programs. device drivers subroutines

15. Applications Hardware device driver Embedded systems Computer games requiring direct hardware access

16. Machine Language vs Assembly Language Machine Language Assembly Language Machine language is only understood by the computers. Assembly language is only understood by human beings not by the computers. In machine language data only represented with the help of binary format(0s and 1s), hexadecimal and octadecimal. In assembly language data can be represented with the help of mnemonics such as Mov, Add, Sub, End etc. Machine language is very difficult to understand by the human beings. Assembly language is easy to understand by the human being as compare to machine language. Modifications and error fixing cannot be done in machine language. Modifications and error fixing can be done in assembly language. Machine language is very difficult to memorize so it is not tedious to learn the machine language. Easy to memorize the assembly language because some alphabets and mnemonics are used. Execution is fast in machine language because all data is already present in binary format. Execution is slow as compared to machine language. There is no need of translator. The machine understandable form is the machine language. Assembler is used as translator to convert mnemonics into machine understandable form. Machine language is hardware dependent. Assembly language is the machine dependent and it is not portable.

17. Intel Microprocessors Intel introduced the 8086 microprocessor in 1979 8086, 8087, 8088, and 80186 processors 16-bit processors with 16-bit registers 16-bit data bus and 20-bit address bus Physical address space = 2 20 bytes = 1 MB 8087 Floating-Point co-processor Uses segmentation and real-address mode to address memory Each segment can address 2 16 bytes = 64 KB 8088 is a less expensive version of 8086 Uses an 8-bit data bus 80186 is a faster version of 8086

18. Intel 80286 and 80386 Processors 80286 was introduced in 1982 24-bit address bus  2 24 bytes = 16 MB address space Introduced protected mode Segmentation in protected mode is different from the real mode 80386 was introduced in 1985 First 32-bit processor with 32-bit general-purpose registers First processor to define the IA-32 architecture 32-bit data bus and 32-bit address bus 2 32 bytes  4 GB address space Introduced paging , virtual memory , and the flat memory model Segmentation can be turned off

19. Intel 80486 and Pentium Processors 80486 was introduced 1989 Improved version of Intel 80386 On-chip Floating-Point unit (DX versions) On-chip unified Instruction/Data Cache (8 KB) Uses Pipelining : can execute up to 1 instruction per clock cycle Pentium (80586) was introduced in 1993 Wider 64-bit data bus, but address bus is still 32 bits Two execution pipelines: U-pipe and V-pipe Superscalar performance: can execute 2 instructions per clock cycle Separate 8 KB instruction and 8 KB data caches MMX instructions (later models) for multimedia applications

20. Intel P6 Processor Family P6 Processor Family: Pentium Pro, Pentium II and III Pentium Pro was introduced in 1995 Three-way superscalar : can execute 3 instructions per clock cycle 36-bit address bus  up to 64 GB of physical address space Introduced dynamic execution Out-of-order and speculative execution Integrates a 256 KB second level L2 cache on-chip Pentium II was introduced in 1997 Added MMX instructions (already introduced on Pentium MMX) Pentium III was introduced in 1999 Added SSE instructions and eight new 128-bit XMM registers

21. Pentium 4 and Xeon Family Pentium 4 is a seventh-generation x86 architecture Introduced in 2000 New micro-architecture design called Intel Netburst Very deep instruction pipeline, scaling to very high frequencies Introduced the SSE2 instruction set (extension to SSE) Tuned for multimedia and operating on the 128-bit XMM registers In 2002, Intel introduced Hyper-Threading technology Allowed 2 programs to run simultaneously, sharing resources Xeon is Intel's name for its server-class microprocessors Xeon chips generally have more cache Support larger multiprocessor configurations

22. Pentium-M and EM64T Pentium M ( Mobile ) was introduced in 2003 Designed for low-power laptop computers Modified version of Pentium III, optimized for power efficiency Large second-level cache (2 MB on later models) Runs at lower clock than Pentium 4, but with better performance Extended Memory 64-bit Technology (EM64T) Introduced in 2004 64-bit superset of the IA-32 processor architecture 64-bit general-purpose registers and integer support Number of general-purpose registers increased from 8 to 16 64-bit pointers and flat virtual address space Large physical address space: up to 2 40 = 1 Terabytes

23. IA-32 Processor Architecture modes of operation Protected mode virtual – Real addressing mode System management mode

24. Modes of Operation Real-Address mode (original mode provided by 8086) Only 1 MB of memory can be addressed, from 0 to FFFFF (hex) Programs can access any part of main memory MS-DOS runs in real-address mode Protected mode (introduced with the 80386 processor) Each program can address a maximum of 4 GB of memory The operating system assigns memory to each running program Programs are prevented from accessing each other’s memory Native mode used by Windows NT, 2000, XP, and Linux Virtual 8086 mode Processor runs in protected mode, and creates a virtual 8086 machine with 1 MB of address space for each running program

25. Real Address Mode A program can access up to six segments at any time Code segment Stack segment Data segment Extra segments (up to 3) Each segment is 64 KB Logical address Segment = 16 bits Offset = 16 bits Linear (physical) address = 20 bits

26. Protected Mode Architecture Logical address consists of 16-bit segment selector (CS, SS, DS, ES, FS, GS) 32-bit offset (EIP, ESP, EBP, ESI ,EDI, EAX, EBX, ECX, EDX) Segment unit translates logical address to linear address Using a segment descriptor table Linear address is 32 bits (called also a virtual address ) Paging unit translates linear address to physical address Using a page directory and a page table

27. Logical to Linear Address Translation Upper 13 bits of segment selector are used to index the descriptor table TI = Table Indicator Select the descriptor table 0 = Global Descriptor Table 1 = Local Descriptor Table GDTR, LDTR

28. Registers

29. Basic Program Execution Registers CS SS DS ES EIP EFLAGS 16-bit Segment Registers EAX EBX ECX EDX 32-bit General-Purpose Registers FS GS EBP ESP ESI EDI Registers are high speed memory inside the CPU Eight 32-bit general-purpose registers Six 16-bit segment registers Processor Status Flags (EFLAGS) and Instruction Pointer (EIP)

30. General-Purpose Registers Used primarily for arithmetic and data movement mov eax, 10 move constant 10 into register eax Specialized uses of Registers EAX – Accumulator register Automatically used by multiplication and division instructions ECX – Counter register Automatically used by LOOP instructions ESP – Stack Pointer register Used by PUSH and POP instructions, points to top of stack ESI and EDI – Source Index and Destination Index register Used by string instructions EBP – Base Pointer register Used to reference parameters and local variables on the stack

31. Accessing Parts of Registers EAX, EBX, ECX, and EDX are 32-bit Extended registers Programmers can access their 16-bit and 8-bit parts Lower 16-bit of EAX is named AX AX is further divided into AL = lower 8 bits AH = upper 8 bits ESI, EDI, EBP, ESP have only 16-bit names for lower half

32. Special-Purpose & Segment Registers EIP = Extended Instruction Pointer Contains address of next instruction to be executed EFLAGS = Extended Flags Register Contains status and control flags Each flag is a single binary bit Six 16-bit Segment Registers Support segmented memory Six segments accessible at a time Segments contain distinct contents Code Data Stack

33. EFLAGS Register Status Flags Status of arithmetic and logical operations Control and System flags Control the CPU operation Programs can set and clear individual bits in the EFLAGS register

34. Status Flags Carry Flag Set when unsigned arithmetic result is out of range Overflow Flag Set when signed arithmetic result is out of range Sign Flag Copy of sign bit , set when result is negative Zero Flag Set when result is zero Auxiliary Carry Flag Set when there is a carry from bit 3 to bit 4 Parity Flag Set when parity is even Least-significant byte in result contains even number of 1s

35. Floating-Point, MMX, XMM Registers Floating-point unit performs high speed FP operations Eight 80-bit floating-point data registers ST(0), ST(1), . . . , ST(7) Arranged as a stack Used for floating-point arithmetic Eight 64-bit MMX registers Used with MMX instructions Eight 128-bit XMM registers Used with SSE instructions

36. General Purpose Registers

37. Segment Registers Stack Segment (SS). Pointer to the stack. Code Segment (CS). Pointer to the code. Data Segment (DS). Pointer to the data. Extra Segment (ES). Pointer to extra data ('E' stands for 'Extra'). F Segment (FS). Pointer to more extra data ('F' comes after 'E'). G Segment (GS). Pointer to still more extra data ('G' comes after 'F').

38. EFLAGS Register

39. SYSTEM REGISTERS IDTR (Interrupt Descriptor Table Register) GDTR (Global Descriptor Table Register LDTR (Local Descriptor Table Register) Task Register Debug Register Control registers CR0, CR2, CR3, CR4 Model Specific Registers

40. Number Base Conversions Binary to decimal 1 1 1 0 0 1 2 = 1*2 5 +1*2 4 +1*2 3 +0*2 2 +0*2 1 +1*2 32 + 16 +8 +0 +0 +1 = 57 1 1 10 1.0 1 = 1*2 4 +1*2 3 +1*2 2 +0*2 1 +0*2 -1 +1*2 -2 = 16 +8 +4 +1 +0 +0.25 = 29.25

41. Binary to Octal 10 110 001 101 011 . 111 100 000 110 2 2 6 1 5 3 . 7 4 0 6 8

42. Binary to Hexadecimal 10 1100 0110 1011 . 1111 0000 0110 2 = 2 C 6 B . F 0 6 16

43. DECIMAL TO BINARY 2 91 2 45 r 1 2 22 r 1 2 11 r 0 2 5 r 1 2 2 r 1 2 1 r 0 2 0 r 1 Answer = 1011011 2 EXERCISE: convert to binary 83, 729

44. Decimal to Octal 8 153 8 19 1 8 2 3 8 0 2 Answer = 231 8 Exercise: convert to octal 357,687

45. Decimal to Hexadecimal 31 r 15 16 1 r 1 0 answer = 1F Exercise: convert to hexadecimal : 298, 876

46. OCTAL TO BINARY 120475 8 1 2 0 4 7 5 001 010 000 100 111 101 2 Exercise: convert t binary 3456, 7123

47. OCTAL TO DECIMAL 375 =3*8 2 + 7*8 1 + 5*8 3*64 + 7*8 + 5+1 192 + 56 +5 = 253 Exercise: 4567, 4321

48. OCTAL TO HEXADECIMAL 37 8 3 7 011 111 011111 01 1111 0001 1111 1 15 1 F = IF 16 Exercise : convert to hexadecimal 4567, 4321

49. Octal to hexadecimal 247 8 2 4 7 010 100 111 2 = 010100111 Group in 4’s 0000 1010 0111 0 A 7 = A7 16 36.532 8 to hexadecimal 3 6 . 5 3 2 011 110 . 101 011 010 Group in 4’s 0001 1110 . 1010 1101 1 E . A D = 1E.AD 16

50. Hexadecimal to binary Convert to binary 5AE84 5 A E 8 4 0101 1010 1110 1000 0100

51. Hexadecimal to octal A72E A 7 2 E 1010 0111 0010 1110 1010011100101110 group in 3’s 001 010 011 100 101 110 1 2 3 4 5 6 = 123456 8 4.BF85 16 4. B F 8 5 0100. 1011 1111 1000 0101 Group in 3’s 0 100. 101 111 111 000 010 100 0 4 . 5 7 7 0 2 4 = 4.577024 8

52. R’s and R-1 Complements General formula R’s complement :[2 n ] 10 – N (R-1) complement: [(2 n ) 10 -1]-N Example 1011001 2 1’s complement (2 7 ) 10 -1 – 1011001 2 127 10 – 1011001 2 1111111 – 1011001 = 0100110 2 Alternative: invert all bits

53. 2’s complement 2’s complement 1011001 2 7 10 – N 128 10 - 1011001 2 10000000 2 – 1011001 2 = 0100111 2 Alternative: add 1 to 1’s complement 0100110 + 1 0100111

54. 2’s complement of hexadecimal reverse all bits and add 1 subtract each digit from 15 and add 1 Example 6A3D = 95C2 + 1 = 95C3 95C3 = 6A3C + 1 = 6A3D 21F0 = DE0F + 1 = DE10 DE10 = 21EF + 1 = 21F0

55. Complements 4’s complement of 224 444 – 224 = 220 5’s complement = 220 + 1 =221 9‘s complement of 1000 9999 – 1000 = 8999 10’s complement = 8999 + 1 = 9000

56. 10’s compliment 1) 10’s compliment of 23450 10 - N R =10, N =5 = 10 =76550 10 2) 10’s compliment of 0.2345 n =0, = 0.6755 10’s comp of 23.234 = - 23.324 = 76.676  

57. 9’s compliment -1)- N 9’s compliment of 23450 10 - 1)- N (100000 – 1) – 23450 99999 – 23450 = 76549 10  

58. 8’S compliment 2450 8 ) 10 – 2450 8 4096 10 – 2450 8 4096 10 – 1320 10 = 2776 10 = 5330 8  

59. 16’s compliments 4A30 16 ) 16 ) 10 – (4A30) 16 65536 10 - 4A30 16 65536 10 – 18992 10 46544 10 = B5D0 16  

60. 9’s complement subtraction A=1234 B = 1000 Find the 9’s complement of B and add it to A 9’s complement of B = 8999 1234 8999 10233 Add the carry + 1 00234 = 234

61. 9’s complement subtraction A=1234 B = 3000 9’s complement f B =6999, add it to A 1234 + 6999 = 8233 ans = -(9’s complement of 8233) -1766

62. 10’s complement subtraction A = 1234 B = 1000 10’s complement of B = 9000 1234 9000 Discard the carry 234 A= 1234 B = 3000 10’s complement of B = 7000, add it to A 1234 + 7000 = 8234 Ans = -(10’s complement of 8234) = -1766

63. Signed integers Signed integers are positive or negative, the MSB indicates the sign 0 is positive and 1 is negative 0111111 positive 1011011 negative

64. Converting signed binary to hexadecimal Example: 1111 0000 starting value 1111 0000 step1: reverse the bits 0000 1111 step2: add 1 + 1 step3: form 2’s compliment 0001 0000 step4: convert to decimal 1*2 4 =16 Because the original integer (11110000) was negative, it decimal value is -16.

65. Converting signed decimal to binary Example: -43 Binary representation of 43 is 00101011 Two’s compliment 11010100 +1 = 11010101 -43 is 11010101

66. Converting signed decimal to hexadecimal Convert the absolute value of the decimal integer to hexadecimal If the original decimal integer was negative, form the two’s compliment of the hexadecimal number from the previous step E.g. -567 10 Convert absolute value 567 to hexadecimal 16 567 16 35 R 7 16 2 R 3 16 0 R 2 = 237 16 Form the 2’s complement of 237 = D C 8 +1 = D C 9 16

67. Converting signed hexadecimal to decimal If the hexadecimal integer is negative, form its two’s compliment otherwise retain the integer Using the integer from the previous step, convert it to decimal. If its original value was negative, attach a minus sign to the beginning of the decimal integer E.G convert DC9 16 to decimal Form the two’s compliment of DC9. Invert each digit and add 1 DC9 = 236 +1 = 237 Convert to decimal 2+16 2 + 3*16 + 7 = -567 10

68. Boolean Operations values true and false NOT : ~ or ¬ or ʹ AND: Ʌ or ∙ OR: ˅ or + Operator Precedence Parenthesis to avoid ambiguity

69. Real number constants decimal real {sign} integer . {integer} {exponent} Examples: 2. , +3.0 , +44.2E+05 encoded real real number in hexadecimal using the IEEE floating point format

70. Integer Constants [{+/-} digits {radix}] h hexadecimal r encoded real b/y binary q/o octal d/c decimal if no radix is given, the integer is assumed as decimal 26 /26d decimal 42o/42q octal 1A3h/0A3h hexadecimal  

71. Integer Expression -(3 + 4) * (6 - 1) = -35 -3 + 4 * 6 – 1 = 20

72. IA-32 Character Constants : ‘A’ ,”G” String Constant : ‘Ade’, “Redeemer’s University” Reserved words Mnemonic eg MOV, ADD, SUB, MUL Directives attributes which provide size and usage information for variables and operands e.g Byte, word operators used in constant expressions Predefined symbols such as @data, Directives recognized and acted upon by the assembler. They do not execute at run time

73. Assembly Language Statements All assembly instructions, assembler directives and macros use the following format: [label] mnemonic [operands] [; comment] label : Data Labels, Code Labels mnemonic/ opcode : Mov , add, ca, sub, jmp operands: 0 – 3, memory, register, constant or I/O eg STC Comment : Description of program’s purpose programmer’s name, dates etc Comments can be Single line or Block comments ; This line is a comment COMMENT! This line is a comment This line is a also comment !

74. Example: program to add three integers TITLE Add and Subtract {TITLE directive marks the entire line as a comment} ; this program add and subtracts 32-bit integers .code {.code directive marks the beginning of the code segment, where all executable statement in the program are located} Main PROC {identifies the beginning of a procedure} mov eax , 10000h ; EAX = 10000h add eax , 40000h ; EAX = 50000h sub eax , 20000h ; EAX = 30000h call DumpRegs ; displays register exit {calls a predefined MS-Windows function that halts the program} main ENDP {marks end f main procedure} END main

75. Operand Addressing Modes Addressing mode: ways of specifying operands Instruction itself (immediate) Registers Memory locations I/O port

76. Immediate addressing operand is in the instruction. The effective address is within the instruction. Example instruction: mov eax , 26 All arithmetic instructions except DIV and IDIV instructions allow the source operand to be an immediate value

77. Register addressing mode operand is in a register. Source and destination operands are located in any of the registers The effective address is the register. mov eax , ecx

78. Direct Addressing mode operand is in memory and the address is specified as an offset (effective address). The offset part of a memory address can be specified either directly or as a static value (displacement) or through an address computation made up of one or more of the following components: displacement, base, index scale factor (value of 2,4 or 8 multiplied by the index value) Offset = Base + (index * scale) + Displacement Example: mov eax , var_name

79. Direct Addressing mode Base register can be EAX, EBX, ECX, EDX, ESP or EBP Index register can be EDI or ESI Scaling factor is 1,2,4,or 8 [EAX] + [EDI *2] + 80 The effective address calculated with be the contents of register EDI multiplied by 2 added to the constant 80, added to the contents of register EAX.

80. Register Indirect Addressing operand is found at the memory location specified by the register. The register is enclosed in square bracket e.g mov EAX, [EBX]

81. INSTRUCTION SET Data movement / Transfer Instructions Syntax: mov destination, source variants: mov reg , reg e.g mov EAX, EBX mov mem , reg e.g mov var2, EAX mov reg , mem e.g mov EAX, var2 mov reg , imm e.g mov EAX, 16 mov mem , imm e.g mov var2, 16 Operands must be of the same size. Both operands cannot be memory operands

82. .data var1 WORD var2 WORD .code Mov ax, var1 Mov var2, ax

83. MOVZX instruction (move with zero extend) copies the contents of a source operand into a destination operand and zero extends the value to 16 r 32 bits used with unsigned integers. movzx r32, r/m8 ; zero extend and copy data movzx r32, r/m16 ; r32 32-bit register, movzx r16, r/m8 ; r/m8 8-bit example: movzx AX, 10001111b ; AX = 0000000010001111b mov bx , 0A69Bh movzx eax , bx ;EAX = 0000A69Bh movzx edx , bl ; EDX = 0000009Bh movzx cx, bl ; CX = 009Bh Movzx ebx , bh ; EBX =000000A6h

84. MOVSX instruction move with sign extend: copies the contents of a source operand into a destination operand and sign extends the value to 16 or 32 bits. used for signed integers movsx r32, r/m8 ; sign extend and copy data movsx r32, r/m16 ; sign extend and copy data movsx r16, r/m8 ; sign extend and copy data repeat smaller operand’s highest bit throughout the extended bits in the destination operand movsx ax, 10001111b ; AX = 1111111110001111b mov bx , 0A69Bh movsx eax , bx ; EAX = FFFFA69Bh movsx edx , bl ; EDX = FFFFFF9Bh movsx cx , bl ; CX = FF9Bh

85. LAHF and SAHF instructions Load status flags in AH, copies the low byte of the EFLAGS register into AH. .data saveflags BYTE ? .code LAHF ; load flags into AH mov saveflags , ah ; move them in a variable

86. SAHF instruction (store AH into status flags) : copies AH into the low byte of the EFLAGS register. mov ah, saveflags ; load saved flags into AH sahf ; copy into flags register * sign, zero, auxiliary carry, parity and carry

87. XCHG instruction (exchange data): exchanges the contents of two operands. Xchg reg , reg Xchg reg , mem Xchg mem , reg Example: Xchg ax, bx Xchg var1, bx

88.  LEA (Load Effective Address): calculates and loads the 16-bit or 32-bit effective address of a memory operand. LEA reg , mem Example: lea EBX, loop_top ; put the address assigned ;(by the assembler) to ;label loop_top into ;register EBX

89. Arithmetic Instructions INC instruction (increment) adds 1 to a single operand , INC reg / mem DEC (decrement) subtracts 1 from a single operand, DEC reg / mem overflow sign, zero, auxiliary carry and parity flags are changed according to the value of the operand .data myword WORD ;1000h  .code inc myword ;1001h mov bx , myword dec bx ;1000h

90. Add AND Sub instructions ADD instruction: adds a source operand to a destination operand of the same size ADD dst , src SUB instruction : subtracts a source operand from a destination operand SUB dst , src The flags are changed accordingly NEG instruction (negate): reverses the sign of a number by converting the number to its two’s compliment NEG reg NEG mem

91. AND : Boolean AND on each pair of matching bit AND destination, source AND reg, reg AND reg, mem AND mem, reg 00111011 AND reg, imm AND 00001111 AND mem, imm 00001011 E.g MOV AL, 00111011b AND AL, 00001111b ;AL= 00001011 BOOLEAN AND COMPARISON INSTRUCTIONS

92. OR Instruction OR: Boolean OR between pairs of matching bits OR reg, reg OR reg, mem OR mem, reg 00111011 OR reg, imm OR 00001111 OR mem, imm 00111111 E.g MOV AL, 00111011b OR AL, 00001111b ; AL = 00111111

93. XOR Instruction XOR: Boolean exclusive OR on matching bits XOR reg, reg XOR reg, mem XOR mem, reg 00111011 XOR reg, imm AND 00001111 XOR mem, imm 00110100 E.g MOV AL, 00111011b XOR AL, 00001111b ; AL = 00110100

94. NOT instruction NOT: Toggles all bits in an operand (Compliment) NOT reg NOT mem E.g mov AL, 11110000b NOT AL ; AL = 00001111

95. Test Instruction TEST: implied AND between pairs of matching bits Does not modify the destination operand like AND TEST AL, 00001001 ; test bits 0 and 3 E.g 00100101 00001001 00000001

96. CMP instruction CMP: implied subtraction of source from destination operand CMP destination, source E,g mov ax , 5 cmp ax , 10 CF = 1

97. Jump and Loop Instructions Transfer of control Types Conditional Unconditional JMP destination JMP m ; unconditional jump

98. Conditional Jump Steps 1. operation that modifies the CPU flag 2. evaluate the flag and branch to a new address Types 1. based on specific flag values 2. based on equality between operands or the value of ECX 3. based on comparison of unsigned operands 4. based on comparison of signed operands

99. Unconditional jump based on flag values Jcond destination Jnc (jump if not carry) Jc (jump if carry) Jo jump if overflow Jno : jump if not overflow Js: jump if signed Jns : jump if not signed Jp : jump if parity Jnp : jump if not parity

100. Conditional jump Based on equality JE : jump if equal ( leftOp = rightOp ), JNE, JCXZ, JECXZ (jump if ECX = 0) e.g mov edx , 0A53h cmp edx , 0A53h jne L5 ; jump not taken je L1 ; jump is taken

101. Conditional jump Based on unsigned comparison JA: jump if above, i.e if leftOp > rightOp JNA: jump if not above JB: jump if below JNB: jump if not below JNBE: jump if not below or equal JAE: jump if above or equal JNAE: jump if not above or equal JBE: jump if below or equal e.g mov al, 7Fh ; (+127) cmp al, 80h ; (-128) ja IsAbove ; no jump, because 7Fh > 80h jg IsGreater ; jump, because +127 > -128

102. Conditional jump Based on signed comparison JG: jump if greater (if leftOp > rightOp ) JNLE: jump if not less than or equal JGE: jump if greater than or equal JNL: jump if not less JL: jump if less JNGE: jump if not greater or equal JLE: jump if less or equal JNG: jump if not greater e.g mov edx , -1 cmp edx , 0 JNL L5 ;jump not taken

103. Shift and rotate instructions Shifting means to move bits right and left inside an operand. Logical Shifts Arithmetic Shifts Logical Shift: fills new positions with zeros   110001111, produce 011000111, CF = 1 Arithmetic shift: fills the newly created bit position with a copy of the original number’s sign bit E.g 110001111, produce 11100111 CF = 1

104. Logical Shift SHL (shift left): shifts destination operand to the left, fills the empty space with zero, copies the MSB into CF SHL destination, count E.g. MOV al, 10100111b SHL al, 2 ;AL=10011100, CF= 0 Fast multiplication : multiply an operand by 2 n E.g mov dl, 5 ; DL = 00000101 shl dl, 1 ; DL = 00001010 CF = 0

105. SHR (shift right): shifts destination operand to the right and replace empty space with 0, copies LSB into CF mov al, 0D0h ;AL = 11010000b shr al, 1 ; AL = 01101000b CF = 0 fast division: logically shifting an unsigned integer right by n bits divides the operand by 2 n . mov dl, 32 ; DL = 00100000 shr dl, 1 ; DL = 00010000 e.g mov al, 01000000 shr al, 3 ; AL = 00001000

106. Arithmetic Shift SAR (shift Arithmetic Right) SAR destination, count e.g mov al, 0F0h ;AL = 11110000b (-16) sar al, 1 ; AL = 11111000 (-8) CF = 0 signed division: divide a signed operand by a power of 2, using SAR mov dl, 128 ;DL = 10000000 sar al, 3 ;Dl = 11110000b

107. SAL (Shift Arithmetic Left) SAL destination, count E,g MOV DL, 0A5h ;DL = 10100101 SAL DL, 3 ; DL = 00101111 CF= 1 sign extend AX into EAX. First shift EAX 16 bits to the left, then shift it arithmetically 16 bits to the right. mov ax, -128 ; EAX = ????FF80h shl eax , 16 ; EAX = FF800000h sar eax , 16 ; EAX = FFFFFF80h

108. Rotate instruction Rotate left: shifts each bit to the left, copies MSB into the carry flag and the lowest bit position mov al, 40h ; AL = 01000000b rol al, 1 ; AL = 10000000b CF =0 rol al, 1 ; AL = 00000001 CF = 1 multiple rotations: when using a rotation count greater than 1, the carry flag contains the last bit rotated out of the MSB position. Exchanging groups of bits: ROL can change the upper bit (4 – 7) and lower bits (0 - 3) halves of a byte. mov al, 26h ; AL = 00100110b rol al, 4 ; AL = 01100010b = 62h

109. ROR Instruction (Rotate right): shifts each bit to the right, copies the lowest bit into the carry flag and the highest bit position. mov al, 01h ;AL= 00000001b ror al, 1 ; AL = 10000000b CF = 1 ror al, 1 ; AL = 0100000 CF = 0

110. RCR (Rotate Carry Right): shifts each bit to the right, copies the carry flag into MSB and copies the LSB into the CF. Stc ; set carry flag, CF = 1 mov ah, 10h ; AH = 00010000, CF = 1 rcr ah, 1 ; AH = 10001000 CF = 0

111. Shift double instruction SHLD (shift left double): shift destination operand to the left, fill the empty spaces with the MSB of source operand SHLD destination, source, count E.g. .data wval WORD 9BA6h .code mov ax, 0AC36h ; AX = AC36h shld wval , ax, 4 ; wval = BA6Ah

112. SHRD (shift right double): shift destination operand to the right, fill the empty spaces with the LSB of source operand E.g.   mov ax, 234Bh ; AX = 234Bh mov dx, 7654h ; DX = 7654h shrd ax, dx, 4 ; AX = 4234h

113. Binary Multiplication EAX * 36 = EAX * (32 + 4) = EAX * (2 5 + 2 2 ) = ( EAX * 2 5 ) + (EAX * 2 2 ) .code mov eax , 123 mov ebx ,, eax shl eax , 5 ; multiply by 2 5 shl ebx , 2 ; multiply by 2 2 add eax , ebx ; add the product  

114. Assembly Program Template TITLE Program template TITLE INCLUDE .686,.model flat, std call, include Irvine 32.inc . data ; insert variables here .s tack .code main PROC ; insert executable instructions here exit main ENDP ; insert additional procedures here END main

115. Assembler – Linker- Executable Cycle

116. Defining Data BYTE: 8 bits SBYTE WORD: 2 BYTEs, 16 bits SWORD, DWORD,: 2 WORDs, 4 BYTEs, 32 bits {name} directive initialize, initialize, ………….

117. Defining BYTE and SBYTE the BYTE (define byte) and SBYTE (define signed byte) directives allocate storage for one or more unsigned or signed values. Each initialize writes into 8 bits of storage value1 byte ‘A’ ; character constant value2 byte 0 ; smallest unsigned byte value4 byte -128 ; smallest signed byte value5 byte ? ; uninitialized variable, ;meaning it will be ;assigned at runtime

118. Defining String string of characters, are enclosed in single or double quotation marks. most common type of string ends with a null byte (containing 0)called a null-terminated string greetings1 BYTE “Good morning” , 0 a string can be spread across multiple lines greeting1 BYTE “welcome to assembly language demo class” BYTE “for 200l class”, 0dh,0ah Hexadecimal codes 0Dh and 0Ah are called CR/LF (carriage return line feed/ end of line characters) character (\) concatenates two source code lines into a single statement greetings1 BYTE “Welcome to CMP221 class” and greetings1 \ BYTE “Welcome to CMP221 class ”

119. Instruction Description MOVSB,MOVSW, MOVSD ;move string data. CMPSB, CMPSW, CMPSD ;compare strings. SCASB, SCASW,SCASD ;Scan String: STOSB, STOSW, STOSD ;store string data: LODSB, LODSW, LODSD ; Load accumulator from string

120. DUP operator Allocates storage for multiple data items BYTE 20 DUP (0) ;20 bytes, all equal to zero BYTE 20 DUP (?) ;20 bytes, uninitialized BYTE 4 DUP (“STACK”) ;”STACKSTACKSTACKSTACK”

121. Defining WORD or SWORD The WORD (define word) and SWORD (define signed word) directives allocate storage for one or more signed or unsigned values. Each initializer writes into 16 bit storage word1 WORD 65535 val1 DW 65535 val2 DW -32768 DW: Double Word directive allocate 32 bit storage for each initializer.

122. Array of Words create an array of words by listing the elements or using the DUP operator mydata WORD 1, 2, 3, 4, 5   array WORD 5 DUP(?) {provides a convenient way to initialize multiple words} DWORD, SWORD :32bit integers QWORD : 64-bits TBYTE : 80 bits

123. Sample program Write a program that adds and subtracts three integers using only 32-bit registers Title Add and Subtract INCLUDE Irvine 32 .data Val1 DWORD 10000h Val2 DWORD 40000h Val3 DWORD 20000h Finalval DWORD ? .code Main PROC mov eax , val1 add eax , val2 sub eax , val3 mov finalval , eax call DumpRegs exit main ENDP END main

124. TITLE Fibonacci calculator INCLUDE Irvine 32.inc .data Prev DWORD 0 Value DWORD 1 next DWORD ? Count DWORD 1 .code Main PROC mov ecx , 12 L1: mov count, ecx mov eax , prev mov ebx , value add eax , ebx mov next, eax mov ebx , value mov prev , ebx mov eax , next mov value, eax call DumpRegs loop L1 exit main ENDP END main

125. Assembly in C #include<stdio.h>   void main() {      int a = 10, b = 20, c;           asm  {         mov  eax , a         mov  ebx , b         add  eax , ebx          mov c, eax       }           printf ("c= % d",c );   }  

126. System Call System calls are APIs for the interface between the user space and the kernel space. steps for using Linux system calls in your program − Put the system call number in the EAX register. Store the arguments to the system call in the registers EBX, ECX, etc. Call the relevant interrupt (80h). The result is usually returned in the EAX register. EBX, ECX, EDX, ESI, EDI, and EBP. These registers take the consecutive arguments, starting with the EBX register.

127. System Calls mov eax,1 ; system call number ( sys_exit ) int 0x80 ; call kernel mov edx,4 ; message length mov ecx,msg ; message to write mov ebx,1 ; file descriptor ( stdout ) mov eax,4 ; system call number ( sys_write ) int 0x80 ; call kernel the use of the system call sys_write − the use of the system call sys_exit