D flip Flops
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Size: 1.22 MB
Language: en
Added: May 12, 2020
Slides: 12 pages
Slide Content
D Flip-Flop
Today's Topic Sequential Logic Circuits D Flip - Flop
D Flip-Flop D flip – flops are also called as “Delay flip – flop” or “Data flip – flop”. They are used to store 1 – bit binary data. They are one of the widely used flip – flops in digital electronics. D flip – flops are also considered as Delay line elements and Zero – Order Hold elements.
D Flip-Flop D flip – flop has two inputs , and two outputs a clock ( CLK ) input and a data ( D ) input And outputs are one is main output represented by Q and the other is complement of Q represented by Q’. The symbol of a D flip – flop is shown below.
Construction & Logic Circuit A D flip – flop is constructed by modifying an SR flip – flop. The major drawback of SR flip – flop is the race around condition which in D flip – flop is eliminated The S input is given with D input and the R input is given with inverted D input .
Clk D Q Q’ ↑ » 1 1 ↓ » NC NC ↑ » 1 1 1 ↓ » 0 1 NC NC D Flip-Flop Truth Table
D Flip-Flop Truth Table CLK D Q Q’ State +ve 1 RESET +ve 1 1 SET -ve X Q Q’ No Change Positive going edge / rising edge Negative going edge / Falling edge
D Q(t) Q(t+1) State RESET 1 RESET 1 1 SET 1 1 1 SET Characteristic Table of D Flip-Flop
Edge triggered D Flip Flop Outputs
Applications Data storage registers. Data transferring as shift registers. Frequency division circuits. Delay elements