DECADE COUNTER.pdf .......................

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1. A
MINOR PROJECT
REPORT
ON
“DECADE COUNTER ’’

DEPARTMENT OF
ELECTRONICS & TELECOMMUNICATION .ENGINEERING




NAME OF THE STUDENT:- REGD NO:-
1.NAROTTAM KAMILA 2201225123
2.RANJIT BEHERA 2291225126
3.SHALINI DAS 2201225127
4.SUBHADARSHINI JENA 2201225132
5.SHUBHRANSHU BARIK 22012251



STAFF HANDLING MINOR PROJECT SIGNATURE OF H.O.D
MRS PRABHATI SETHY MRS PRABHATI SETHY

2. This is to certify that Mr. Narottam kamila, bearing Roll No. 22-ET/15 and
university Registration No. 2201225123 has submitted the minor project report
entitled “DECADE COUNTER” as partial fulfilment for my degree of Bachelor
of Technology in Electronics & Telecommunication Engineering of Balasore
College Of Engineering & Technology ,Sergarh ,Balasore under our
supervision and guidance. We wish him all success and luck for his future
endeavor.























HOD OF ETC PROJECT GUIDE
PROF. PRABHATI SETHI PROF. PRABHATI SETHI

3. I Mr. Narottam kamila do here by declare that the minor project report entitled as
“DECADE COUNTER’’ submitted by me. This is an original piece of work done by
me under the guidance of Prof. PRABHATI SETHY , HOD of Electronics &
Telecommunication engineering, BCET, Sergarh Balasore. This report is submitted as
a part for the parti fulfilment of my degree and is not submitted to any other institute
in any other form or not published at any time before.

4. The satisfaction that accompanies the successful completion of any task would
be incomplete without the people, whose constant guidance and encouragement
crowns all efforts with success. I express my deep sense of gratitude to Prof.
PRABHATI SETHY, H.O.D of Electronics & Telecommunication Engineering
for the initiative and constant inspiration. Lastly, words run to express my
gratitude to all the lecturers and friends for their co-operation, constructive
criticism, and their valuable suggestion during the preparation of this minor
project report.






















Name-MR. NAROTTAM KAMILA
Roll-No-22-ET/15
RegdNo-2201225123

5. CONTENTS

1. Abstract
2. Introduction
3. Objectives
4. Literature Review
5. Basic Theory of Counters
6. Types of Counters
7. Decade Counter – Overview
8. Working Principle
9. Design using TTL IC 7490/7493
10. Truth Table
11. Timing Diagram
12. Circuit Diagram (Placeholder)
13. Applications of Decade Counter
14. Advantages and Limitations
15. Practical Implementation
16. Simulation Results (Placeholder)
17. Result and Discussion
18. Conclusion
19. Future Scope
20. References

6. 1.Abstract
A decade counter is a digital counting circuit capable of counting from 0 to 9 (ten
states). It automatically resets after reaching its maximum count, making it an
essential component in digital clocks, frequency dividers, and digital measurement
systems. This report discusses the design, working, and applications of the decade
counter using TTL (Transistor–Transistor Logic) ICs such as IC 7490. The project
demonstrates fundamental concepts of sequential logic circuits and digital system
design.

7. 2. Introduction
Counters are fundamental building blocks in digital electronics. A counter is a
sequential circuit that records the number of occurrences of an event.
The decade counter, as the name suggests, counts ten unique states (0–9) and then
resets to zero. Such counters are widely used in digital electronics applications where
decimal counting or division of frequency by ten is required.





3. Objectives
• To understand the design and operation of a decade counter.
• To study TTL-based counter ICs such as 7490.
• To analyze the circuit and timing diagram of a 0–9 counting system.
• To explore applications in digital systems such as clocks, frequency dividers,
and timers.




4. Literature Review
Digital counters have evolved with the development of logic families, from RTL and
DTL to TTL and CMOS technologies.
The IC 7490 (TTL Decade Counter) is among the earliest and most reliable decade
counters developed by Texas Instruments. It is commonly used in laboratory
experiments and industrial counting devices

8. 5. Basic Theory of Counters
A counter is a sequential logic circuit that goes through a prescribed sequence of
states upon the application of input pulses.
Counters are classified as:
• Synchronous counters: All flip-flops are triggered simultaneously by a common
clock.
• Asynchronous (Ripple) counters: The output of one flip-flop triggers the next.



6. Types of Counters
1. Binary Counter
2. BCD (Binary-Coded Decimal) Counter
3. Ring Counter
4. Johnson Counter
5. Decade Counter
6. Up/Down Counter
7. Mod-N Counter



7. Decade Counter – Overview
A decade counter is a MOD-10 counter, meaning it counts ten distinct states before
resetting.
It can be implemented using JK flip-flops or TTL ICs like 7490. The IC 7490 is a 4-bit
asynchronous counter that can be configured for MOD-2, MOD-5, or MOD-10
operation.

9. 8. Working Principle
The decade counter counts clock pulses applied to its input terminal. After every ten
input pulses, the counter resets to zero.
The IC 7490 has internal divide-by-2 and divide-by-5 sections, which when cascaded
give a divide-by-10 operation.






9. Design Using TTL IC 7490
Pin No. Symbol Description
1 QA Output A (LSB)
12 QB Output B
9 QC Output C
8 QD Output D (MSB)
14 CLK A Clock input for ÷2 section
1 CLK B Clock input for ÷5 section
2, 3 R1, R2 Reset pins
6, 7 R9, R10 Set pins
5 GND Ground
11 VCC +5V Power supply
Figure Placeholder: Pin configuration diagram of IC 7490.

10. 10. Truth Table
Decimal Count Binary Output (QD QC QB QA)
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
Reset to 0 0000

11. 11. Timing Diagram
Placeholder: Insert waveform showing QA, QB, QC, and QD transitions corresponding
to clock pulses.

12. Circuit Diagram
Placeholder: Insert circuit diagram showing IC 7490 connected with clock, reset, and
output LEDs.

12. 13. Applications of Decade Counter
• Digital clocks and timers
• Frequency division (divide-by-10 circuits)
• Digital event counting
• Display driving for 7-segment LEDs
• Pulse counting in measurement systems







14. Advantages and Limitations

Advantages:
• Simple and cost-effective design
• Readily available TTL ICs
• Reliable operation


Limitations:
• Limited counting range (0–9)
• Speed restricted by propagation delay
• Power consumption higher than CMOS equivalents

13. 15. Practical Implementation
A practical decade counter circuit can be built using IC 7490, a clock pulse generator
(e.g., 555 timer), and LEDs for output indication.
Each LED represents one binary output (QA–QD), and the counter cycles through the
10 states as the clock pulses are applied.
Placeholder: Insert photo/screenshot of breadboard circuit.



16. Simulation Results
Placeholder: Insert screenshots from Multisim or Proteus showing decade counter
operation.



17. Result and Discussion
The decade counter successfully counts 0–9 and resets back to zero upon the 10th
pulse. The experimental and simulated outputs match the expected theoretical
waveform, validating the MOD-10 operation of IC 7490.

14. 18. Conclusion
The decade counter is a fundamental digital circuit widely used for counting and
frequency division applications.
Through this study, the design, working, and application of TTL-based decade
counters are effectively demonstrated. The practical results confirm the theoretical
understanding of sequential circuits and logic design.




19. Future Scope
• Implementation using CMOS (IC 4017) for low power consumption.
• Integration with microcontrollers for automatic event counting.
• Use in real-time clock and digital display systems.

15. 20. References
1. R.P. Jain, Modern Digital Electronics, Tata McGraw Hill.
2. Morris Mano, Digital Logic and Computer Design.
3. Floyd, Digital Fundamentals.
4. Datasheet: Texas Instruments IC SN7490A.
5. Online resources: www.electronics-tutorials.ws