Design and testing of Voltage Regulator using 723

Design and testing of Voltage Regulator using 723

1. Design and testing of Voltage Regulator using 723 Experiment no. 9

2. Circuit Connection for testing IC 723. Pin Diagram of IC 723.

3. Aim : To design low voltage regulator using 723 and obtain load & line regulations.

4. Aim : To design High voltage regulator using 723 and obtain load & line regulations.

5. UNIT-III- DATA CONVERTERS Data Converters: Introduction, Basic DAC techniques, Different types of DACs-Weighted resistor DAC, R-2R ladder DAC, Inverted R-2R DAC, Different Types of ADCs – Parallel Comparator Type ADC, Counter Type ADC, Successive Approximation ADC and Dual Slope ADC,DAC and ADC Specifications.

6. Introduction-Data Conversion Basically we have two types of data in nature: Analog and Digital . Analog: continuously valued signal, such as temperature or speed, with infinite possible values in between. Digital: discretely valued signal, such as integers, encoded in binary Data transmission – Electrical wires (for analog) and data bus (for digital). Most of the real-world physical quantities are in analog form. Data storage and processing – Analog versus Digital . (That’s the idea for data conversion!!!) Digital data processors – Microprocessors , DSPs , FPGAs etc. when a data conversion needed? – When digital devices interface with analogue devices and vice versa.

7. Data Conversion Circuits Digital-to-Analog (D/A) and Analog-to-Digital (A/D) converters (DAC and ADC). Application of A/D and D/A converters Today, both ADC and DAC are available in IC form.

8. ADC and DAC Applications – digital audio recording and playback, computers, data acquisition, digital multimeter , digital control, digital signal processing, microprocessor based instrumentation. Since most of the ADCs use DACs in their inside, we have to discuss DAC first.

9. What is a DAC? A digital to analog converter (DAC) converts a digital signal to an analog voltage or current output. DAC’s current or voltage analog output is proportional to the weighted sum of digital inputs (characteristic of a linear circuit) . For a voltage output DAC,

10. Contd … Each binary number sampled by the DAC corresponds to a different output level.

11. What a DAC Looks Like

12. Types of DACs Many types of DACs available. Usually switches, resistors, and op-amps used to implement conversion Three Types: Binary Weighted Resistor R-2R Ladder Inverted R-2R Ladder DAC

13. Binary Weighted Resistor Utilizes a summing op-amp circuit Weighted resistors are used to distinguish each bit from the most significant to the least significant Transistors are used to switch between V ref and ground (bit high or low)

14. Contd..

15. Binary Weighted Resistor Advantages Simple Construction/Analysis Fast Conversion Disadvantages Requires large range of resistors (2000:1 for 12-bit DAC) with necessary high precision for low resistors Requires low switch resistances in transistors Can be expensive. Therefore, usually limited to 8-bit resolution.

16. R-2R Ladder DAC – Equation 3-bit R-2R Ladder DAC (Voltage mode)

17. R-2R Ladder Each bit corresponds to a switch: If the bit is high, the corresponding switch is connected to the inverting input of the op-amp. If the bit is low, the corresponding switch is connected to ground.

18. R-2R Ladder V ref V 2 V 1 V 3 2R 2R V 3 Ideal Op-amp

19. R-2R Ladder V ref V 2 V 1 V 3 V out V 2 V 3 R R Likewise, I

20. V ref V 2 V 1 V 3 R-2R Ladder Results: Where b 3 corresponds to bit 3, b 2 to bit 2, etc. If bit n is set, b n =1 If bit n is clear, b n =0

21. R-2R Ladder For general n-Bit R-2R Ladder or Binary Weighted Resister DAC For a 4-Bit R-2R Ladder

22. R-2R Ladder Summary Advantages Only 2 resistor values Does Not Require High Precision Resistors. Disadvantages Lower Conversion Speed Than Binary Weighted DAC Summary Better than weighted resistor DAC

23. Comparision Binary Weighted Resistor vs. R-2R Ladder

24. Inverted R-2R Ladder DAC The inverting R/2R ladder DAC works on the principle of summing currents and it is also said to operate in the current mode. An important advantage of the current mode is that all ladder node voltages remain constant with changing input codes, thus avoiding any shutdown effects by stray capacitances. In inverted R/2R ladder DAC, Position of the MSB & LSB is interchanged, Current flowing in the resistances is constant and independent of switch position.

25. Advantages 1. The major advantage of Inverted R-2R ladder D/A converter is that the voltage change across each switch is minimal. So the charge injection is virtually eliminated and the switch driver design is made simpler. 2. In Current mode or inverted ladder type DACs, the stray capacitance do not affect the speed of response of the circuit due to constant ladder node voltages. So improved speed performance.

26. Applications Generic Use Circuit Components Audio and Video Oscilloscopes/Generators Motor Controllers

27. Applications Generic Use Used when a continuous analog signal is required. Signal from DAC can be smoothed by a Low pass filter Orlando Carreon

28. Applications Circuit Components Voltage controlled Amplifier Digital input, External Reference Voltage as Control Digitally operated attenuator External Reference Voltage as Input, Digital Control Programmable Filters Digitally Controlled Cutoff Frequencies

29. Applications Audio Most modern audio signals are stored in digital form and in order to be heard through speakers they must be converted into an analog signal. CD Players - Digital Telephones MP3 Player - Hi-Fi Systems Video Video signals from a digital source must be converted to analog form if they are to be displayed on an analog monitor - Computers - Digital Video Player

30. Applications Oscilloscopes/Generators Digital Oscilloscopes Digital Input Analog Output Signal Generators Sine wave generation Square wave generation Triangle wave generation Random noise generation

31. Applications Motor Controllers Cruise Control Valve Control Motor Control

32. Analog to Digital Converters (ADCs) An Analog to Digital Converter (ADC) converts an analog signal into a digital signal. The digital signal is represented with a binary code, which is a combination of bits 0 and 1. ADC Provides a link between the analog world of transducers and the digital world of signal processing and data handling. ADC are used virtually everywhere where an analog signal has to be processed, stored, or transported in digital form. Some examples of ADC usage are digital voltmeters, cell phone, thermocouples, and digital oscilloscope.

33. A/D Conversion process Converts analog signals into binary words

34. Analog  Digital Conversion 2-Step Process: Two main steps of process Sampling and Holding Quantization and Encoding Quantizing - breaking down analog value is a set of finite states Encoding - assigning a digital word or number to each state and matching it to the input signal t t Input: Analog Signal Sampling and Hold Quantizing and Encoding

35. ADC Process t Sampling & Hold Measuring analog signals at uniform time intervals Ideally twice as fast as what we are sampling Digital system works with discrete states Taking samples from each location Reflects sampled and hold signal Digital approximation

36. Step 1: Quantizing Example: You have 0-10V signals. Separate them into a set of discrete states with 1.25V increments. (How did we get 1.25V? See next slide…) Output States Discrete Voltage Ranges (V) 0.00-1.25 1 1.25-2.50 2 2.50-3.75 3 3.75-5.00 4 5.00-6.25 5 6.25-7.50 6 7.50-8.75 7 8.75-10.0

37. Quantizing The number of possible states that the converter can output is: N=2 n where n is the number of bits in the AD converter Example: For a 3 bit A/D converter, N=2 3 =8. Analog quantization size: Q=(V max -V min )/N = (10V – 0V)/8 = 1.25V

38. Encoding Here we assign the digital value (binary number) to each state for the computer to read. Output States Output Binary Equivalent 000 1 001 2 010 3 011 4 100 5 101 6 110 7 111

39. Types of ADC There are two types of ADCs: Direct type ADCs and Indirect type ADC. If the ADC performs the analog to digital conversion directly by utilizing the internally generated equivalent digital (binary) code for comparing with the analog input, then it is called as Direct type ADC. The following are the examples of Direct type ADCs − Flash type or Parallel type ADC Counter type ADC Successive Approximation ADC

40. Flash or Parallel type ADC It is the fastest ADC but very expensive. Typical conversion time is 100ns or less. Flash ADCs are ideal for applications requiring very large bandwidth, but they consume more power and much bigger in size than other ADC architectures. A Flash converter requires a huge number of comparators compared to other ADCs, especially as the resolution increases. A Flash converter requires 2 n -1 comparators for an n-bit conversion. Elements Encoder – Converts output of comparators to binary Comparators

41. Flash ADC Consists of a series of comparators, each one comparing the input signal to a unique reference voltage. The comparator outputs connect to the inputs of a priority encoder circuit, which produces a binary output Algorithm V in value lies between two comparators Resolution ; N= Encoder Output bits Comparators => 2 N -1 Example: V ref 8V, Encoder 3-bit Resolution = 1.0V Comparators 2 3 -1=7 1 additional encoder bit -> 2 x # Comparators  

42. 2 bit Flash ADC

43. How Flash Works As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will sequentially saturate to a high state. A Priority Encoder is used to transform the comparator outputs to the correct digital binary output. Change the input voltage and observe the comparators and the priority encoder digital outputs. The priority encoder generates a binary number based on the highest-order active input, ignoring all other active inputs.

44. Contd..

45. ADC Output

46. Flash Advantages Simplest in terms of operational theory Most efficient in terms of speed, very fast limited only in terms of comparator and gate propagation delays Disadvantages •It is not suitable for higher number of bits Lower resolution Expensive For each additional output bit, the number of comparators is doubled i.e. for 8 bits, 256 comparators needed

47. Counter type A/D Converter The Counter type ADC is the basic type of ADC which is also called as digital ramp type ADC or stair case approximation ADC. This circuit consists of N bit counter, DAC and Op-amp comparator. The N bit counter generates an n bit digital output which is applied as an input to the DAC. The analog output corresponding to the digital input from DAC is compared with the input analog voltage using an opamp comparator.

48. Contd.. The opamp compares the two voltages and if the generated DAC voltage is less, it generates a high pulse to the N bit counter as a clock pulse to increment the counter. The same process will be repeated until the DAC output equals to the input analog voltage. If the DAC output voltage is equal to the input analog voltage, then it generates low clock pulse and it also generates a clear signal to the counter and load signal to the storage resistor to store the corresponding digital bits. These digital values are closely matched with the input analog values with small quantization error. For every sampling interval the DAC output follows a ramp fashion so that it is called as Digital ramp type ADC. And this ramp looks like stair cases for every sampling time so that it is also called as staircase approximation type ADC.

49. Contd..

50. Conversion time of Counter type ADC The maximum conversion of Counter type ADC is = (2 N -1) T Where, T is the time period of clock pulse.   If N=2 bit then the T max = 3T. Ts >= (2 N -1) T

51. Contd.. Merits Simple to understand and operate. Cost is less because of less complexity in design. Demerits Speed is less because every time the counter has to start from ZERO. There may be clash or aliasing effect if the next input is sampled before completion of one operation.

52. Successive Approximation ADC Successive Approximation type ADC is the most widely used and popular ADC method. The conversion time is maintained constant in successive approximation type ADC, and is proportional to the number of bits in the digital output, unlike the counter and continuous type A/D converters. The basic principle of this type of A/D converter is that the unknown analog input voltage is approximated against an n-bit digital value by trying one bit at a time, beginning with the MSB.

53. BLOCK DIAGRAM OF SAR Uses a n-bit DAC to compare DAC and original analog results. Uses Successive Approximation Register (SAR) supplies an approximate digital code to DAC of Vin. Comparison changes digital output to bring it closer to the input value. Uses Closed-Loop Feedback Conversion

54. Contd.. This type of ADC operates by successively dividing the voltage range by half, as explained in the following steps. (1) The MSB is initially set to 1 with the remaining three bits set as 000. The digital equivalent voltage is compared with the unknown analog input voltage. (2) If the analog input voltage is higher than the digital equivalent voltage, the MSB is retained as 1 and the second MSB is set to 1. Otherwise, the MSB is set to 0 and the second MSB is set to 1. Comparison is made as given in step (1) to decide whether to retain or reset the second MSB.

55. Implements Binary search algorithm Initially, DAC input set to midscale (MSB =1) V IN > V DAC , MSB remains 1. Next bit is set to 1 V IN < V DAC , MSB set to 0. Next bit is set to 1 MSB’s remain same after each conversion and next 3 bits are processed. Then next 2 bits, first 2 remaining same etc. Algorithm is repeated until LSB. DAC [input] = ADC [output] N cycles required for N-bit Conversion.

56. First Bit 2nd Bit 3rd Bit 4th Bit Start conversion pulse will set all zeros in SAR. MSB is set to 1 and others remaining 0’s (1/2 the input voltage) . DAC output is compared with unknown voltage. (1000) If unknown voltage is higher , the bit under comparison is retained 1 and the next bit is made 1 . If unknown voltage is less , the bit under comparison is made 0 and the next bit is made 1 . MSB’s remain same after each conversion and next 3 bits are processed. Then next 2 bits, first 2 remaining same etc. Then comparison moves to next bit and process continues till last bit. V in > 11 V in <01 1 2 3 4 Upper arrow 1 Lower arrow 0 Next bit is always changed to ‘1’

57. For 8 bit Successive Approximation, only 8 cycles are required irrespective of the amplitude of analog input voltage. Ex: For 8 bit SA, A/D, if 2MHz clock is used, what is the conversion time? Ans: 1/2MHz = 0.5µs. Total time required for conversion = Time required for resetting SAR + Conversion time i.e. (8+1) 9 clock cycles = 9x0.5µs = 4.5µs

58. Ex: 4 Bit S Successive Approximation ADC operates by successively dividing the voltage range by half, as explained in the following steps. (1) The MSB is initially set to 1 with the remaining three bits set as 000. The digital equivalent voltage is compared with the unknown analog input voltage. (2) If the analog input voltage is higher than the digital equivalent voltage, the MSB is retained as 1 and the second MSB is set to 1. Otherwise, the MSB is set to 0 and the second MSB is set to 1. Comparison is made as given in step (1) to decide whether to retain or reset the second MSB.

59. Output

60. Successive Approximation Advantages Capable of high speed and reliable Medium accuracy compared to other ADC types Good tradeoff between speed and cost Capable of outputting the binary number in serial (one bit at a time) format. Disadvantages Higher resolution successive approximation ADC’s will be slower Speed limited to ~5Msps Applications The SAR ADC will used widely data acquisition techniques at the sampling rates higher than 1 0KHz

61. Type Speed (relative) Cost (relative) Dual Slope Slow Med Flash Very Fast High Successive Appox Medium – Fast Low Sigma-Delta Slow Low ADC Types Comparison

62. Integrating ADC An integrating ADC is a type of analog-to-digital converter that converts an unknown input voltage into a digital representation through the use of an integrator . In its basic implementation, the dual-slope converter, the unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution. Types: 1. Charge balancing ADC 2. Dual slope ADC

63. Dual Slope A/D Converter Fundamental components Integrator Electronically Controlled Switches Counter Clock Control Logic Comparator

64. Dual Slope Integrating ADC A "cycle clock" generates a pulse of fixed length T 1 during which the input voltage is allowed to charge the integrator. After T 1 integrator discharges through a reference voltage of opposite polarity. When the integrator voltage returns to zero, comparator flips and disables NAND gate. Counter stops counting and is read out is displayed. T 1

65. Dual Slope ADC Dual slope conversion is an indirect method for A/D conversion where An analog voltage and a reference voltages are Converted into time periods by an integrator , Measured by a counter . The speed of this conversion is slow but the accuracy is high. Fig. 8.29 shows a typical dual slope converter circuit. It consists of integrator (ramp generator), comparator, binary counter, output latch and reference voltage . The ramp generator input is switched between the analog input voltage V i and a negative reference voltage, -V REF . The analog switch is controlled by the MSB of the counter. When the MSB is a logic 0, V i is connected to the ramp generator input. When MSB is logic 1, the negative reference voltage is connected to the ramp generator. Fig. 8.29 Dual slope A/D converter Fig. 8.30 Integrator output voltage Voltage to Time Period Conversion MSB=0 MSB=1

66. Ramp-up time is fixed at T 1 t 2 is directly proportional to V in (Counter Counts & Count=V in ) as t 1 and V R are constant and independent of clock frequency. The device is self- calibrating. MSB=0, V in MSB=1, V ref t 1 t 2

67. The counter output can then be connected to an appropriate digital display. The advantages of dual slope ADC are It is highly accurate. Its cost is low. It is immune to temperature caused variations in R, and C 1 . The only disadvantage of this ADC is its speed which is low.

68. Dual Slope Converter Advantages Input signal is averaged Greater noise immunity than other ADC types High accuracy Disadvantages Slow High precision external components required to achieve accuracy Cost

69. Applicat i on s of ADC ADC are used virtually everywhere where an analog signal has to be processed, stored, or transported in digital form. Some examples of ADC usage are digital volt meters, cell phone, thermocouples, and digital oscilloscope. Microcontrollers commonly use 8, 10, 12, or 16 bit ADCs, our micro controller uses an 8 or 10 bit ADC.

70. DAC/ADC SPECIFICATIONS Resolution: (2 n -1) Total No. of Steps. % Resolution = x 100 Linearity . Relation between input & output. Accuracy: Expressed as fraction of LSB Settling time. Time required for the O/P of DAC to settle to with in ½ LSB of the final value for a given digital input. Speed of conversion. Conversion Time. Supply Rejection: The ability of DAC to maintain accuracy and linearity when the supply voltage changes.

71. Choosing a DAC/ADC There are six(6) main specifications that should be considered when choosing a DAC for a particular project. Reference Voltage Resolution Linearity Speed Settling Time Error

72. Specifications Reference Voltage To a large extent the output properties of a DAC are determined by the reference voltage. Multiplier DAC – The reference voltage is constant and is set by the manufacturer. Non-Multiplier DAC – The reference voltage can be changed during operation.

73. Specifications of DAC/ADC Resolution For an n bit INPUT, the total number of steps is 2 n -1, Then % re solution x100 is defined as the ratio of a change in output voltage resulting from a change of 1 LSB at the digital inputs. V oFS = Full-scale output Voltage. Example: For an 8bit DAC, if full scale output voltage is 10.2V, what is the resolution? R= = 40mV/LSB . 1 LSB change results in 40mV output.

74. Specifications Resolution The resolution is the amount of voltage rise created by increasing the LSB (Least Significant Bit) of the input by 1. This voltage value is a function of the number of input bits and the reference voltage value. 1 bit DAC is designed to reproduce 2 (2 1 ) levels while an 8 bit DAC is designed for 256 (2 8 ) levels. Increasing the number of bits results in a finer resolution Most DACs are in the 12-18 bit range

75. Specifications Linearity The linearity is the relationship between the output voltage and the digital signal input.

76. Specifications Speed Usually specified as the conversion rate or sampling rate. It is the rate at which the input register is updated. High speed DACs are defined as operating at greater than 1 MHz . Some state of the art 12-16 bit DAC can reach speeds of 1GHz The conversion of the digital input signal is limited by the clock speed of the microprocessor and the settling time of the DAC.

77. Specifications Settling Time Ideally a DAC would instantaneously change its output value when the digital input would change. In a real DAC it takes time for the DAC to reach the actual expected output value. Ideal Sampled Signal Real DAC Output

78. Accuracy. Accuracy = ½ LSB. In the above example it is 20mV. Problem: If n=4; V oFS = 15V; R = 15/(2 4 -1) = 1V/LSB. What is V out for an input of 0110? Vo = Resolution x D. D=Decimal Equivalent D= (0110) 2 = 6 Vo = (1V/LSB) x 6 = 6V.

79. A/D Conversion Specifications

80. The time for one analog to digital conversion must depend on both the clock's period T and number of bits n. It is given as, T c =T(n + 1) Where T c = conversion time T=clock period n=number of bits Example -1 : An 8 bit successive approximation ADC is driven by a 1 MHz clock. Find its conversion time. Solution : f = 1 MHz; T=1/f = 1/10 6 = 1 μ Sec. n=8 T c = T(n+1) = 1(8+1) = 9 μ Sec.

81. A clock period of 15 μ s mean 4V will take 15 μ s  410 =6.15ms Problem-2. A 10-bit dual slope integrating A/D converter has a full-scale input of 10V. If the clock period is 15 μS, how long will it take to convert an input of 4V? How long for an input of 10V? 10 bits means 2 10 =1024 levels. Full scale input of 10V means each level is 10V/1024=9.77mV ANS: 10V will take 15 μ s  1024=15.3ms 4V corresponds to 4/9.77 10 -3 =409.6 levels - round up to 410

82. Problem-3 What increase in speed can be gained by using a 12-bit successive approximation converter instead of the dual slope converter, assuming a full-scale input voltage.? ANS: A 12-bit SA converter will take 12 clock cycles 12x15 = 180 μ s, regardless of the input voltage. So, for 10V full scale input, the speed increase is 15.36ms/180 μ s =85.3 times. So the SA converter is both faster and more accurate (12 bits gives 4096 levels, compared to 1024 levels for 10 bit)

83. Dynamic Range: Largest Value Smallest Value 12 bit: 2V P/P Input. What is the Resolution and Dynamic Range? 2 12 = 4096. Step Size = 2V/4096 = 488µV Dynamic Range = 2V/488µV = 4096 In db. 20log 10 4096 = 72db. Dynamic Range ≈ 6db x Number of Bits. In the above example, Dynamic Range = 6x12 = 72db.

84. Example – 4 An audio CD will use 16-bit representation of music signal. Determine dynamic range. If the maximum output level is 0.775 V peak, determine the step size. Suppose if the signal is bi-polar, determine the step size. Dynamic Range = 6x16 = 96db. Total no. of steps = 2 16 = 65536. The total Signal range is -0.775 to + 0.775 or 1.55V. Step Size = 1.555/65536 = 23.65µV.