Device Isolation Techniques in Integrated Circuit Fabrication

gsvirdi07 15 views 25 slides Nov 02, 2025
Slide 1
Slide 1 of 25
Slide 1
1
Slide 2
2
Slide 3
3
Slide 4
4
Slide 5
5
Slide 6
6
Slide 7
7
Slide 8
8
Slide 9
9
Slide 10
10
Slide 11
11
Slide 12
12
Slide 13
13
Slide 14
14
Slide 15
15
Slide 16
16
Slide 17
17
Slide 18
18
Slide 19
19
Slide 20
20
Slide 21
21
Slide 22
22
Slide 23
23
Slide 24
24
Slide 25
25

About This Presentation

This lecture, authored by Dr. G. S. Virdi, Ex-Chief Scientist, CSIR–Central Electronics Engineering Research Institute, Pilani, provides a detailed exploration of device isolation methods used in semiconductor and VLSI fabrication. The lecture explains the need for isolation between components in ...


Slide Content

DeviceIsolationTechniques
Dr.G.S.Virdi
Ex.Chief Scientist
CSIR-Central Electronics Engineering Research Institute
Pilani—33303 1,India

Objectives
•Tounderstandwhatisdeviceisolation
•Toappreciatetheneedfordeviceisolationin
micro-fabrication
•Tostudythevariousdeviceisolation
techniques,and
•Toidentifymeritsanddemeritsofeach

DeviceIsolationTechniques
WhatistheneedforDeviceIsolation?
•VLSIconsistsofseveralactiveandpassive
componentsinterconnectedwithinamonolithic
blockofsemiconductormaterial.Each
componentmustbeelectricallyisolatedfrom
eachothertoallowdesignflexibility.
•InMOS,source-drainregionsofadjacentMOS
transistorstogetherwithinterconnectionmetal
linesmayconstituteparasiticMOStransistors
unlesstheyareisolatedfromeachother.

4
DeviceIsolationisalsonecessary:
•Topreventundesiredconductingpaths;
•Toavoidcreationofinversionlayersoutsidethe
channels;
•Toreduceleakagecurrents.
DeviceIsolationTechniques
WhatistheneedforDeviceIsolation?

DeviceIsolationTechniques
•JunctionIsolationTechnique
•DielectricIsolationTechnique–
•EtchedFieldoxideIsolation
•LOCOS
•TrenchIsolationTechnique–
•STI

JunctionIsolationTechnique
•Inolderdaybipolarjunctiontransistortechnology,
theisolationwasprovidedbyadeepPNjunctions
<=Junctionisolationtechnique
•Thereversebiasedpnjunctionwouldactasthe
electricalisolationbetweenadjacentdevices.

JunctionIsolationTechnique
Demerits:
Asthedevicedimensionswerereducedandaswe
wantedfasterandfasterdevices,junctionisolation
becamenon-viabletechnology,because:
•thediffusionwillalwayshavesomelateral
spread;therefore,asthedevicedimensions
becomesmaller,itbecomesmoredifficultto
controltheisolationtubwidthand
•thecapacitanceassociatedwiththese
junctions,hindersthespeedofthetransistors

DielectricIsolationTechnique
Themostcommondielectric,silicondioxideis
usedforisolation.
•EtchedFieldoxideIsolation
•LOCOS

EtchedFieldoxideIsolation
•Devicesarecreatedindedicatedregions
calledactiveareas.
•Eachactiveareaissurroundedbythickoxide
barriercalledfieldoxide.
•Thickoxideisgrownoncompletesurfaceof
thechipandthenselectivelyetchedtodefine
activeareas.
•Thicknessofoxideleadstolargeoxidesteps
attheboundariesofactiveareasand
isolationregion.

LOCOSTechnique
•LOCOS=localoxidationofSilicon
•Localoxidationthatisoxidationiscarriedoutat
someregionsofthesemiconductor;theother
regionsarepreventedfromgettingoxidizedby
usingasiliconnitridemask.
•Siliconnitridehasaninterestingbehaviorthatit
does notallowoxidationtoproceed
underneath.ThishasbeenusedinLOCOS.

•Theactiveregionisprotectedbyadepositingalayer of
siliconnitride->Actsasoxidebarrier
•Underneath,thereisalayerofthinoxidecalledpad
oxide.
•Padoxideisneededbecauseotherwisesiliconnitride will
notadhereverywelltothesilicon.Therewillbelot of
stressinduced.Bydepositingthesiliconnitrideon topof
the padoxide,the stresswillbereduced.
LOCOSTechnique
1

•Thepatterntransferisperformedby
photolithography.Afterlithographythe
patternisetchedintothenitride.
•Theactiveareasfortheoxidationprocess
arethusdefined
LOCOSTechnique
2

•ThenextstepisthemainpartoftheLOCOS
process,thegrowthofthethermaloxide.
3
LOCOSTechnique

•Aftertheoxidationprocessisfinished, the
laststepistheremovalofthenitride layer.
4
LOCOSTechnique

TheadvantagesofLOCOSfabricationare:
•thesimpleprocessflowand
•thehighoxidequality,becausethewhole
LOCOSstructureisthermallygrown.
LOCOSTechnique-Merits

•But,asthedevicedimensionswentonbecoming
smaller,theLOCOStechniquealsostartedtoshow
itslimitationandwhataretheselimitations?
•Bird’sBeakProblem
LOCOSTechnique-Demerits

•Therewillbealittlebitofencroachmentofoxide
underneathsiliconnitride.
•Thisisbecauseoxidationisproceedingnotmerelyin
the,onthehorizontalsurface,butalsoatthe
verticalsidewalls.
•Theslightencroachmentunderthesiliconnitrideis
shapedlikeabird’sbeak.,hencethisiscalled
bird'sbeakproblem.
•Aswereducethedevicedimensionsi.eIfthis
entireactivetransistorareaitselfisverysmall,then
evenasmallencroachmentwillbeaconsiderable
percentageofthetotalactivearea.
LOCOSTechnique-Demerits

TrenchIsolationTechnique
•Inatrenchisolation,Atrenchiscutin
thesemiconductorandthenthetrench
isfilledwithnon-conductingmaterial.
•Inshallowtrenchisolation,insteadof
thermallygrowingoxide layer,the
silicondioxidelayerisdepositedby
CVD.

ShallowTrenchIsolationTechnique
Step1:Nitridedeposition
•Intheshallowtrenchisolationprocess,atfirstathin
layerofoxideisgrownbythermalprocessand
subsequentlyathinlayerofsiliconnitrideis
depositedbyCVD.

Step2.CreateaTrench
•Usingphotolithographyandetching,wherever
electricalisolationisneeded,atrenchismadein
silicon(i.e.thesiliconnitride,silicondioxideand
thenSiareremovedbydryetchinginthose
areas).
ShallowTrenchIsolationTechnique

Step3:TrenchOxideDeposition
•Thensilicondioxideofsufficientthicknessis
depositedbyCVD.Usuallythisisdoneunder
highdensityplasma(HDP)conditions.
ShallowTrenchIsolationTechnique

Step4:ChemicalMechanicalPlanarisation
•Inthenextstep,theexcessoxideisremoved by
chemicalmechanicalplanarization.Here, care
mustbetakentoensurethatonlythe oxideis
removedand thenitrideisnot removed.
ShallowTrenchIsolationTechnique

Step5:Nitrideremoval
•Thenthenitrideisremovedbywetetching
usingphosphoricacid.
ShallowTrenchIsolationTechnique

ShallowTrenchIsolationTechnique

Thank You…
Dr.G.S.VIRDI
Tags