Digital electronica RSS vvvdmsASmCMmmmmmcdsdvfssc

dzscffc

1. Fundamentals of Digital circuits

2. The operation the systems , based on the principles of digital techniques and these systems are referred to as digital systems . Some of the principal reasons for the widespread use of digital techniques and systems are: The devices used in digital circuits generally operate in one of the two states, known as ON and OFF resulting in a very simple operation. There are only a few basic operations in digital circuits which are very easy to understand. Digital techniques require Boolean algebra which is very simple and can easily be learnt even in schools. The principal electrical characteristics required are switching speed and loading considerations.

3. Various ICs are available in a logic family with similar electrical characteristics which make the design and development of digital systems very simple and also reduces interfacing problems . The effect of fluctuations in the characteristics of the components, ageing of components, temperature, and noise, etc. is very small in digital circuits . The display of data and other information is very convenient, accurate and elegant using digital techniques . The two discrete signal levels HIGH and LOW can also be represented by the binary digits 1 and 0 respectively.

4. BASIC DIGITAL CIRCUITS In a digital system there are only a few basic operations performed, irrespective of the complexities of the system. These operations may be required to be performed a number of times in a large digital system like digital computer or a digital control system, etc. The basic operations are AND, OR, NOT, and FLIP — FLOP . The AND Operation: The AND operation is defined as: the output of an AND gate is 1 if and only if all the inputs are 1. Y — A AND B AND C .. . AND N — A. B. C. …. N — ABC .. . N

5. Truth Table Since a logical variable can assume only two possible values (0 and 1), therefore, any logical operation can also be defined in the form of a table containing all possible input combinations (2N combinations for N inputs) and their corresponding outputs. This is known as a truth table and it contains one row for each one of the input combinations.

6. The OR Operation The OR operation is defined as: the output of an OR gate is 1 if and only if one or more inputs are 1. Y = A OR B OR C .. . OR N = A + B + C + + N

7. The NOT Operation A NOT gate, which is also known as an inverter. Y — NOT A Y A A is read as “Y equals NOT A” oz “Y equals complement of A”.

8. The NAND Operation The NOT—AND operation is known as the NAND operation. N input (N > 2) AND gate followed by a NOT gate. Y F equals NOT (A AND B)”.

9. The NOR Operation The NOT—OR operation is known as the NOR operation . N input (N 2) OR gate followed by a NOT gate . a b n

10. The EXCLUSIVE -OR Operation It is not a basic operation and can be performed using the basic gates—AND, OR and NOT or universal gates NAND or NOR .

11. The EXCLUSIVE -NOR Operation Similar to EX —OR gate, Ex —NOR gate is not a basic operation and can be performed using the basic gates or universal gates, but because of its importance, it has been given a standard symbol. The Ex —NOR operation is also referred to as the coincidence operation because it produces output of 1 when its inputs coincide in value, both 0 or both 1 . A B

12. Boolean Algebraic Theorems

13. NUMBER SYSTEMS We all are familiar with the number system in which an ordered set of ten symbols—0, 1, 2, 3, 4, 5, 6, 7, 8, and 9, known as digits—are used to specify any number. This number system is popularly known as the decimal number system. The radix or base of this number system is 10 (number of distinct digits). Any number is a collection of these digits. For example, 1982.365 signifies a number with an integer part equal to 1982 and a fractional part equal to 0.365, separated from the integer part with a radix point (.) also known as decimal point. There are some other systems also, used to represent numbers. Some of the other commonly used number systems are: binary, octal and hexadecimal number systems . These number systems are widely used in digital systems like microprocessors, logic circuits, computers, etc. and therefore, the knowledge of these number systems is very essential for understanding, analysing and designing digital systems.

14. Characteristics of Commonly Used Number Systems

15. BINARY NUMBER SYSTEM The number system with base (or radix) two is known as the binary number system . Only two symbols are used to represent numbers in this system and these are 0 and 1. These are known as bits. T he left-most bit is known as the most significant bit (MSB) and the right-most bit is known as the least significant bit (LSB ). Sign-Magnitude Representation – One’s Complement Representation – Two’s Complement Representation –

16. OCTAL NUMBER SYSTEM The number system with base (or radix) eight is known as the octal number system. In this system, eight symbols, 0, 1, 2, 3, 4, 5, 6, and 7 are used to represent numbers. Similar to decimal and binary number systems, it is also a positional system and has, in general, two parts: integer and fraction , set apart by a radix (octal) point (.) .

17. HEXADECIMAL NUMBER SYSTEM Hexadecimal number system is very popular in computer uses. The base for hexadecimal number system is 16 which requires 16 distinct symbols to represent the numbers. These are numerals 0 through 9 and alphabets A through F . Since numeric digits and alphabets both are used to represent the digits in the hexadecimal number system, therefore, this is an alphanumeric number system.

18. Codes Computers and other digital circuits process data in the binary format. Various binary codes are used to represent data which may be numeric, alphabets or special characters . Although , in every code used the information is represented in binary form, the interpretation of this binary information is possible only if the code in which this information is available is known.

19. Straight Binary Code Natural BCD Code: In this code, decimal digits 0 through 9 are represented (coded) by their natural binary equivalents using four bits and each decimal digit of a decimal number is represented by this four bit code individually. Excess-3 Code: This is another form of BCD code, in which each decimal digit is coded into a 4-bit binary code. The code for each decimal digit is obtained by adding decimal 3 to the natural BCD code of the digit. Gray code: It is a very useful code in which a decimal number is represented in binary form in such a way so that each Gray-code number differs from the preceding and the succeeding number by a single bit.

20. Alphanumeric Codes it is necessary to have a binary code for alphabets also. If we use an n-bit binary code, we can represent 2’n elements using this code. Therefore, to represent 10 digits 0 through 9 and 26 alphabets A through Z, we need a minimum of 6 bits ( 2’6 = 64, but 2’5 = 32 is not sufficient). The 6-bit alphanumeric code is used in many computers to represent alphanumeric characters and symbols internally and therefore can be called internal code . Frequently, there is a need to represent more than 64 characters including the lower case letters and special control characters for the transmission of digital information . For this reason the following two codes are normally used : Extended BCD Interchange Code (EBCDIC) American Standard Code for Information Interchange (ASCII)

21. ERROR DETECTING AND CORRECTING CODES Digital signals are processed for performing various operations and are transmitted from one circuit or system to another circuit or system. When these binary signals are transmitted from one location (transmitter) to another location (receiver), transmission errors may occur because of electrical noise in the transmission channel. Due to transmission error a signal transmitted as a 0 may be received as a 1 or vice-versa. In complex digital systems, millions of bits per second are manipulated and it is desired to have high data integrity, or at least a violation of data integrity must be detectable . It is desired to detect the error in the received data word, locate its bit position and correct it. Various codes are used for the detection and correction of error.

22. Error-detecting Codes When a digital information is transmitted, it may not be received correctly by the receiver. At the receiving end it may or may not be possible to detect whether the information has been received correctly or not. To ensure that the occurrence of a single error always results in an invalid code, so as to avoid its incorrect interpretation by the receiver, the code must possess the property that the occurrence of any single error transforms a valid code word into an invalid code word. I f an extra bit is attached to the n-bit code word to make the number of bits n + 1 in such a way so as to make the number of ones in the resulting (n + 1)-bit code even or odd, it will certainly be an error-detecting code . For detection of error an extra bit known as parity bit is attached to each code word to make the number of ones in the code even (even parity) or odd (odd parity).

23. W e observe that a parity bit (P) 0 or 1 is attached to every code word so as to make the number of ones even or odd for even and odd parity respectively. It can be easily verified that the minimum distance between any two code words with parity bit attached is two. The parity bit 1 or 0 is attached to the code to be transmitted at the transmitter end and the parity of the received (n + 1)- bit word is checked at the receiving end. If there is only one error, the erroneous code is detected at the receiving end by parity check. If odd number of bits are transmitted erroneously, then also the parity check will detect the incorrect code but if there are even number of bits received incorrectly, this method will not detect error. The parity check method can only detect error in the transmitted word at the receiving end. It cannot locate the bit which has changed

24. Error-correcting Code B y adding a single parity bit alongwith the information, or message being transmitted, an error in single bit position can be detected. The parity check gives only information that the received message is incorrect. It can not locate the bit position in which error has occurred and, therefore, can not correct the error . A code is said to be error-correcting code if the correct code word can be deduced from the erroneous word. The capability of a code to be error detecting and/or error-correcting can be determined from its minimum distance. If a code’s minimum distance is 2c + d + 1, it can correct errors in upto c bits and detect errors in upto d additional bits.

25. Hamming Code Hamming code is an error-correcting code. It is constructed by adding a number of parity bits to each group of n-bit information, or message in such a way so as to be able to locate the bit position in which error occurs. Let us assume that k parity bits p„ p 2 ..., p are added to the n-bit message to form an (n + k)-bit code. The value of k must be chosen in such a way so as to be able to describe the location of any of the n + k possible error bit locations and also ‘no error’ condition. Consequently, k must satisfy the inequality.

26. CHARACTERISTICS OF DIGITAL ICs

27. The various characteristics of digital ICs used to compare their performances are : Speed of operation ; The speed of a digital circuit is specified in terms ofthe propagation delay time. Power dissipation: This is the amount of power dissipated in an IC. Figure of merit : The figure of merit of a digital IC is defined as the product of speed and power . Fan-out : This is the number of similar gates which can be driven by a gate. High fan-out is advantageous . Current and voltage parameters, Noise immunity : Stray electric and magnetic fields may induce unwanted voltages, known as noise, on the connecting wires between logic circuits. Operating temperature range : The accepted temperature ranges are: 0 to + 70 °C for consumer and industrial applications and —55 °C to +l25 °C for military purposes. Power supply requirements : Flexibilities available .

28. DIODE—TRANSISTOR LOGIC (DTL) The diode—transistor logic is somewhat more complex than RTL but because of its greater fan-out and improved noise margins it has replaced RTL. Its main disadvantage is slower speed and because of this it was modified and emerged as transistor—transistor logic (TTL) Propagation Delays: Delays are associated with the turning-on (turn-on delay) and the turning-off (turn-off delay) of the output transistor. The propagation delay time of commercially available DTL gates are of the order of 30 to 80 ns . Current Sink Logic: T he sink current is much greater than the source current, this is known as current sink logic.

29. TRANSISTOR—TRANSISTOR LOGIC (TTL) The transistor—transistor logic (TTL) is the most successful bipolar logic which was evolved in the 1960s and has survived for more than four decades. TTL families use transistors, both to perform logic functions and to provide high output drive capability . The NAND gate is the basic TTL logic circuit. The speed limitation of TTL is mainly due to the turn-off time delays involved in transistors while making transitions from saturation to cut-off. This can be eliminated by replacing the transistors of TTL gate by Schottky transistors.

30. 5400/7400 TTL SERIES

31. MOS LOGIC MOSFETs have become very popular for logic circuits due to high density of fabrication and low power dissipation. When MOS devices are used in logic circuits, there can be circuits in which either only p— or only n-channel devices are used. Such circuits are referred to as PMOS and NMOS logic respectively. It is also possible to fabricate enhancement mode p-channel and n-channel MOS devices on the same chip. Such devices are referred to as complementary MOSFETs and logic based on these devices is known as CMOS logic. The power dissipation is extremely small for CMOS and hence CMOS logic has become very popular . The basic MOS gate is an inverter .

32. CMOS LOGIC A complementary MOSFET (CMOS) is obtained by connecting a p-channel and an n-channel MOSFET in series, with drains tied together and the output is taken at the common drain. Input is applied at the common gate formed by connecting the two gates together . In a CMOS, p-channel and n-channel enhancement MOS devices are fabricated on the same chip, which makes its fabrication more complicated and reduces the packing density. But because of negligibly small power consumption, CMOS is ideally suited for battery operated systems . Its speed is limited by substrate capacitances. To reduce the effect of these substrate capacitances, the latest technology known as silicon on sapphire (SOS) is used in microprocessor fabrication which employs an insulating substrate (sapphire). CMOS has become the most popular in MSI and LSI areas and is the only possible logic for the fabrication of VLSI devices.

33. COMBINATIONAL LOGIC CIRCUITS Basically, digital circuits are divided into two broad categories: Combinational circuits : In combinational circuits, the outputs at any instant of time depend upon the inputs present at that instant of time. This means there is no memory in these circuits. Sequential circuits: There are other types of circuits in which the outputs at any instant of time depend upon the present inputs as well as past inputs/outputs. This means that there are elements used to store past information. These elements are known as memory. Such circuits are known as sequential circuits.

34. The design requirements of combinational circuits may be specified in one of the following ways : A set of statements, Boolean expression, and Truth table. The aim is to design a circuit using the gates, the number of components used should be minimum to ensure low cost, saving in space, power requirements, etc. The following methods can be used to simplify the Boolean functions: Algebraic method, Kamaugh -map technique, Quine — McCluskey method, and Variable entered mapping (VEM) technique .

35. STANDARD REPRESENTATIONS FOR LOGIC FUNCTIONS : Logic functions are expressed in terms of logical variables. The values assumed by the logic functions as well as the logic variables are in the binary form. Any arbitrary logic function can be expressed in the following forms: Sum-of-products form (SOP), and Product-of-sums form (POS) If each term in SOP and POS forms contains all the literals then these are known as canonical SOP and POS, respectively. Each individual term in canonical SOP form is called as minterm and in canonical POS form as maxterm . The concept of minterm and maxterm introduced above allows us to introduce a very convenient shorthand notation to express logical functions.

36. KARNAUGH MAP REPRESENTATION OF LOGIC FUNCTIONS Sometimes it is difficult to be sure that a logic expression can be simplified. There is another technique, which is graphical, known as the Karnaugh map technique which provides a systematic method for simplifying an In this technique, the information contained in a truth table or available in POS or SOP form is represented on Karnaugh map (K-map). d manipulating Boolean expressions . This is perhaps the most extensively used tool for simplification of Boolean functions.

37. Figure shows the K-maps for two, three, and four variables.

38. BCD-to-7-Segment Decoder A digital display that consists of seven LED segments is commonly used to display decimal numerals in digital systems . One 7-segment display device is used for displaying one numeral 0 through 9. For using this display device, the data has to be converted from some binary code to the code required for the display. Usually, the binary code used is natural BCD .

39. Encoder An encoder is a logic circuit which converts digits and/or some special symbols to a binary coded format. This process is known as encoding . It has n inputs and m outputs. For example, a decimal-to-BCD encoder has ten inputs—one for each decimal digit, and four outputs corresponding to the natural BCD code.

40. Diagram of Decimal-to-BCD Encoder

41. Multiplexer The multiplexer (or data selector) is a logic circuit that allows one of the n data inputs at the output . Figure shows a 4: l multiplexer. It has four data input lines (I to I 3 ), two select lines ( S 1 , S o ) and Y is the data output line. One of the four data inputs will appear at the output depending on the value of S 1 , S o .

42. QUINE- McCLUSKEY MINIMISATION TECHNIQUE Modem digital systems are designed using complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), and other very large scale integrated circuits that can be configured by the end user. These devices are highly complex and therefore, the techniques required for designing digital systems using these devices have to be computer driven rather than manual. A logic minimisation technique which has the following characteristics is therefore, required: It should have the capability of handling large number of variables. It should not depend on the ability of a human user for recognising prime- implicants . It should ensure minimised expression. It should be suitable for computer solution.

43. The Quine-McCluskey minimisation technique satisfies the above requirements and hence can be effectively used for the design of logic circuits. The K-map technique is not suitable for handling the design of complex digital systems because of the following disadvantages: Minimisation of logic functions involving more than six variables is unwieldy. Recognition of prime- implicants that may form part of the simplified function relies on the ability of the human user making it difficult to be sure whether the best selection has been made . The Quine-McCluskey method consists of two parts: To find by an exhaustive search all the prime- implicants that may form part of the simplified function. To identify essential prime- implicants obtained from part 1 and choose among the remaining prime- impli - cants those that give an expression with the least number of literals.

44. FLIP-FL0PS There are many applications in which digital outputs are required to be generated in accordance with the sequence in which the input signals are received. This requirement can not be satisfied using a combinational logic system . These applications require outputs to be generated that are not only dependent on the present input conditions but they also depend upon the past history of these inputs. The past history is provided by feedback from the output back to the input . A block diagram of a sequential circuit is shown in Fig . It consists of combinational circuits which accept digital signals from external inputs and from outputs of memory elements and generates signals for external outputs and for inputs to memory elements referred to as excitation .

45. A memory element is some medium in which one bit of information (1 or 0) can be stored or retained until necessary, and thereafter its contents can be replaced by a new value. The contents of memory elements in Fig . can be changed by the outputs of the combinational circuit which are connected to its input .

46. T he dependence of the external outputs of a sequential circuit on the external inputs and the present contents of the memory elements (referred to as the present state of memory elements). The new contents of the memory elements, referred to as the next state; depend on the external inputs and the present state. Hence, the output of a sequential circuit is a function of the time sequence of inputs and the internal states . Sequential circuits are classified in two main categories, known as asynchronous and synchronous sequential circuits depending on timing of their signals . A sequential circuit whose behaviour depends upon the sequence in which the input signals change is referred to as an asynchronous sequential circuit . A sequential circuit whose behaviour can be defined from the knowledge of its signal at discrete instants of time is referred to as a synchronous sequential circuit.

47. The synchronization is achieved by a timing device known as a system clock which generates a periodic train of clock pulses . Since the design of asynchronous circuits is more-tedious and difficult, therefore their uses are rather limited. Synchronous circuits have gained considerable domination and wide popularity and are also known as clocked-sequential circuits. The memory elements used are FL I P- FLOPs which are capable of storing binary information. The basic digital memory circuit is known as FL I P- FLOP . It has two stable states which are known as the 1 state and the 0 state . It can be obtained by using NAND or NOR gates.

48. CLOCKED S-R FLIP - FLOP It is often required to set or reset the memory cell in synchronism with a train of pulses known as clock (abbreviated as CK). Such a circuit and is referred to as a clocked set- reset (S—R) FL I P- FLO P . In this circuit, if a clock pulse is present (CK = 1), it operates ,On the other hand, when the clock pulse is not present (CK = 0), the gates G3 and G4 are inhibited, i.e. their outputs are 1 irrespective of the values of S or R. In other words, the circuit responds to the inputs S and R only when the clock is present.

49. J – K FLIP-FLOP The uncertainty in the state of an S-R FL I P - FLOP when S = R = 1 (fourth row of the truth table) can be eliminated by converting it into a J—K FL I P - FLOP. The data inputs are J and K which are ANDed with Q’ and Q, respectively ,

50. The difficulty of both inputs l(S=R=1 ) being not allowed in an S—R FLIP - FLOP is eliminated in a J—K FL I P - FLOP by using the feedback connection from outputs to the inputs of the gates G3 and G4. T he inputs do not change during the clock pulse (CK = 1), which is not true because of the feedback connections. Hence, for the duration T q of the clock pulse, the output will oscillate back and forth between 0 and 1. At the end of the clock pulse, the value of Q is uncertain. This situation is referred to as the race-around condition.

51. The Master—Slave J—K FLI P-FLOP A master-slave J-K FLIP - FLOP is a cascade of two S-R FLIP - FLOPs , with feedback from the outputs of the second to the inputs of the first. Positive clock pulses are applied to the first FL I P - FLOP and the clock pulses are inverted before these are applied to the second FL I P - FLOP.

52. D-TYPE FL I P — FLOP If we use only the middle two rows of the truth table of the S—R or J—K FL I P - FLOP, we obtain a D-type FL I P - FLOP . It has only one input referred to as D-input or data input. Its truth table ,from which it is clear that the output Q„ at the end of the clock pulse equals the input D before the clock pulse .

53. T-TYPE FL I P — FLOP In a J—K FLIP - FLO P, if J =K , the resulting FL I P - FLO P is referred to as a T-type FL I P - FLO P. It has only one input, referred to as T-input. it is clear that if T = 1 it acts as a toggle switch. For every clock pulse, the output Q changes.

54. EDGE-TRIGGERED FLIP-FLOPs In the case of an edge-triggered FL I P- FLOP, the transfer of information from data input(s) to the output of the FL I P- FLOP occurs at the positive (or negative) edge of the clock pulse. The only time the outputs can change state is during the brief interval of time when the clock signal is making a transition from the 0 to 1 , or in some circuits, from the l to 0 states. A FL I P- FLOP which responds only to rising (or falling) edge is referred to as positive-edge-triggered (or negative-edge-triggered). The data lock-out occurs at the end of the edge.

55. The timing specifications of an edge-triggered FL I P- FLOP are Set-up Time ( Ts ) It is the time required for the input data to settle in before the triggering edge of the clock. Hold Time ( T h ) It is the time for which the data must remain stable after the triggering edge of the clock . Propagation Delays Similar to propagation delay in combinational circuits, there is delay in the FL I P- FLOP output Q, making a change from HIGH-to-LOW or LOW-to-HIGH when a clock pulse is applied . Clock Pulse Width The minimum time duration for which the clock pulse must remain HIGH ( T ch ) and LOW ( T cl ) Maximum Clock Frequency The maximum clock frequency ( F max ) is the highest rate at which a FL I P — FLOP can be reliably triggered.

56. APPLICATIONS OF FLIP — FLOPs Some of the common uses of FL I P - FLO Ps are as: Bounce elimination switch : Mechanical switches are employed in digital systems as input devices by which digital information (0 or 1) is entered into the system . Registers: A register is composed of a group of FL I P - FLO Ps to store a group of bits (word ). Counters : Digital counters are often needed to count events. Memory : In computers, digital control systems, information processing systems, etc. it is necessary to store digital data and retrieve the data as desired.

57. A/D AND D/A CONVERTERS A voltage to be processed using digital techniques may be a fixed ( d.c. ) voltage or a time varying voltage. The process of converting an analog signal to a digital form involves a sequence of four processes. These are Sampling Holding Quantizing Encoding These processes are not performed as separate operations. Sampling and holding operations are done simultaneously using a circuit known as sample-and—hold (S/H) circuit. These operations are required to be performed for the conversion of time varying analog signals and not for d.c signals. Quantizing and encoding processes are done simultaneously using a circuit referred to as an analog-to-digital converter (A/D converter or ADC). The process of conversion of an analog signal to digital signal is referred to as an analog-to-digital conversion.

58. DIGITAL-TO-ANALOG CONVERTERS The input to a D/A converter is an N-bit binary signal, available in parallel form. Normally, digital signals are available at the output of the latches or registers and the voltages, corresponding to logic 0 and logic 1, available to drive the converter are in general not precisely fixed voltages. Therefore, these voltages are not applied directly to the converter but are used to operate digitally controlled switches. The switch is thrown to one of the two positions depending upon the digital signal (1 or 0) which connects precisely fixed voltages V(1 ) or V(0 ) to the converter input, corresponding to 1 or 0, respectively.

59. There are two types of commonly used D/A converters: 1 . Weighted-resistor D/A converter, and 2. R -2R ladder D/A converter . Weighted-resistor D/A converter: Let us assume an N-bit straight binary input to a resistor network (through digitally controlled electronic switches) which produces a current ‘ I’ corresponding to logic 1 at the most-significant bit, I 2 corresponding to logic 1 at the next lower bit, I2 2 for logic 1 at the next lower bit and so on, and I2 N-1 for logic 1 at the least-significant bit position. The total current thus produced will be proportional to the digital input. This current can be converted into a corresponding voltage, by using an OP AMP, which will be proportional to the digital input . This circuit is referred to as a weighted-resistor D/A converter since the resistance values are weighted in accordance with the binary weights.

60. R—2R Ladder D/A Converter : An R—2R ladder D/A converter uses resistors of only two values, R and 2R. The inputs to the resistor network are applied through digitally controlled switches . A switch is in position 0 or 1 corresponding to the digital input for that bit position being 0 or 1, respectively . The number of resistors required for an N-bit D/A converter is 2Nin the case of R—2R ladder D/A converter, whereas it is only N in the case of a weighted-resistor D/A converter.

61. Specifications for D/A Converters The characteristics of a D/A converter, which are generally specified by the manufacturers are: Resolution : This is the smallest possible change in output voltage as a fraction or percentage of the full-scale output range. Linearity: The linearity of a converter is a measure of the precision with which the linear input—output relationship is satisfied. Accuracy : The accuracy of a D/A converter is a measure of the difference between the actual output voltage and the expected output voltage. Settling tim e : The time required for the analog output to settle to within +-1/2 LSB of the final value after a change in the digital input is usually specified by the manufacturers and is referred to as settling time. Temperature sensitivity: The analog output voltage for any fixed digital input varies with temperature. This is due to the temperature sensitivities of the reference voltage source, resistors, OP AMP, etc. It is specified as + ppm/°C.

62. ANALOG-TO-DIGITAL CONVERTERS In an analog-to-digital converter, the input analog voltage can have any value in a range, but the digital output can have only 2’ N discrete values for an N-bit A/D converter . Therefore, the whole range of analog voltage is required to be represented suitably in 2’ N intervals. This process is known as quantization. Each interval is then assigned a unique N-bit binary code, which is referred to as encoding.

63. Specifications of A/D Converters The following specifications are usually specified by the manufacturers ofA /D converters: Range of input voltage, Input impedance, Accuracy, Conversion time, and Format of digital output.