Digital logic design chapter 9 - Lecture 9.pptx

Brief

1. Digital logic design Lecture 9

2. Today Sequential Circuits Types of Sequential Circuits Clock Signal and Triggering Basics of Flip Flop Types of Flip Flop

3. Sequential Circuits The sequential circuit is a special type of circuit that has a series of inputs and outputs. The outputs of the sequential circuits depend on both the combination of present inputs and previous outputs. The previous output is treated as the present state. So, the sequential circuit contains the combinational circuit and its memory storage elements.

4. Difference b/w Combinational Circuits and Sequential Circuits Sr. # Combinational Circuits Sequential Circuits 1) The outputs of the combinational circuit depend only on the present inputs. The outputs of the sequential circuits depend on both present inputs and present state (previous output). 2) The feedback path is not present in the combinational circuit. The feedback path is present in the sequential circuits. 3) In combinational circuits, memory elements are not required. In the sequential circuit, memory elements play an important role and require. 4) The clock signal is not required for combinational circuits. The clock signal is required for sequential circuits. 5) The combinational circuit is simple to design. It is not simple to design a sequential circuit.

5. Types of Sequential Circuits Asynchronous sequential circuits: The clock signals are not used by the Asynchronous sequential circuits. So, the changes in the input can change the state of the circuit. The un-clocked flip-flops are the memory elements of asynchronous sequential circuits. The asynchronous sequential circuit is similar to the combinational circuits with feedback. Synchronous sequential circuits: In synchronous sequential circuits, synchronization of the memory element's state is done by the clock signal. The output is stored in flip-flops (memory devices). The synchronization of the output is done with either the negative edge of the clock signal or the positive edge.

6. Clock Signal and Triggering Clock Signal: A clock signal is a periodic signal in which ON time and OFF time need not be the same. When ON time and OFF time of the clock signal are the same, a square wave is used to represent the clock signal. Below is a diagram which represents the clock signal: A clock signal is considered as the square wave, the signal stays at logic, either high 5V or low 0V, to an equal amount of time.

7. Types of Triggering These are two types of triggering in sequential circuits: Level triggering Edge triggering Level triggering: The logic High and logic Low are the two levels in the clock signal. In level triggering, when the clock pulse is at a particular level, only then the circuit is activated. Latches are the level triggering devices. There are the following types of level triggering: Positive level triggering Negative level triggering

8. Level Triggering Positive level triggering: In a positive level triggering, the signal with Logic High occurs. So, in this triggering, the circuit is operated with such type of clock signal. Negative level triggering: In negative level triggering, the signal with Logic Low occurs. So, in this triggering, the circuit is operated with such type of clock signal.

9. Edge Triggering In clock signal of edge triggering, two types of transitions occur, i.e., transition from Logic Low to Logic High or Logic High to Logic Low Flip flops are the edge triggering devices. Based on the transitions of the clock signal, there are the following types of edge triggering: Positive edge triggering Negative edge triggering

10. Edge Triggering (cont.) Positive edge triggering: The transition from Logic Low to Logic High occurs in the clock signal of positive edge triggering. So, the circuit is operated with such type of clock signal. Negative edge triggering: The transition from Logic High to Logic low occurs in the clock signal of negative edge triggering. So, the circuit is operated with such type of clock signal.

11. Basics of Flip Flop The flip flops are the fundamental building blocks of the digital system. Flip flop has two stable states and these stable states are used to store binary data that can be changed by applying varying inputs. Flip flops and latches are the basic data storage elements but different in working. There are the following types of flip flops. SR Flip Flop D Flip Flop JK Flip Flop T Flip Flop

12. SR Flip Flop The SR flip flop stands for "Set-Reset" flip flop. It is a 1-bit memory device having two inputs, i.e., SET and RESET. The SET input 'S' set the device or produce the output 1, and the RESET input 'R' reset the device or produce the output 0. The SET and RESET inputs are labeled as S and R, respectively. The reset input is used to get back the flip flop to its original state from the current state with an output 'Q'. This output depends on the set and reset conditions, which is either at the logic level "0" or "1". We can implement the SR flip flop by connecting two cross-coupled 2-input NAND gates together. Each output to one of the other NAND gate inputs, feedback is connected. So, the device has two inputs, i.e., Set 'S' and Reset 'R' with two outputs Q and Q' respectively.

13. SR Flip Flop – Circuit Diagram

14. The Set State In the above diagram, when the input R is set to false or 0 and the input S is set to true or 1, the NAND gate Y has an input 0, which will produce the output Q' 1. The value of Q' is faded to the NAND gate 'X' as input 'A', and now both the inputs of the NAND gate 'X' are 1(S=A=1), which will produce the output 'Q' 0. Now, if the input R is changed to 1 with 'S' remaining 1, the inputs of NAND gate 'Y' is R=1 and B=0. Here, one of the inputs is also 0, so the output of Q' is 1.

15. Reset State The output Q' is 0, and output Q is 1 in the second stable state. It is given by R =1 and S = 0. One of the inputs of NAND gate 'X' is 0, and its output Q is 1. Output Q is faded to NAND gate Y as input B. So, both the inputs to NAND gate Y are set to 1, therefore, Q' = 0. Now, if the input S is changed to 1 with 'R' remaining 1, the output Q' will be 0 and there is no change in state.

16. SR Flip Flop – Truth Table The condition in which both the inputs states are set to 0 is treated as invalid and must be avoided. S R Q Q’ State 1 1 Reset 1 1 1 No change 1 1 Set 1 1 1 No change 1 1 Invalid

17. SR Flip Flop with clock signal

18. D Flip Flop In SR flip-flop, the undefined input condition of SET = 0 and RESET = 0 is forbidden. It is the drawback of the SR flip flop. We need an inverter to prevent this from happening. We connect the inverter between the Set and Reset inputs for producing another type of flip flop circuit called D flip flop or data flip flop. The D flip flop is the most important flip flop from other clocked types. It ensures that at the same time, both the inputs, i.e., S and R, are never equal. The D flip-flop is designed using SR flip-flop with an inverter connected between the inputs allowing for a single input D (Data). So, here S=D and R= D’

19. D Flip Flop – Circuit Diagram

20. D Flip Flop Working We know that the SR flip-flop requires two inputs, i.e., one to "SET" the output and another to "RESET" the output. By using an inverter, we can set and reset the outputs with only one input as now the two input signals complement each other. In SR flip flop, when both the inputs are 0, that state is no longer possible. It is an ambiguity that is removed by the complement in D-flip flop. In D flip flop, the single input "D" is referred to as the "Data" input. When the data input is set to 1, the flip flop would be set, and when it is set to 0, the flip flop would change and become reset. The "CLOCK" input is used to isolating the data input from the flip flop's latching circuitry. When the clock input is set to true, the D input is copied to the output Q. This forms the basis of another sequential device referred to as D Flip Flop.

21. D Flip Flop – Truth Table Symbols ↓ and ↑ indicates the direction of the clock pulse. D flip flop assumed these symbols as edge-triggers.

22. Home Activity Explore the difference between latch and a flip flop.