EC 308 Embedded Systems Module 1 Notes APJKTU

Module 1 Notes APJKTU for the 6th semester for course Electronics and Communication Engg

1. Module I – Embedded System Model and ARM 9 * (Refer: Embedded Systems: Architecture, Programming and Design by RAJ KAMAL.{pages 6 - 29}) Agi Joseph George , AP / ECE / AJCE 1

2. “ An embedded system is a system that has software embedded into computer-hardware, which makes a system dedicated for an application ” or specific part of an application or product or part of a larger system It is any device that includes a programmable computer but is not itself intended to be a general purpose computer Definition

3. It Embeds hardware similar to a computer It Embeds main application software generally into flash or ROM Embeds a real time operating system ( RTOS), which supervises the application software tasks running on the hardware Components of ES

4. A  real-time operating system  ( RTOS ) is an  operating system  (OS) intended to serve  real-time  applications that process data as it comes in, typically without buffer delays.  Processing must be done within the defined constraints or the system will fail. RTOS

5. RTOS examples include eCos ,  LynxOS , QNX, RTAI,  RTLinux , Symbian OS,VxWorks , Windows CE,  MontaVista Linux OS examples include versions of Microsoft Windows (like Windows 10, Windows 8, Windows 7, Windows Vista, and Windows XP), Apple's macOS  (formerly OS X),  iOS , Chrome OS, BlackBerry Tablet OS, and flavors of the open source operating system Linux. Operating Systems example

6. A real-time operating system is an operating system intended to serve real-time applications that process data as it comes in, typically without buffer delays. It is deterministic. It is time sensitive. It can’t use virtual memory. It is dedicated to single work. It has low interrupt latency. Real time OS features

7. A Non-real time OS or General purpose OS is the operating system made for high end, general purpose systems like a personal computer, a work station, a server system etc. It is not deterministic. It is time insensitive. It can use virtual memory concept. It is used in multi-user environment. It has high interrupt latency Non-Real time OS features

8. A regular OS focuses on computing throughput while an RTOS focuses on very fast response time OS’es are used in a wide variety of applications while RTOS’s are generally embedded in devices that require real time response Summary

9. Available system-memory Available processor speed Limited power dissipation when running the system Constraints of an Embedded System Design

10. Components of ES hardware

11. Program Flow and data path Control Unit (CU) includes a fetch unit for fetching instructions from the memory Execution Unit (EU) includes circuits for arithmetic and logical unit (ALU) Embedded Processor

12. 1. General purpose microprocessor (GPP) Instructions are defined not specific to an application Eg : Microprocessor, Embedded Processor 2. Application Specific Instruction Set Processor (ASIP) Instructions are defined specific to an application eg : DSP, Media processor, Network processor An Embedded processor can be any of the following

13. 3. Single Purpose processors as additional processors eg : As co processors, accelerators,Controllers 4. GPP or ASIP Integrated into either an Application Specific Integrated Circuit (ASIC), or a Very Large Scale Integrated Circuit (VLSI) 5. Application Specific System Processor (ASSP) Typically a set top box processor or mpeg video- processor or network application processor or mobile application processor Embedded Processor types

14. 6. Multi core processors or multiprocessor system using GPPs Eg . Multiprocessor system for Real time performance in a video-conference system, • Embedded firewall cum router, • High-end cell phone Embedded Processor types

15. Software embedded into the system

16. Assembler Linker Loader Locator Programmer Steps involved

17. Abstraction – Robot Arms and Motors Hardware and software architecture Extra functional Properties System related family of designs- consider earlier Designs Modular design (decomposed in such a way that they can be composed later) Mapping (Transforming the input in a way suitable for the system) User interface design (GUI, LCD) Refinements (to make the system most appropriate) Design Process in Embedded system

18. Power Dissipation Performance Process deadlines User interfaces Size Engineering cost – Cost of design Manufacturing cost – Cost of manufacturing each unit Flexibility – to design advanced versions later Prototype Development time Time to market System and user safety Maintenance Design Metrics

19. A design process is called bottom-to-top design if it builds by starting from the components A design process is called top-to-down design if it first starts with abstraction of the process and the details are created. Abstraction of Steps in design process

20. Requirements (Purpose, I/P,O/P, functioning) Specification (hardware, data type, System behavior, constraints of design) Architecture Components ( processor,memory,peripherals,ports ) System integration (assembling discrete modules) Five Levels of Abstraction in top-to-bottom design

21. Amount and type of hardware needed Optimizing power dissipation and consumption Clock rate reduction Process deadlines Flexibility Upgrade ability Reliability Challenges in Embedded system

22. Model: A model is a representation of a system in simple form. A network system has a model known as the OSI/ISO MODEL . 23

23. OSI Model: 24

24. Embedded System Model: Similarly the Embedded system has a model divided into 3 layers: Application Layer – API and UI. System software layer – middleware*, OS, device drivers. Hardware layer – processors, memory, I/O units, display units. *middleware enables inputs from one system and outputs to another. 25

25. Vending Machine Model: 26

26. Smart Card Model: 27

27. Product Life Cycle: The collection of these things that we do as we move from requirement to application is often called the product life cycle . There are probably as many different product life cycle models as there are people designing these systems. Each of these models has its supporters and each also has it group of detractors . 28

28. Life Cycle Models: Product life cycle breaks the development process into a series of interrelated activities. Each activity plays a role of transforming its input ( specification ) into an output ( a selected solution ). The organization of the steps is done according to a design process model – the LIFE CYCLE MODEL. 29

29. Customer Needs: Find out what the customer wants. Think of a way to give them what they wants. Prove what you’ve done by building and testing it. Build a lot of them to prove that it wasn’t an accident Use the product to solve the customer’s problem 30

30. Hockey Stick Curve: 31

31. Waterfall Model: Looks like a waterfall. Steps include: Specification Preliminary Design Design review Detailed Design Design review Implementation Review 32

32. Waterfall Model: 33

33. V Model: 34

34. Spiral Model: The Spiral model was proposed and developed by Barry Boehm , A Spiral Model of Software Development and Enhancement, Computer , May 1988. The model takes a risk-oriented view of the development life cycle. Each spiral addresses the major risks that have been identified. After all the risks have been addressed, the spiral model terminates . 35

35. Spiral Model: The steps include: Determine objectives, alternatives, and constraints Identify and resolve risks Evaluate alternatives Develop deliverables-verify they are correct Plan the next iteration Commit to an approach for next iteration 36

36. Spiral Model: 37

37. ARM Microprocessor 38

38. ARM: Originally known as ACORN RISC Machine. Later Advanced RISC Machine. Owned by ARM Holdings. 32 bit processors, can withstand high level applications. Licensed to many manufacturers.( I tell you how to make and you make in your name ) RISC, but not purely. ARM 9 announced in 1997. 39

39. ARM features: Has LOAD-STORE architecture. 32 bit processor. Has barrel shifter. Has conditional execution. Usually supports 3 modes: ARM mode, THUMB mode and Jazelle mode . Has 2 source registers, Rm and Rn. A and B bus that help reading the source operands. Ref : https://www.youtube.com/watch?v=w6i1bvgdiwY&list=PL3uLubnzL2TmQOat3lRUgbQJrq9rgIjJb 40

40. ARM advantages: High code density. Low power consumption. Smaller size. 41

41. 42

42. 43

43. ARM architecture: The ARM processor consists of: Arithmetic Logic Unit (32-bit) One Booth multiplier (32-bit) One Barrel shifter One Control unit Register file - 37 registers each of 32 bits( 6 are status registers and 16 registers available to the user). 44

44. CPSR: 45

45. 46

46. ARM registers: 16 registers are available to the user. The remaining 15 registers are used to speed up exception processing. There are two program status registers: CPSR (current program status registers) SPSR (saved program status registers) r13 acts as a stack pointer register . r14 acts as a link register ( next instruction after a branch or Link instruction ). r15 acts as a program counter register. In RISC architecture, the PC has the address of the next instruction to be fetched, not executed as in Intel (CISC) 47

47. ARM Processor Modes: 7 modes : Abort - when there is a failed attempt to access memory . Fast interrupt request Interrupt request modes Supervisor mode - mode that the processor is in after reset and is generally the mode that an operating system kernel operates in . System mode - special version of user mode that allows full read-write access to the CPSR. Undefined mode - when the processor encounters an instruction that is undefined or not supported by the implementation . User mode is used for programs and applications . 48

48. ARM 7: Pipeline Depth: 3 stage (Fetch, Decode, Execute) Operating frequency: 180 MHz Power Consumption: 0.06 mW/MHz MIPS/MHz: 0.97 Architecture used: Von-Neumann MMU/MPU: Not present Cache Memory: Not present Jazelle Instruction: Not present Thumb Instruction: Yes (16 bit instruction set) ARM Instruction set: Yes (32 bit) ISA (Instruction Set Architecture): V4T (4 TH Version) Interrupt Controller: Not Present Power Management: No in built Power Management 49

49. ARM 7: 50

50. ARM 7: 51

51. ARM 9: Pipeline Depth: 5 stage (Fetch, Decode, Execute, Decode, Write) Operating frequency: 150 MHz Power Consumption: 0.19 mW/MHz MIPS/MHz: 1.1 Architecture used: Harvard MMU/MPU: Present Cache Memory: Present (separate 16k/8k) ARM/ Thumb Instruction: Support both ISA (Instruction Set Architecture): V5T(ARM926EJ-S) 31 (32-Bit size) Registers 32-bit ALU & Barrel Shifter Enhanced 32- bit MAC block Memory Controller 52

52. ARM 9: 53

53. ARM 9: 54