Extra Cavity Diode Laser (ECDL).pptx mmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmm

An Extra Cavity Diode Laser (ECDL) is a type of tunable semiconductor laser that combines the compactness of a laser diode with the flexibility of an external optical cavity. Unlike ordinary diode lasers, which have fixed emission wavelengths determined by their internal cavity, an ECDL uses an external diffraction grating or mirror system to provide wavelength selectivity and tunability.

The laser diode inside the ECDL acts as the gain medium, while the external cavity provides additional optical feedback. By adjusting the diffraction grating angle or tuning mechanism, the laser’s output wavelength can be precisely controlled across a narrow frequency range with high spectral purity.

Key Features of ECDL

Narrow Linewidth: Produces highly coherent, single-frequency light.

Wavelength Tunability: Can be tuned over several nanometers by adjusting the cavity or grating.

High Stability: Reduced frequency noise compared to standard diode lasers.

Low Cost & Compact Design: Utilizes small semiconductor diode chips with external optics.

Working Principle

The diode laser generates spontaneous emission.

The external cavity (grating/mirror) selects a specific wavelength and reflects it back into the diode for stimulated emission.

This feedback suppresses unwanted modes, ensuring single longitudinal mode operation.

The output beam is highly stable, tunable, and narrow in linewidth.

Applications

Spectroscopy (atomic and molecular studies requiring precise wavelengths).

Optical Communications (as stable, tunable light sources).

LIDAR Systems (for remote sensing and atmospheric studies).

Metrology (frequency standards, atomic clocks).

Quantum Optics & Cold Atom Experiments (laser cooling and trapping).

1. Extra Cavity Diode Laser (ECDL)

2. ECDL 01. Combines a semiconductor laser diode with an external wavelength- selective component (typically a diffraction grating ) 02. Why ECDLs? • Extremely narrow linewidth (<1 MHz possible) • Tuneable via grating (length), temperature, and current • Essential for precision spectroscopy, quantum computing, and metrology 2

3. System Requirement 3 Frequency tuning range: ±10 GHz typical Frequency stability: <1 kHz drift Control Bandwidths : • Temperature loop: ~0.1–1 Hz (slow thermal response) • Current loop: ~1–10 kHz (modulates carrier density) • Piezo (length) loop: ~1–100 kHz (fast tuning of external cavity) Interfaces : • Sensors: Thermistor, photodiode, wavelength reference • Actuators: TEC driver, laser current source, piezo amplifier Host Platform : Kria K26 SOM with FPGA fabric and ARM Cortex-A72

4. Block Diagram Sensors , ADC , FPGA FPGA Fabric: PID Controller 1 – Temperature PID Controller 2 – Current PID Controller 3 – Piezo length DAC/PWM outputs to actuators .ARM processor: Tuning interface (UART/Web) Monitoring/logging Dynamic PID coefficient tuning via AXI - LIte 4

5. PID Control : Temperature Loop 5 Purpose : Keep laser diode and mount at stable temperature Components : TEC controlled by PWM/DAC Control Characteristics: Slow loop (~1Hz), large thermal inertia Integral term dominant; derivative may be negligible Anti-windup and safety interlocks essential

6. PID Control : Current Loop 6 Purpose : Control diode injection current to shift wavelength Components : Monitor photodiode or frequency error signal Analog laser current driver Control Characteristics: Fast loop (1-10kHz) High resolution and noise rejection required May include modulation for frequency dithering/locking Implemented in FPGA fabric with fixed-point math

7. PID Control : Length (Piezo) Loop 7 Purpose : Tune external cavity length via piezo stack Feedback : Frequency discriminator , interferometer, or spectroscopy lock-in signal Actuator: High-Voltage piezo amplifier (Controlled by DAC) Control Characteristics : Bandwidth >10kHz Requires low latency PID with anti aliasing External frequency error signal from wavemeter or FP cavity

8. FPGA Implementation (Kria SOM) PID Controller : Implemented using fixed point arithmetic Difference equation from bilinear transform (Tustin Method) Interface : AXI- Stream for ADC/DAC data paths AXI- Lite for control and PID tuning registers 8 ARM-Linux Stack: Web dashboard or CLI over UART for tuning Logging of error , setpoint , output , etc Clock Management : Separate clocks for ADC, DAC , and logic PLL for clean low- jitter control signals