Instruction Cycle in Computer Organization.
Computer science.
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Language: en
Added: Oct 26, 2022
Slides: 14 pages
Slide Content
Instruction Cycle in Computer Organization -:-:-:-:-:-By Yash Verma-:-:-:-:-:-
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What is Instruction Cycle? The Instruction cycle (also known as the fetch-decode-execute cycle, or simply the fetch execute cycle) is the cycle that is followed by the central processing unit (CPU) from boot-up until the computer has shut down in order to process instructions. It consists of three main stages: 1. The fetch stage 2. The decode stage 3. The execute stage Two main step: ҉ Fetch ҉ execute
Fetch Cycle Execute Cycle START Fetch Next Instruction Execute Instruction HALT
Fetch Cycle ۞ The address of next instruction to be fetched is hold by Program Counter (PC). ۞ The instruction is fetched by the processor from memory location pointed to by PC . ۞ Increment PC . ۞ Unless told otherwise. ۞ Instruction is loaded into Instruction Register (IR). ۞ Processor interprets instruction and performs required actions.
Execute Cycle ۞ Processor-memory ۞ Data transfer between CPU and main memory. ۞ Processor I/O. ۞ Data transfer between CPU and I/O module. ۞ Data processing. ۞ Some arithmetic or logical operation on data. ۞ Control. ۞ Alteration of sequence of operations. ۞ e.g. jump. ۞ Combination of above.
Instruction Cycle State Diagram
Summary Of Stages
Steps Fetch Execute Cycle Steps Simplify description 1 The PC contains the address of the memory location that has the next instruction which has to be fetched PC has address of next instruction 2 PC has address of next instruction PC copied to the MAR 3 The contents (instruction) at the memory location (address) contained in MAR are then copied into the MDR Lookup MAR and get contents. Copy contents into the MDR 4 The contents (instruction) in the MDR is then copied and placed into the CIR Copy MDR contents into the CIR 5 The value in the PC is then incremented by 1 so that it now points to the next instruction which has to be fetched PC is then incremented by 1 6 The instruction is finally decoded and then executed by sending out signals (via control bus) to the various components of the computer The instruction is decoded and then executed
Fetch Stage The instruction is fetched from the memory address that is currently stored in the program counter and stored into the instruction register. At the end of the fetch operation, the PC points to the next instruction that will be read at the next cycle.
Decode Stage During this stage, the encoded instruction presented in the instruction register is interpreted by the decoder.
Execute Stage The control unit of the CPU passes the decoded information as a sequence of control signals to the relevant functional units of the CPU to perform the actions required by the instruction, such as reading values from registers, passing them to the ALU to perform mathematical or logic functions on them, and writing the result back to a register. If the ALU is involved, it sends a condition signal back to the CU. The result generated by the operation is stored in the main memory or sent to an output device. Based on the feedback from the ALU, the PC may be updated to a different address from which the next instruction will be fetched .
Repeat Cycle In addition, on most processors interrupts can occur. This will cause the CPU to jump to an interrupt service routine, execute that and then return. In some cases an instruction can be interrupted in the middle, the instruction will have no effect, but will be re-executed after return from the interrupt.