Instruction timing diagram in micro processor

Computer organization

1. Instruction Timing in 8085: MOV M, reg & MOV reg, M Understanding PC, HL, Memory Read & Write Cycles

2. Program Counter (PC) • PC is a 16-bit register in 8085. • Holds the address of the NEXT instruction. • Example: If PC=2000H → CPU fetches instruction from memory[2000H]. • After fetching, PC increments automatically to 2001H. • PC is NOT memory, it only points to memory.

3. What is PC? PC (Program Counter) is a 16-bit register in 8085.

It always holds the address of the next instruction to be executed.

So if your program is stored starting at 2000H, then initially PC = 2000H.

4. PC says: “Hey, the next instruction is at page 2000H.”

CPU goes to that memory location, reads the instruction.

Then PC moves to the next page (2001H)

5. Meaning of M Operand • M is NOT a register. • M refers to memory location whose address is in HL pair. • HL → 16-bit memory address. • Example: If HL=2500H, then M = Memory[2500H].

6. M means memory location pointed by HL pair.

MOV reg , M = Copy data from memory[HL] → register. If we want to get data from memory, the microprocessor must read it.
That’s why a Memory Read machine cycle occurs.

7. This is an indirect read instruction and takes two memory cycles (M1 and M2). The first machine cycle (M1) is known as instruction fetch cycle, during which the op code of the instruction is fetched from the memory. This machine cycle takes four T- states. The second machine cycle M2 is known as the execution cycle during which the data from the memory location addressed by H-L register pair is transferred to the given register. The second machine takes three states.

8. This is an indirect write instruction. The timing diagram of MOV M, reg instruction. . The first three states of memory fetch cycle M1 are the same as for MOV reg , M. During fourth T-state (T4) of M1, the contents of specified register are copied in the temporary register.

9. MOV M, reg vs MOV reg, M • MOV M, reg → Memory Write cycle. - Register → Memory[HL]. • MOV reg, M → Memory Read cycle. - Memory[HL] → Register. • Both take 7T states (2 machine cycles).