Layout & Stick Diagram Design Rules

This Presentation slides consists of the various design rules associated with layout & stick Diagrams with basic CMOS Gates explained.

1. LAYOUT DESIGN RULES & GATE LAYOUT By S.VARUN M.Tech [EST]

2. What is a LAYOUT DESIGN?

3. Layout Design is a schematic of the Integrated Circuit(IC) which describes the exact placement of the components for fabrication. Layout Design rules describe how small features can be & how closely they can be packed in a manufacturing process

4. Why do we need Layout Design Rules?

5. Industrial Design rules are generally specified in microns. This makes migrating from one process to more advanced process difficult because not all rules scale in the same way.

6. In order to bring uniformity, Mead & Conway popularized lambda-based design rules based on single parameter. Lambda,characterizes the resolution of the process & is generally the half of the minimum drawn transistor channel length.

7. The channel length is the distance between drain & the source which is set by a minimum width of a polysilicon wire. Ex:-A 180 nm process has a minimum polysilicon width of 0.18microns and uses design rules with lambda=0.09.

8. However the designers make the scaling layout trivial. The same layout can be moved to a new process simply by specifying the Lambda value. The potential density advantage of micron rules is sacrificed for simplicity and easy scalability of lambda rules.

9. Designers often describe a process by its feature size. Feature Size refers to the minimum transistor length,So lambda is half the feature size. Transistor dimensions are always specified by Width/Length ratio.

10. Ex-In 0.6 um technology, width corresponds to 1.2um & length to 0.6um. In digital systems, the transistors are chosen to have minimum possible length because short channel transistors are faster, smaller & consume less power.

11. STICK DIAGRAMS Stick diagrams may be used to convey layer information through the use of a color code Ex-In the case of nMOS design, green for n-diffusion, red for polysilicon, blue for metal,and black for contact areas.

12. A stick diagram is stick figure view of a layout. It is useful for a)Planning Layout b)Relative Placement of transistors c)Assignment of signals to layers d)Connections between cells e)Cell hierarchy

13. LAYOUT ENCODINGS

14. n-Type ENHANCEMENT

15. n-Type DEPLETION

16. p-Type ENHANCEMENT

17. STICK DIAGRAM DESIGN RULES 1)When two or more ‘sticks’ of the same type cross or touch each other which represents electrical contact. 2)When two or more ‘sticks’ of different type cross or touch each other which represents no electrical contact.

18. 3)When poly crosses diffusion, it represents a transistor. 4)In CMOS, a demarcation line is drawn to avoid touching of p-diffusion & n-diffusion. All p-MOS should lie on one side of the line & all n-MOS should be on the other side of the line.

19. DIAGRAMATIC REPRESENTATIONS

20. n-Type ENHANCEMENT & DEPLETION TRANSISTOR

21. p-Type ENHANCEMENT TRANSISTOR

22. CMOS INVERTER STICK & LAYOUT DIAGRAM

23. CMOS NAND GATE STICK DIAGRAM

24. CMOS NOR GATE STICK DIAGRAM

25. EXAMPLE EXPRESSION

26. THANK YOU ALL S.VARUN