Lec1b-Applications & Domains of embedded systems.pptx

Applications & Domains of embedded systems

1. EE 319K/EE319H Introduction to Microcontrollers Lecture 1b: EE319K/EE319H, Introduction to I/O Erez , Gerstlauer, Holt, Cuevas, Telang , Tiwari, Valvano, Yerraballi

2. Review Cortex M Harvard Architecture Clock, DIR (1=out, 0=in), DEN (1=0) DATA input /output

3. Agenda Announcements Install Keil 5, laptops to zoom Quiz 1, read chapter 1 (ebook Ch 2) EE312H demo (EE319H only) LC3 to ARM Cortex Conversion Input/output (Toggle PF3) Initialization Input Output Lab 1 demo Simulation for Labs 1 and 2 Integrated Development Environment (IDE) Simulation -> board (Lab 3 and on)

4. EE319H/EE312H example #include < stdio.h > int main(void){ printf ("hi, Milos\n"); int a=0; while(a <= 0){ a--; } printf("done, a=%d\ n",a ); return 0; } Run in Printf_UART_4C123 Run in ST7735_4C123

5. LC3 to ARM Cortex M LC3 ARM Cortex M Address bus is 16 bits Address bus is 32 bits Data are fetched as 16 bits Data can be fetched as 8,16, or 32 bits Data are 16-bit signed Data can be signed or unsigned Each memory cell is 16 bits Each memory cells is 8 bits, little endian Registers are 16 bits Registers are 32 bits PC is a separate register PC is R15 Stack pointer is R6 SP is R13 Link register is R7 LR is R14 Data is 16-bit signed Data can be 8,16,32 bits, signed/unsigned Negative, Zero, Positive Negative, Zero, Carry, Overflow Hex literal format x1234 Hex literal format 0x1234 All instructions are 16 bits Most instructions are 16 bits, some are 32

6. LC3 to ARM Cortex M LC3 ARM Cortex M LEA R0,Label LDR R0,=Label ;R0 is address LD R1,Label LDR R0,=Label ;R1 <- M[ PC+Offset ] LDRSH R1,[R0] ;16-bit signed value LDR R1,R0,n LDRSH R1,[R0,#n] ;R1 <- M[R0+n] ST R1,Label LDR R0,=Label STRH R1,[R0] ;R1 -> M[ PC+Offset ] STR R1,R0,n STRH R1,[R0,#n] ;R1 -> M[R0+n] AND R1,R1,#0 MOV R0,#5 ;R0 <- 5 ADD R0,R1,#5 ADD R6,R6,#-1 PUSH {R0} ;push onto stack STR R0,R6,#0 LDR R0,R6,#0 POP {R0} ; pop from stack ADD R6,R6,#1

7. LC3 to ARM Cortex M LC3 ARM Cortex M ADD R1,R2,R3 ADD R1,R2,R3 ; R1 <- R2 + R3 ADD R1,R2,#5 ADD R1,R2,#5 ; R1 <- R2 + 5 AND R1,R2,R3 AND R1,R2,R3 ; R1 <- R2 & R3 AND R1,R2,#x10 AND R1,R2,#0x10 ; R1 <- R2 & 16 NOT R1,R2 EOR R1,R2,#0xFFFFFFFF ; R1 <- ~(R2) NOT R3,R3 SUB R1 ,R2, R3 ; R1 <- R2 – R3 ADD R3,R3,#1 ADD R1,R2,R3 ADD R1,R2,R2 LSL R1,R2,#1 ; left shift Many instructions ASR R1,R2,#1 ; right shift Many instructions MUL R1,R2,R3 ; R1 <- R2 * R3 Many instructions UDIV R1,R2,R3 ; R1 <- R2 / R3 Many instructions SDIV R1,R2,R3 ; R1 <- R2 / R3

8. LC3 to ARM Cortex M LC3 ARM Cortex M BR Target B Target ; always BRnzp Target B Target ; always BRn Target BMI Target ; on minus, N=1 BRz Target BEQ Target ; on zero, Z=1 BRp Target Many instructions ; on positive, P=1 BRnp Target BNE Target ; on not zero, Z=0 BRzp Target BPL Target ; on zero or positive BRnz Target Many instructions ; on P=0

9. LC3 to ARM Cortex M LC3 ARM Cortex M JSR Sub BL Sub ; call sub (set LR) JSRR R4 BLX R4 ; call via R4 (set LR) RET BX LR ; return from sub JMP R2 BX R2 ; PC <- R2 TRAP x25 SVC #0x25 ; similar concepts RTI BX LR ; return from interrupt

10. Memory Access Memory AREA data,align =2 Stuff SPACE 4 Write to memory LDR R0,=Stuff MOV R1,#5 STR R1,[R0] Read from memory LDR R0,=Stuff LDR R1,[R0] Show machine code for LDR MOV Assemble this in InputOutput_4C123asm

11. I/O Ports and Control Registers Address 7 6 5 4 3 2 1 Name 400F.E608 - - GPIOF GPIOE GPIOD GPIOC GPIOB GPIOA SYSCTL_RCGCGPIO_R 4002. 5 3FC - - - DATA DATA DATA DATA DATA GPIO_PORT F _DATA_R 4002. 5 400 - - - DIR DIR DIR DIR DIR GPIO_PORT F _DIR_R 4002. 5 51C - - - DEN DEN DEN DEN DEN GPIO_PORT F _DEN_R Initialization (executed once at beginning) Turn on clock in SYSCTL_RCGCGPIO_R Wait Wait two bus cycles (two NOP instructions) Write 1 DIR bit for output or 0 for input Set DEN bits to 1 to enable data pins Input/output from pin Input: Read from GPIO_PORT F _DATA_R Output: Write GPIO_PORTF_DATA_R

12. Toggle PF3 Start LDR R0 ,=SYSCTL_RCGCGPIO_R LDR R1 ,[ R0 ] ORR R1 ,# 0x20 ;turn on clock F STR R1 ,[ R0 ] NOP ;wait for clock to stabilize NOP LDR R0 ,=GPIO_PORTF_DIR_R MOV R1 ,# 0x08 ;PF3 output, STR R1 ,[ R0 ] LDR R0 ,=GPIO_PORTF_DEN_R MOV R1 ,# 0x08 ;PF3 enable pin STR R1 ,[ R0 ] loop LDR R0 ,=GPIO_PORTF_DATA_R LDR R1 ,[ R0 ] EOR R1 ,# 0x08 ;toggle PF3 pin STR R1 ,[ R0 ] LDR R2 ,=1000000 wait SUBS R2,R2 ,# 1 BNE wait B loop Run in InputOutput_4C123asm With and without delay Run Lab1 starter code in simulator Run Lab1 solution in simulator

13. Data Flow Graph Lab 8: Position Measurement System

14. Call Graph Position Measurement System

15. Structured Programming Common Constructs (as Flowcharts, also pseudocode)

16. Flowchart Toaster oven: Coding in assembly and/or high-level language (C)

17. Flowchart Example 1.3. Design a flowchart for a system that performs two independent tasks. The first task is to output a 20 kHz square wave on PORTA in real time (period is 50 ms). The second task is to read a value from PORTB , divide the value by 4, add 12, and output the result on PORTD . This second task is repeated over and over.

18. Summary EE319H/EE312H demo Registers Memory Access Input/output ports Initialization (clock, DIR, DEN) Read from I/O pins Write to output pins Data flow graph Call graph Flow chart