Lecture Notes in Design for Testability _Test Economics.ppt
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Lecture Notes in Design for Testability
Size: 115.25 KB
Language: en
Added: Aug 05, 2024
Slides: 19 pages
Slide Content
Test Economics
•Economics defined
•Costs
•Production
•Benefit - cost analysis
•Economics of design-for-testability
(DFT)
•Quality and yield loss
•Summary
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 1
The Meaning of Economics
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 2
Economics is the study of how men choose to
use scarce or limited productive resources
(land, labor, capital goods such as machinery,
and technical knowledge) to produce various
commodities (such as wheat, overcoats, roads,
concerts, and yachts) and to distribute them
to various members of society for their
consumption.
-- Paul Samuelson
Engineering Economics
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 3
Engineering Economics is the study of how
engineers choose to optimize their designs
and construction methods to produce
objects and systems that will optimize their
efficiency and hence the satisfaction of their
clients.
Costs
•Fixed cost
•Variable cost
•Total cost
•Average cost
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 4
Example: Costs of running a car
Fixed cost
Variable cost
Total cost
Average cost
$25,000
20 cents/mile
$25,000 + 0.2x
$ ───── + 0.2
25,000
x
Purchase price of car
Gasoline, maintenance,
repairs
For traveling x miles
Total cost / x
Simple Cost Analysis
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 5
Case 1: 10,000 miles/yr, $12,500 resale value after 5 years
Average cost = $ ────────── + 0.2 = 45 cents/mile
25,000 - 12,500
50,000
Case 2: 10,000 miles/yr, $6,250 resale value after 10 years
Average cost = $ ───────── + 0.2 = 38.75 cents/mile
Case 3: 10,000 miles/yr, $0 resale value after 20 years
Average cost = $ ─────── + 0.2 = 32.5 cents/mile
25,000 - 6,250
100,000
25,000 - 0
200,000
Cost Analysis Graph
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 6
40,000
25,000
20,000
200k150k100k50k
100
50
00
0
Miles Driven
F
i
x
e
d
,
T
o
t
a
l
a
n
d
V
a
r
i
a
b
l
e
C
o
s
t
s
(
$
)
A
v
e
r
a
g
e
C
o
s
t
(
c
e
n
t
s
)
To
tal
cost
Fixed cost
Variable cost Average cost
Production
•Inputs (X): Labor, land, capital, enterprise,
energy (X may include both fixed and
variable costs)
•Variable costs (x)
•Production output, Q = f (x)
•Average product, Q / x
•Marginal product, dQ / dx
•Total Average cost, X / Q
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 7
Law of Diminishing Returns
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 8
If one input of production is increased keeping
inputs constant, then the output may increase,
eventually reaching a point beyond which
increasing the inputs will cause progressively
less increase in output.
Input Resources, x
O
u
t
p
u
t
,
Q
(
x
)
Technological Efficiency
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 9
Technological efficiency = Q/x
where x = variable cost
d Q 1 dQ Q Q dQ
── ─ = 0; ─ ── ─ ── = 0 or ── = ──
dx x x dx x
2
x dx
To maximize tech. Efficiency:
Input Resources, x
T
e
c
h
.
E
f
f
.
1.0
0.5
0.0
Max. tech. efficiency
Q/x
dQ/dx
Economic Efficiency
•Maximum economic efficiency minimizes
the total average cost X /Q, where X is the
total (fixed + variable) cost.
•Maximum economic efficiency is achieved
when total average cost equals the
marginal cost,
X /Q = dX /dQ.
•For average cost = marginal cost
•Take variable cost to maximize technological
efficiency
•Take total cost to maximize economic efficiency
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 10
Maximum Efficiencies
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 11
Marginal cost, dx/dQ
Average cost, X/Q
For zero
fixed cost
For actual
fixed cost
Max. tech.
efficiency
Max. economic
efficiency
Input resources
C
o
s
t
s
Mass Production
•Production can be increased at a faster rate
than the increase of inputs. This is known as
increasing returns to scale.
•Some reasons for increasing returns to scale
•Technological factors
•Specialization
•Only some inputs are increased
•If increase of inputs continues, eventually the
law of diminishing returns applies.
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 12
Benefit-Cost Analysis
•Benefits: Savings in manufacturing
costs (capital and operational) and time,
reduced wastage, automation, etc.
•Costs: Extra hardware, training of
personnel, etc.
•Benefit/cost ratio
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 13
Annual benefits
B/C ratio = ───────────── > 1
Annual costs
Example: A PCB Repair Shop
•Average cost of repair = $350, includes
–Cost of diagnostic test = $300
–Cost of replacement chip = $ 10
–Cost of assembly and test = $ 40
•Failure data for 100 chips on PCB
–Chip A failure rate= 90%
–Chip B failure rate= 90%
–Collective failure rate for chips A and B
= 0.9 + 0.9 – 0.81 = 0.99
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 14
PCB Repair Strategies
•Strategy 1
–Diagnose the faulty PCB
–Replace faulty chip and test
•Strategy 2
–Replace chips A and B
–Test
•Pass → Done
•Fail
–Diagnose the faulty PCB
–Replace faulty chip and test
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 15
PCB Repair Strategies
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 16
Faulty PCB
Apply diagnostic
Test
Cost = $300
Replace faulty
Chip and test
Cost = $50
Faulty PCB
Replace chips
A and B and test
Cost = $60
Replace faulty
Chip and test
Cost = $50
PCB passes
Test?
Apply diagnostic
Test
Cost = $300
Repair completed
Av. Cost = $63.50
Repair completed
Av. Cost = $350.50
Yes Prob=0.99
No
Prob=0.01
Strategy 1
Strategy 2
Economics of Design for Testability
(DFT)
•Consider life-cycle cost; DFT on chip may
impact the costs at board and system levels.
•Weigh costs against benefits
•Cost examples: reduced yield due to area
overhead, yield loss due to non-functional tests
•Benefit examples: Reduced ATE cost due to
self-test, inexpensive alternatives to burn-in
test
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 17
Benefits and Costs of DFT
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 18
Design
and test
+ / -
+ / -
+ / -
Fabri-
cation
+
+
+
Manuf.
Test
-
-
-
Level
Chips
Boards
System
Maintenance
test
-
Diagnosis
and repair
-
-
Service
interruption
-
+ Cost increase
- Cost saving
+/- Cost increase may balance cost reduction
Summary
•Economics teaches us how to make the
right trade-offs.
•It combines common sense, experience and
mathematical methods.
•The overall benefit/cost ratio for design, test
and manufacturing should be maximized;
one should select the most economic design
over the cheapest design.
•A DFT or test method should be selected to
improve the product quality with minimal
increase in cost due to area overhead and
yield loss.
Copyright 2001,
Agrawal & Bushnell
VLSI Test: Lecture 3 19