Lecture Notes - Microprocessor - Unit 1 - Microprocessor Architecture and its operation

Description:
Welcome to the comprehensive guide on Microprocessor and micro controller tailored for First year (Second Semester) B.Sc. Computer Science students affiliated with Alagappa University. This document covers fundamental concepts of microprocessor and micro controller. PDF content is prepared from the text book R. S. Gaonkar- "Microprocessor Architecture- Programming and Applications with 8085"- 5th Edition

Key Topics Covered:

Main Topic : Microprocessor Architecture and its operations
Sub-Topic :
Microprocessor initiated operations and 8085 Bus organization – Internal Data operations and 8085 registers - Peripheral or External initiated operations.

Target Audience:

First year (Second Semester) B.Sc. Computer Science students at Alagappa University seeking a solid foundation in microprocessor and micro controller for academic and practical applications.
About the Author:
Dr. S. Murugan is Associate Professor at Alagappa Government Arts College, Karaikudi. With more than 20 years of teaching experience in the field of Computer Science, Dr. S. Murugan has a passion for simplifying complex concepts in microprocessor and micro controller.

Disclaimer:
This document is intended for educational purposes only. The content presented here reflects the author’s understanding in the field of Microprocessor and micro controller.

1. Microprocessor and Micro Controller
Unit I
Microprocessor Architecture and its Operation
Prepared By
Dr.S.Murugan, Associate Professor
Department of Computer Science,
AlagappaGovernmentArts College, Karaikudi.
(Affiliated by AlagappaUniversity)
Mailid: [email protected]
Reference Book:
Microprocessor Architecture –Programming and Applications with 8085 –R. S. Gaonkar

2. Introduction -Microprocessor Architecture and
its Operation

3. Microprocessor
➢Themicroprocessorisaprogrammabledigitaldevice,
designedwithregisters,flip-flopsandtimingelement.
➢Itisacentralprocessingunit(CPU)onasingle
integratedcircuit(IC)chipthatperformsarithmetic
andlogicoperations,datatransfer,andcontrol
operations.
➢Itactsasthebrainofacomputerorembeddedsystem.

4. Microprocessor architecture
➢Microprocessorarchitecturereferstotheinternal
structureandorganizationofcomponentsina
microprocessor,includingitsregisters,buses,
instructionset,andcontrolunit,whichcollectively
determinehowitprocessesdata.
➢Thefunctionofmicroprocessorcanbeclassifiedinto
threegeneralcategories;
(i)Microprocessor-initiatedoperations
(ii)internaloperations
(iii)peripheraloperations.

5. Microprocessor architecture
➢Toperformtheabovefunctions,themicroprocessor
requiresagroupoflogiccircuitsandasetofsignals
calledcontrolsignal.
➢Acontrolsignalisanelectricalsignalgeneratedby
thecontrolunitofamicroprocessororcomputer
systemtocoordinateandcontroltheoperationofother
components,suchasmemory,input/outputdevices,
andtheprocessoritself.

6. Microprocessor architecture
➢ TheCentralProcessingUnit(CPU)andtheMicro
ProcessorUnit(MPU)isrelatedbutnotsame.ACPU
canbeimplementedasacombinationofmorethan
onechip.
➢Whereas,theMPUrefersasinglechipprocessor.The
microprocessorandMicroProcessorUnitoftenare
usedsynonymously.

7. Microprocessor initiated operations and Bus
Organization

8. Microprocessor initiated operations
➢ Microprocessor-initiatedoperationsaretasksperformed
bythemicroprocessortocommunicatewithmemoryand
peripherals,suchasmemoryread,memorywrite,I/Oread,
andI/Owriteoperations.
➢The MPU performs primarily four operations :
1.Memory Read : Reads data or instructions from memory.
2.Memory Write : Write data or instructions into memory.
3.I/O Read : Accepts data from input devices.
4.I/O Write : Sends data to output devices.

9. Microprocessor initiated operations
➢Tocommunicatewithaperipheraloramemory
location,theMPUneedstoperformthefollowing
steps:
1.Identify the peripheral or the memory location (with
its address)
2.Transfer binary information (data and instruction)
3.Provide timing or synchronization signals.
The8085MPUperformsthesefunctionsusingthree
setsofcommunicationlinescalledbuses:theaddress
bus,thedatabus,andthecontrolbus.

10. 8085 Bus Organization
➢The8085busorganizationreferstothesystemof
busesusedbythe8085microprocessorto
communicatewithmemory,input/outputdevices,
andothercomponentsasshowninFigure1.1.
➢The8085microprocessorhasthreeprimarybuses:
AddressBus,DataBus,andControlBus,each
servingaspecificpurposeinthemicroprocessor's
operation.

11. 8085 Bus Organization
Fig. 1.1 The 8085 Bus Structure

12. AddressBus
➢Theaddressbusisagroupof16linesgenerally
identifiedasA0toA15.
➢Itisunidirectional(bitsflowinonedirection)fromthe
microprocessortothememoryorperipheraldevices.
➢TheMPUusestheaddressbustospecifythememory
locationorI/Odevicetobeaccessed.
➢Inthe8085microprocessors,theaddressis16bits,
allowingaccessto2
16
=65,536(64KB)memory
locations.

13. AddressBus

14. DataBus
➢Thedatabusisagroupof8linesgenerallyidentified
asD0toD7.
➢Itisbi-directional(bitsflowinbothdirection)
betweenthemicroprocessorandthememoryor
peripheraldevices.
➢Thedatabusisusedtotransferdatabetweenthe
processor,memory,andI/Odevices.
➢TheeightdatalinesenabletheMPUtomanipulate8-
bitdatarangingfrom00toFF(2
8
=256).

15. DataBus
➢Thesmallestnumberthatcanappearonthedatabus
00000000(00).
➢Thelargestnumberthatcanappearonthedatabus
11111111(FF).
➢sothatthe8085isknownasan8-bitmicroprocessor

16. Difference between Data Bus and Address Bus
S. No.Feature Data Bus Address Bus
1.DirectionBidirectional Unidirectional
2.
Purpose
Transfers data or
instructions
Carries memory/I/O
addresses
3.Size
(8085)
8 bits 16 bits
4Functional
ity
Exchanges data
between components
Identifies memory or
I/O locations

17. Control Bus
➢Thecontrolbusiscomprisedofvarioussinglelines
thatcarrysynchronizationsignals.
➢Itisusedtoprovidethetimingorsynchronization
signals.
➢Thecontrolbuslinesarenotagroupoflineslike
addressbusordatabus,theindividuallinesthat
provideapulsetoindicateanMPUoperation.
➢TheMPUgeneratescontrolsignalsforevery
operation(suchasmemoryreadormemorywrite
operations).

18. Control Bus
➢Thecontrolbuscarriescontrolsignalstocoordinate
andmanagecommunicationbetweentheprocessor,
memory,andperipherals.Importantcontrolsignals
include:
oRD (Read):Indicates data is being read.
oWR (Write):Indicates data is being written.
oALE (Address Latch Enable):Distinguishes
address and data on the same lines.
oIO/M:Differentiates memory and I/O operations.
The control bus ensures proper synchronization
during data transfer.

19. Control Bus -Example
➢ForExamplethefollowinginstruction,thedata78is
transferredintoRegisterB.
200006MVIB,78H
➢Here2000isamemorylocation,06isahexcodefor
immediatedatatransfertoRegisterB.
Fig. 1.2 Memory Read Operation

20. Control Bus -Example
➢Thefollowingsequenceofstepstobefollowedtoread
aninstructionfromamemorylocationasshowninFig
1.2.
1.16-bitaddress(2000)placedontheaddressbus.
2.Theaddressisdecodedbyexternallogiccircuitand
thememorylocationisidentified.
3.MPUsendsthememoryreadcontrolsignal(pulse).
4.Thepulseactivatesthememorychip.
5.Thecontentsofthememorylocation(8-bitdata–06)
placedonthedatabusandbroughtinsidetheMPU.

21. Internal Data Operations and the 8085 Registers

22. Internal Data Operations
➢Internaldataoperationinthe8085microprocessor
referstooperationsthatmanipulatedatawithinthe
microprocessor,usingitsinternalregistersandthe
accumulator.
➢Theseoperationsincludearithmetic,logical,anddata
transferinstructionsthatinvolvetemporarystorage
andprocessingwithoutexternalmemoryaccess.For
example,addingtwonumbers,performingalogical
ANDoperation,ormovingdatabetweenregisters.
Theaccumulatorandgeneral-purposeregistersare
primarilyinvolvedintheseoperations.

23. Internal Data Operations
➢Theinternalarchitectureofthe8085microprocessor
determineshowandwhatoperationscanbeperformed
withthedata.Theseoperationsare
➢Store8-bitdata
➢Performarithmeticandlogicaloperations.
➢Testforconditions(CarryFlag).
➢Sequencetheexecutionofinstructions
(ProgramCounter)
➢Storedatatemporarilyduringexecutioninthe
definedR/Wmemorylocationscalledthestack.

24. 8085 Registers
➢Toperformtheaboveoperations,themicroprocessor
requiresregisters,anarithmetic/logicunit(ALU),
controllogicandinternalbuses.
➢Theprogrammingmodelofthe8085displayingthe
internalregistersandaccumulatorasshowninthe
figure1.3.
Fig. 1.3 The 8085 Programmable Registers

25. 8085 Registers
➢The8085microprocessorhasseveralprogrammable
registersthatperformspecificfunctionsindata
handlingandprocessing.
➢Here'saconciseexplanationofeachcomponent:
➢Accumulator (A): Stores results of arithmetic,
logical operations, and intermediate data.
➢General Purpose Registers (B, C, D, E, H, L):
Used for temporary storage of data during
operations.
➢Flag Register: Contains status flags (Z, S, P, CY,
AC) indicating conditions after operations.

26. 8085 Registers
➢Program Counter (PC): Holds the address of the
next instruction to be executed.
➢Stack Pointer (SP): Points to the top of the stack,
used for subroutine calls and returns.
➢Instruction Register (IR): Holds the current
instruction being decoded and executed.
➢Temporary Register: Holds intermediate data
during execution, typically used for internal
operations.

27. Microprocessor function -Example program
➢Thefollowingexampleprogram(additionoftwo
numbers)demonstratesthefunctionofthe
microprocessor.
➢Thehexcodesoftheprogramarestoredinmemory
locationsfrom2000to2005asshowninFig.1.2.

28. Microprocessor function with Example program
Memory
Location
Hex
Code
MnemonicsComments
2000 06MVIB,78H;Transferthevalue78intoRegisterB.
2001 78
2002 3EMVIA,F2H;TransferthevalueF2toAccumulator.
2003 F2
2004 80ADDB ;ThecontentofRegisterBisaddedwith
Accumulatorandtheresultsarestoredin
Accumulator.
2005 76HLT ;TerminatetheProgram

29. Microprocessor function with Example program
➢Whenexecutestheaboveinstructions,the
microprocessorplacestheaddress2000intoaddress
busandincrementstheaddressinthePC(Program
Counter)to2001forthenextoperation.Itbringsthe
code06,interpretsthecode,placestheaddress2001
ontheaddressbus,andthengetsbyte78Hand
incrementstheaddressinPCto2002.
➢TheFirsttwoinstructionisusedtotransferthedata
intoregisterBandRegisterA.

30. Microprocessor function with Example program
➢ThethirdinstructionADDisusedtoperformthe
additionoperationandtheresultisstoredinto
accumulator.Inthiscase78+F2=16AH,the
accumulatorholdsonlythevalue6A,thevalue1
indicatesthecarryflag.
➢TheFourthinstructionterminatestheprogram.

31. Peripheral or Externally Initiated Operation
➢External devices can initiate the following operations :
Reset, Interrupt, Ready and Hold.
➢Reset:Whentheresetpinisactivatedbyexternalkey
(resetkey),allinternaloperationsaresuspendedand
theprogramcounteriscleared.Now,theprogram
executioncanbeginatthezeromemoryaddress.
➢Interrupt:Themicroprocessorcanbeinterrupted
fromthenormalexecutionofinstructionsandaskedto
executesomeotherinstructionscalledaservice
routine.Themicroprocessorresumesitsoperation
aftercompletingtheserviceroutine.

32. Peripheral or Externally Initiated Operation
➢Ready:Ifthesignalofthisreadypinislow,the
microprocessorentersintoawaitstate.Ifitishigh,the
microprocessorreadytosendorreceivedata.
➢Hold:WhentheHOLDpinisactivatedbyan
externalsignal,themicroprocessorrelinquishes
controlofbusesandallowstheexternalperipheralsto
usethem.Forexample,theHOLDsignalisusedin
DirectMemoryAccess(DMA)datatransfer.

33. Difference between Microprocessor-initiated
operation and Peripheral-Initiated Operation
FeatureMicroprocessor-InitiatedPeripheral-Initiated
InitiatorMicroprocessor External device (peripheral)
Examples
Memory Read, Memory
Write, I/O Read
Interrupts, Direct Memory
Access (DMA)
Control
Controlled by
microprocessor signals
Triggered by external signals
PrioritySequentially executedCan interrupt current operations
Execution
Part of the microprocessor
program flow
Requires special handling like
ISR