Instruction SET T S PRADEEP KUMAR Assistant Professor (SG) VIT University – Chennai Campus http://www.pradeepkumar.org [email protected]
Topics to be covered Instruction Set Architecture (ISA) The ISA defines the set of instructions that a CPU can execute. It acts as an interface between hardware and software, allowing software developers to write programs that can run on any CPU implementing that ISA. Types Instruction Formats Types of Operations Addressing Modes
Instruction Format Elements of a machine instruction Operation Code – specifies the operation to be performed and this is a binary code. Source Operand Reference – operands that are inputs Result Operand reference – operand that are outputs Next instruction reference - This tells the processor where to fetch the next instruction after the execution of this instruction is complete
Instruction Format Operand Location Main or Virtual Memory Processor Register – a processor contains one or more register. In there is only one, reference is implicit. Else the register number is to be supplied. Immediate – The value of the operand is contained in a field in the instruction being executed I/O device - The instruction must specify the I/O module and device for the operation.
Instruction Format A Simple Instruction Format
Instruction Format
Instruction Format
Operations Data transfer Arithmetic Logical Conversion I/O System control Transfer of control
Data Transfer Operation Operation Name Description Move (Transfer) Transfer word or block from source to destination Store Transfer word from processor to memory Load (fetch) Transfer word from memory to processor Exchange Swap contents of source and destination Clear (Reset) Transfer word of 0s to destination Set Transfer word of 1s to destination PUSH Transfer word from source to top of stack POP Transfer word from top of stack to destination
Arithmetic ADD Subtract Multiply Divide Absolute – replace operand by its absolute value Negate – change sign of operand Increment – add 1 to operand Decrement – subtract 1 from operand
Logical AND, OR, NOT, X OR Test Compare Set control variables Shift Rotate
Transfer of Control Jump (Branch) – load PC with specified address Jump conditional Jump to subroutine Return Execute Skip – increment PC to next instruction Skip conditional Halt – stop program execution Wait No Operation
I/O Input (read) -Transfer data from specified I/O port or device to destination (e.g., main memory or processor register) Output (write) -Transfer data from specified source to I/O port Input/Output or device Start I/O -Transfer instructions to I/O processor to initiate I/O operation Test I/O -Transfer status information from I/O system to specified destination
Addressing modes The manner in which target address or effective address is identified within the instruction is called addressing mode Immediate Addressing Direct Addressing Indirect Addressing Register Addressing Register Indirect Addressing Displacement Addressing Stack Addressing
Immediate addressing
Immediate addressing Simplest form of addressing Operand value is present directly Operand = A Useful for defining constants or set initial values
Direct addressing
Direct addressing EA = A Effective address is just the address of the operand It only provides limited address space
Indirect addressing
Indirect addressing EA =(A) Parentheses specifies the contents of A Neither the address of the operand nor the operand Disadvantage: Two memory references to fetch the operand
Register addressing
Register addressing EA = R Similar to direct addressing. Address field refers to register rather than a main memory address Advantages: only a small address field is needed, no time consuming memory references Disadvantages: only limited registers are available in any processors when compared to main memory.
Register indirect addressing
Register indirect addressing EA = (R) Similar like indirect addressing, but instead of main memory, the reference is the register.
Displacement addressing
Displacement addressing EA = A + (R) Combination of direct addressing and register indirect addressing Very effective Operates in three modes Relative addressing Index addressing Base register addressing
Stack addressing
Stack addressing Linear array of locations Pushdown list or Last in First out List Elements are appended to the top of the stack Stack pointer is maintained in a register. the operation performed at the top of the stack