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Logic Gates
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May 18, 2021
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About This Presentation
Every single Logic Gate with their respective information.
Size:
1.43 MB
Language:
en
Added:
May 18, 2021
Slides:
19 pages
Slide Content
Slide 1
Electrónica Digital
Eduardo Emanuel Tovias
Garza
Engineer Aurelio García
Técnico
Mecatrónica Área
Automatización
28th
October2020 -Matamoros,
Tamaulipas
Slide 2
SEPARATOR: Logic
Gates –Datasheets,
Pinout, Operation
Characteristics
Slide 3
74LS04 NOT Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A Y = A’
0 1
1 0
Slide 4
74LS08 AND Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = A x B
0 0 0
1 0 0
0 1 0
1 1 1
Slide 5
74LS32 OR Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = A + B
0 0 0
1 0 1
0 1 1
1 1 1
Slide 6
74LS86 XOR Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = (A + B) x (A’+B’)
0 0 0
1 0 1
0 1 1
1 1 0
Slide 7
74LS00 NAND Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = (A’)(B’)
0 0 1
1 0 1
0 1 1
1 1 0
Slide 8
74LS02 NOR Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = A’+B’
0 0 1
1 0 0
0 1 0
1 1 0
Slide 9
74LS66 XNOR Gate Maximum Rates,
Pinout, Operation Characteristics
Inputs Outputs
A B Y = (A x B) + (A’ x B’)
0 0 1
1 0 0
0 1 0
1 1 1
Slide 10
SEPARATOR:
BREADBOARD
IMPLEMENTATION
Slide 11
Testing logic gates using combination Input
A=0 & Input B=0
Slide 12
Testing logic gates using combination Input
A=0 & Input B=1
Slide 13
Testing logic gates using combination Input
A=1 & Input B=0
Slide 14
Testing logic gates using combination Input
A=1 & Input B=1
Slide 15
SEPARATOR:
PROTEUS SOFTWARE
SIMULATION
Slide 16
Testing logic gates using combination Input
A=0 & Input B=0
Slide 17
Testing logic gates using combination Input
A=0 & Input B=1
Slide 18
Testing logic gates using combination Input
A=1 & Input B=0
Slide 19
Testing logic gates using combination Input
A=1 & Input B=1
Tags
electronics
logic gates
programa
science
engineering
Categories
Science
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