Microprocessor and assambly language programming

Presentation slide

1. Welcome to our presentation

2. Microprocessor and Assembly Language Programming

3. TEAM :Abracadabra 1. Afnanul Hassan # 161-15-7213 2 . Khaled Akram Sany #161-15-7203 3.Shami Al Rahad #161-15-7349 4 . Md. Sohanur Rahman Sakib #161-15-7344 5. Shahadat Hossain # 161-15-7341

4. What is Microcomputer? System Bus Microprocessor ROM RAM input output Memory Element I/O unit

5. The Microprocessor and Its Architecture ALU (Arithmetic and Logic Unit) The Control Unit Registers HDD RAM Cache Memory Microprocessor R1 R1 R3

6. The Programming Model Program visible registers We can access via programs Program invisible registers We can not access via programs

7. Registers 16 bit Segment registers

8. Example Data If AX = 20A2H then AH = 20H, AL = A2H In other words, if AH = 1CH and AL = A2H then AX = 1CA2H 0010 0000 1010 0010 AH AL AX

9. The FLAGS register FLAGS indicate the condition of the MP Also control the operations FLAGS are upward compatible from 8086/8088 to Pentium/Pentium Pro Figure 2.2: The EFLAG and FLAG registers

10. The FLAGs Carry Flag – C C = 1 if there is a carry out from the msb on addition Or, there is a borrow into the msb on subtraction Otherwise C = 0 C flag is also affected by shift and rotate instructions 10101010 11101010 111010100 C = 1, in this case

11. The FLAGs Parity Flag – P P = 1 for even parity, if number contains even number of ones P = 0 for odd parity, if odd number of ones 10101010 10101011 P = 1 P = 0 Even number of ones Odd number of ones Definition changes from microprocessor to microprocessor

12. The FLAGs Zero Flag – Z Z = 1 for zero result Z = 0 for non-zero result Sign Flag – S S = 1 if msb of a result is 1, means negative number S = 0 if msb of a result is 0, means positive number

13. The FLAGs Trap Flag – T Enables trapping through an on-chip debugging feature T = 1 MP interrupts the flow of a program, i.e. debug mode is enabled T = 0 debug mode is disabled Direction Flag – D Selects increment/decrement mode of SI and/or DI registers during string instructions D = 1, decrement mode, STD (set direction) instruction used D = 0, increment mode, CLD (clear direction) instruction used

14. The FLAGs Overflow Flag – O O = 1 if signed overflow occurred O = 0 otherwise Overflow is associated with the fact of range of numbers represented in a computer 8 bit unsigned number range (0 to 255) 8 bit signed number range (-128 to 127) 16 bit unsigned number range (0 to 65535) 16 bit signed number range (-32768 to 32767)

15. Signed vs. Unsigned Overflow Let, AX = FFFFh, BX = 0001h and execute ADD AX, BX 1111 1111 1111 1111 + 0000 0000 0000 0001 1 0000 0000 0000 0000 AX BX Unsigned interpretation Correct answer is 10000h = 65536 But this is out of range. 1 is carried out of msb , AX = 0000h, which is wrong Unsigned overflow occured Signed interpretation FFFFh = -1, 0001h = 1, summation is -1+1 = 0 Singned overflow did not occur

16. How instructions affect the flags? Every time the processor executes a instruction, the flags are altered to reflect the result Let us take the following flags and instructions Sign Flag – S Parity Flag – P Zero Flag – Z Carry Flag – C MOV/XCHG ADD/SUB INC/DEC NEG None All All except C All (C = 1 unless result is 0)

17. Example 1 Let AX = FFFFh, BX = FFFFh and execute ADD AX, BX FFFFh + FFFFh 1 FFFEh The result stored in AX is FFFEh = 1111 1111 1111 1110 S P Z C = 1 because the msb is 1 = 0 because the are 15 of 1 bits, odd parity = 0 because the result is non-zero = 1 because there is a carry out of the msb on addition

18. Example 2 Let AX = 8000h, BX = 0001h and execute SUB AX, BX 8000h - 0001h 7FFFh The result stored in AX is 7FFFh = 0111 1111 1111 1111 S P Z C = 0 because the msb is 0 = 0 because the are 15 of 1 bits, odd parity = 0 because the result is non-zero = 0 because there is no carry

19. Segment Registers 16 bit Segment registers * * * Segment 1 Segment 2 Segment n 0000h CS 8000h DS A000h SS Fig:The programming model of intel 8086 trough the Pentium pro