1
ANALOG CMOS IC DESIGN
MILLER EFFECT
BY
KANCHERLA SAIKIRAN
2
CONTENTS
High Frequency Roll-off of Amplifier
BODE PLOT
Pole Identification
Miller’s Theorem
Examples
3
High Frequency Roll-off of Amplifier
As frequency of operation increases, the gain of amplifier
decreases. This chapter analyzes this problem.
Gain Roll-off: Simple Low-pass Filter
In this simple example, as frequency increases the
impedance of C
1
decreases and the voltage divider consists
of C
1
and R
1
attenuates V
in
to a greater extent at the output.
4
5
Gain Roll-off: Common Source
The capacitive load, C
L
, is the culprit for gain roll-off since
at high frequency, it will “steal” away some signal current
and shunt it to ground.
1
||
out m in D
L
V g V R
C s
æ ö
=- ç ¸
è ø
6
BODE PLOT
When we hit a zero, ω
zj
, the Bode magnitude rises with a
slope of +20dB/dec.
When we hit a pole, ω
pj
, the Bode magnitude falls with a
slope of -20dB/dec
÷
÷
ø
ö
ç
ç
è
æ
+
÷
÷
ø
ö
ç
ç
è
æ
+
÷
÷
ø
ö
ç
ç
è
æ
+
÷
÷
ø
ö
ç
ç
è
æ
+
=
21
21
0
11
11
)(
pp
zz
ss
ss
AsH
ww
ww
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Example: Bode Plot
The circuit only has one pole (no zero) at 1/(R
D
C
L
), so the
slope drops from 0 to -20dB/dec as we pass ω
p1
.
LD
p
CR
1
1=w
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Pole Identification Example I
inS
p
CR
1
1=w
LD
p
CR
1
2
=w
9
Circuit with Floating Capacitor
The pole of a circuit is computed by finding the effective
resistance and capacitance from a node to GROUND.
The circuit above creates a problem since neither terminal
of C
F
is grounded.
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Miller’s Theorem
The Miller’s theorem establishes that in a linear circuit, if there exists a branch
with impedance Z, connecting two nodes with nodal voltages V
1
and V
2
, we can
replace this branch by two branches connecting the corresponding nodes to ground
by impedances respectively Z / (1K) and KZ / (K1).
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If A
v
is the gain from node 1 to 2, then a floating impedance
Z
F
can be converted to two grounded impedances Z
1
and Z
2
.
PROOF
The current flowing from 1 to 2 is given by
V
1
V
2
/Z
F
The current flowing from 1 to ground is
V
1
/Z
1
By equating the both currents
(V
1
V
2
)/Z
F
= V
1
/Z
1
Z
1
= Z
F
/(1(V
2
/V
1
))
Similarly
Z
2
=Z
F
/(1(V
1
/V
2
))
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Miller Multiplication
With Miller’s theorem, we can separate the floating
capacitor. However, the input capacitor is larger than the
original floating capacitor. We call this Miller multiplication.
v
F
A
Z
Z
-
=
1
1
v
F
A
Z
Z
/11
2
-
=
13
Example: Miller Theorem
( )
FDmS
in
CRgR+
=
1
1
w
F
Dm
D
out
C
Rg
R
÷
÷
ø
ö
ç
ç
è
æ
+
=
1
1
1
w