Module 2 HARDWARE SOFTWARE CO-DESIGN AND PROGRAM MODELLING
Module 2 Q.1 . to Q.6. Refer James Peckol Textbook Remaining refer Shibu KV
Hardware Software Co-Design and Program Modelling
Hardware Software Co-Design and Program Modelling
Hardware Software Co design Issues in hardware software co design:( 3 issues) 1.Selecting the model 2.Selecting the architecture 3.Selecting the language.
Hardware Software Co design Selecting the model. Model consist of objects and composition rules. Different model depending on requirements are: DFG model(Data flow graph model) CDFG(control data flow graph) State machine model Sequential program model Concurrent program model Object oriented model
Hardware Software Co design 2.Selecting the architecture: how system implemented in terms of system components. Different architectures based on requirements:( 6 architectures) Controller architecture (FSM model) Data path architecture(DFG model) Finite state machine data path (FSM+DFG model) CISC architecture(complex instructions) VLIW architecture(different functional units) Parallel ar chitecture(different processing elements)
Hardware Software Co design 3.Selecting the language: Language for hardware design:Verilog,System C Language for software design:C,C++
Module-2 COMPUTATIONAL MODELS Data Flow Graph, Control Data Flow Graph, State Machine,. Sequential Model, Concurrent Model, Object oriented model,
Data flow graph model(DAG) Data driven model, focus on data and operations. Operations represented by circle. Dataflow by arrow.
Data flow graph model(DAG) X=a+b and y=x-c;
ii. Control Data flow Graph model(CDFG) Include data processing requirements and conditional program execution. Control(condition or decision maker) If flag=1 x=a+b; Else y=a-b;
ii. Control Data flow Graph model(CDFG) Authentication process of an ATM machine using control data flow graph
ii. Control Data flow Graph model(CDFG) Authentication process of an ATM machine using control data flow graph
ii. Control Data flow Graph model(CDFG) Draw a CDFG for the following program fragment. fun0(); if (cond1) fun1(); else fun2(); fun3(); switch (test1) { case 1 : fun4(); break; case 2: fun5(); break; case 3: fun6(); break; } fun7();
ii. Control Data flow Graph model(CDFG)
iii. Finite State Machine model(FSM) Consist of state and state transition. System behavior consist of : State,Transition, Event, Action. State : Current Situation Event : Input to state Transition : Change from one state to another Action : Activity to be performed by state machine.
iii. Finite State Machine model(FSM)
iii. Finite State Machine model(FSM) Initially alarm OFF and Ignition of engine OFF. Ignition key ON , system enters waiting for 10 seconds for putting seat belt After 10sec(seat belt OFF,ignition ON) Timer starts beeping Beeping exist for 5seconds. After, timer expire Alarm will be off.
Finite State Machine model(FSM) Eg :Automatic Seat Belt Warning
Finite State Machine model(FSM) Eg: Automatic Tea/Cofee vending machine.
Finite State Machine model(FSM) Eg:Coin operated telephone booth
Finite State Machine model(FSM)
Finite State Machine model(FSM)
Finite State Machine model(FSM) .Authentication process of ATM machine using state transition diagram
Finite State Machine model(FSM)
iv. Sequential Program model Model in which requirements are listed in sequence.(flowchart)
iv. Sequential Program model
v. Concurrent Model System is modelled into different tasks. Eg: Seat belt Warning System Timer task waiting 10sec(wait timer task) Task for checking ignition key status Task of checking seat belt status Task for starting and stopping alarm Alarm timer for waiting 5sec
v. Concurrent Model(Seat belt Warning System)
vi.Object Oriented model Describe concept of objects and classes. Class Objects Association and Links
1.Structural things
2.Behavioral things
3,4.Grouping & Annotation Things
Relationships – UML Building block
Diagram- Static Diagram- UML building block
Diagram- Behavioral Diagram- UML building block Use Case Diagram