Nyquiest rate A/D conveters module-4 vasu

Mixed signal processing

1. Introduction to VLSI Circuits and Systems, NCUT 2007
Module-IV
NYQUIST RATE A/D CONVERTERS
Prepared By:
Dr. Vasudeva
Assistant Professor

2. Introduction to VLSI Circuits and Systems, NCUT 2007
Syllabus
D/A-BasedSuccessiveApproximationConverter
Flash/ParallelConverters
IssuesinDesigningFlashA/DConverters
Two-StepA/DConverters
Two-StepConverterwithDigitalErrorCorrection.

3. Introduction to VLSI Circuits and Systems, NCUT 2007
What is a Successive Approximation ADC?
TheSuccessiveApproximationADCis
theADCofchoiceforlowcost
medium tohighresolution
applications,theresolutionforSAR
ADCsrangesfrom8-18bits,with
samplespeedsupto5mega-samples
persecond(Msps).
Also,itcanbeconstructedinasmall
formfactorwithlowpower
consumption,whichiswhythistypeof
ADCisusedforportablebattery-
poweredinstruments.
Asthenameimplies,thisADCappliesabinarysearchalgorithmtoconvertthe
values,whichiswhytheinternalcircuitrymayberunningatseveralMHZbutthe
actualsamplerateismuchlessduetotheSuccessiveApproximationalgorithm.

4. Introduction to VLSI Circuits and Systems, NCUT 2007
Working of Successive Approximation ADC
ThisADCconsistsofacomparator,adigitaltoanalogconverter,andasuccessive
approximationregisteralongwiththecontrolcircuit.
Now,wheneveranewconversationstarts,thesampleandholdcircuitsamplesthe
inputsignal.Andthatsignaliscomparedwiththespecificoutputsignalofthe
DAC.

5. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
Supposeafive-bitSARADC.Ananalogvoltagesignalof19voltsisappliedatthe
input.
Initial Condition
TheoperationstartsbyclearingallthebitsinSAR.Let’ssupposeQistheoutput,
sinceitisa5-bitADC,theoutputwillhavefivebitsfromQ0toQ4.Initially,the
contentsinsuccessiveapproximationregister(SAR)aregivenbelow:
Q = [00000], VDAC= 0V, Vin> VDAC, Vcomp= high

6. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
FirstClockCycle
ThecomparatoroutputisconnectedtoSAR.Asthecomparatoroutputgoeshigh,
thedevicesetstheSAR’smostsignificantbittoonewhileleavingtheotherbitsat
zero.
Q = [10000], VDAC= 16V, Vin< VDAC, Vcomp= low
SecondClockCycle
Again,thesameprocedurewillbefollowed.Thistimethen-1bit(thatis,the4th
bit)issetto1,whileallotherbitsremainunchanged.
Q = [11000], VDAC= 24V, Vin< VDAC, Vcomp= low

7. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
ThirdClockCycle
Inthisclockcycle,then-2bit(thatis,the3rdbit)isset.whilethevalueofthe
previousn-1bitis0.ThevalueofSARinthesecondclockcyclewasQ=
[11000]=24V.
Q = [10100], VDAC= 20V, Vin< VDAC, Vcomp= low
But this value (Q = 10100 or VDAC = 20) is greater than the input voltage.
The approximation is wrong. The output of the comparator goes low.

8. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
FourthClockCycle
Inthisclockcycle,then-3bit(thesecondbit)isset.whilethevalueofthe
previousn-2bitis0.
ThevalueofSARinthethirdclockcyclewasQ=[10100]=20V.Butthisvalue
isgreaterthantheinputvoltage.Again,ntheapproximationiswrong.Then-2bit
goeslowwhilethen-3bitgoeshigh.
Q = [10010], VDAC= 18V, Vin< VDAC, Vcomp= high

9. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
FifthClockCycle
Inthisclockcycle,then-4orLSBbitisset.whiletheotherbitsremain
unchanged.ThevalueofSARinthefourthclockcyclewasQ=[10010]=18V.
Butthisvalueislessthantheinputvoltage.
Thecomparatoroutputgoeshigh.Theleastsignificantbitgoeshigh.
Attheendoftheconversion,theinputoftheDACisequaltotheoutputofthe
DAC.
Q = [10011], VDAC= 19V, End of conversion

10. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
Advantages
HighAccuracy
Lowpowerconsumption
EasytoInterface
Noiseimmunity
Disadvantages
SlowConversionRate
LimitedResolution
Non-linearBehavior
Complexity

11. Introduction to VLSI Circuits and Systems, NCUT 2007
Flash/Parallel Converters
Flashconvertersarethe
standardapproachfor
realizingvery-high-speed
converters.
Theinputsignalinaflash
converterisfedto2
??????
comparatorsinparallel,as
showninFig.
Eachcomparatorisalso
connectedtoadifferentnode
ofaresistorstring.Any
comparatorconnectedtoa
resistorstringnodewhere??????
??????1
islargerthan??????
????????????willhavea1
outputwhilethoseconnected
tonodeswith??????
??????1islessthan
??????
????????????willhave0outputs.

12. Introduction to VLSI Circuits and Systems, NCUT 2007
Flash/Parallel Converters
Suchanoutputcodewordiscommonlyreferredtoasathermometercodesinceit
looksquitesimilartothemercurybarinathermometer.
Notethatthetopandbottomresistorsintheresistorstringhavebeenchosento
createa0.5LSBoffsetinanA/Dconverter.
TheNANDgatethathasa0-inputconnectedtoitsinvertinginputanda1input
connectedtoitsnoninvertinginputdetectsthetransitionofthecomparatoroutputs
from1sto0sandwillhavea0output.
AllotherNAND-gateoutputswillbe1,resultinginsimplerencoding.Italso
allowsforerrordetectionbycheckingformorethanone0output,whichoccurs
duringabubbleerror(seethenextsubsection)and,perhaps,errorcorrection.
FlashA/Dsarefast,butthenumberofcomparatorsgrowsexponentiallywiththe
resolutionN,sotheytypicallytakeupalargeareaandareverypowerhungry,
evenformodestN—especiallywhentheyareclockedfast.

13. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
When∅ishigh,theinverterissettoitsbistableoperatingpoint,whereitsinput
voltageequalsitsoutputvoltage(i.e.,itsthresholdvoltage).
Normallywithanoddnumberofinverters,aringoscillatorisformed;however,in
thecaseofasingleCMOSinverter,theinverteroperatesasasinglestageopamp
withonlyonepole(nonondominantpoles),sostabilityisguaranteed.

14. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
Withthisinvertersettoitsthresholdvoltage,theothersideofCischargedto??????
??????1.
When∅goeslow,theinverterisfreetofalleitherhighorlowdependingonits
inputvoltage.
Atthesametime,theothersideofCispulledtotheinputvoltage??????
????????????
Sincetheinvertersideofthecapacitorisfloating,Cmustkeepitsoriginalcharge,
andthereforetheinverter’sinputwillchangebythevoltagedifferencebetween??????
??????1
&??????
????????????.
Sincetheinverter’sinputwasatitsbistablepoint,thedifferencebetween??????
??????1&
??????
????????????willdeterminewhichdirectiontheinverter’soutputwillfall.
However,itshouldbementionedthatthissimplecomparatorsuffersfrompoor
powersupplyrejection,whichisoftenacriticaldesignspecificationinfast
converters.Usingfullydifferentialinvertershelpsalleviatethisshortcoming.

15. Introduction to VLSI Circuits and Systems, NCUT 2007
Issues in Designing Flash A/D Converters
InputCapacitiveLoading
Thelargenumberofcomparatorsconnectedto??????
????????????resultsinalargeparasiticload
atthenode??????
????????????.Suchalargecapacitiveloadoftenlimitsthespeedoftheflash
converterandusuallyrequiresastrongandpower-hungrybuffertodrive??????
????????????.We
shallseethatthislargecapacitiveloadingcanbereducedbygoingtoan
interpolatingarchitecture.
Resistor-StringBowing
Anyinputcurrentstothecomparatorscauseerrorsinthevoltagesofthenodesof
theresistorstring.Theseerrorsusuallynecessitatethebiascurrentintheresistor
stringbeingtwoordersofmagnitudegreaterthantheinputcurrentsofthe
comparators.Thisisparticularlysignificantifbipolarcomparatorsareused.
Theerrorsaregreatestatthecenternodeoftheresistorstringandthus
considerableimprovementcanbeobtainedbyusingadditionalcircuitrytoforce
thecentertapvoltagetobecorrect.

16. Introduction to VLSI Circuits and Systems, NCUT 2007
Contd…
ComparatorLatch-to-TrackDelay
Anotherconsiderationthatisoftenoverlookedisthetimeittakesacomparator
latchtocomefromlatchmodetotrackmodewhenasmallinputsignalofthe
oppositepolarityfromthepreviousperiodispresent.
Thistimecanbeminimizedbykeepingthetimeconstantsoftheinternalnodesof
thelatchassmallaspossible.Thisissometimesachievedbykeepingthegainof
thelatchessmall,perhapsonlytwotofour.
Inmanycases,thedifferentialinternalnodesmightbeshortedtogethertemporarily
asaresetjustafterlatchtime.
Signaland/orClockDelay
Evenverysmalldifferencesinthearrivalofclockorinputsignalsatthedifferent
comparatorscancauseerrors.Toseethis,considera250-MHz,1-Vpeak-input
sinusoid.Thissignalhasamaximumslopeof1570V/μsatthezerocrossing

17. Introduction to VLSI Circuits and Systems, NCUT 2007
TWO-STEP A/D CONVERTERS
Two-step(orsubranging)convertersareusedforhigh-speedmedium-accuracy
A/Dconverters.
Theyofferseveraladvantagesovertheirflashcounterparts.Specifically,two-step
convertersrequirelesssiliconarea,dissipatelesspower,havelesscapacitive
loading,andthevoltagesthecomparatorsneedtoresolvearelessstringentthanfor
flashequivalents.
Thethroughputoftwo-stepconvertersapproachesthatofflashconverters,
althoughtheydohavealargerlatency.

18. Introduction to VLSI Circuits and Systems, NCUT 2007
TWO-STEP A/D CONVERTERS
Atwo-stepconvertermaybethoughtofasaspecialcaseofapipelinedconverter
withonlytwopipelinestages.
The4-bitMSBA/DdeterminesthefirstfourMSBs.Todeterminetheremaining
LSBs,thequantizationerror(residue)isfoundbyreconvertingthe4-bitdigital
signaltoananalogvalueusingthe4-bitD/Aandsubtractingthatvaluefromthe
inputsignal.
ToeasetherequirementsinthecircuitryforfindingtheremainingLSBs,the
quantizationerrorisfirstmultipliedby16usingthegainamplifier,andtheLSBs
aredeterminedusingthe4-bitLSBA/D.Withthisapproach,ratherthanrequiring
256comparatorsasinan8-bitflashconverter,only32comparatorsarerequired
foratwo-stepA/Dconverter.
However,thisstraightforwardapproachwouldrequireallcomponentstobeatleast
8-bitaccurate.Tosignificantlyeasetheaccuracyrequirementsofthe4-bitMSB
A/Dconverter,digitalerrorcorrectioniscommonlyused.

19. Introduction to VLSI Circuits and Systems, NCUT 2007
TWO-STEP A/D CONVERTERS
Atwo-stepconvertermaybethoughtofasaspecialcaseofapipelinedconverter
withonlytwopipelinestages.
The4-bitMSBA/DdeterminesthefirstfourMSBs.Todeterminetheremaining
LSBs,thequantizationerror(residue)isfoundbyreconvertingthe4-bitdigital
signaltoananalogvalueusingthe4-bitD/Aandsubtractingthatvaluefromthe
inputsignal.
ToeasetherequirementsinthecircuitryforfindingtheremainingLSBs,the
quantizationerrorisfirstmultipliedby16usingthegainamplifier,andtheLSBs
aredeterminedusingthe4-bitLSBA/D.Withthisapproach,ratherthanrequiring
256comparatorsasinan8-bitflashconverter,only32comparatorsarerequired
foratwo-stepA/Dconverter.
However,thisstraightforwardapproachwouldrequireallcomponentstobeatleast
8-bitaccurate.Tosignificantlyeasetheaccuracyrequirementsofthe4-bitMSB
A/Dconverter,digitalerrorcorrectioniscommonlyused.

20. Introduction to VLSI Circuits and Systems, NCUT 2007
Thank You…