Project seminar on 3d ics in electronics and communication engineering

3D ICS

1. 3d ic technology By: VIVEK. BANDI 21X01A0489 E ce-B

2. CONTENTS Introduction   Background  Limitation of 2D IC Performance  3D Architecture Technology used to build 3D ICs Advantages of 3D IC Characteristics Challenges in 3D Circuit Conclusion Key Points

3. Introduction/Definition A three-dimensional Integrated Circuit(3D IC) is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. Fig:Schematic diagram of 3D integrated circuit .

4. Background Integrated circuits were first invented in the 1950, 3D IC chip commercially used first back in 2004, psp 3D ICs was a great mutation to decrease the total area of the Integrated Circuit Improvements on 3D IC technology are expected to dramatically enhance the Performance Functionality Device packaging density for micro-electro-mechanical systems(MEMS) application

5. Limitation of 2D IC Performance Complexity of the chip Design Moore’s Law says that the number of transistors on a microchip will double roughly every year Integrated circuits are hitting hard physical limits Losses within large interconnection

6. 3D Architecture Earliest known architect design of the 3D IC Fabrication Three-dimensional integration to create multilayer

7. Concept for developing 3D IC Three-dimensional integration to create multilayer Si ICs is a concept that can significantly improve interconnect performance, Increase transistor packing density Reduce chip area and power dissipation 3D ICs can be very effective large scale on chip integration of different system. In 3D design architecture, an entire 2D chips is divided into a number of blocks in placed on separate layers of Si stocked on top of eachother. Each Si layer in 3D structure can have multiple layer of interconnects

8. Technology Used to Build 3D ICs The electronic components are built on multiple dies, these dies are aligned and bonded together An advantage is that each component die can be tested first DIE ON DIE

9. Advantages of 3D IC The 3D architecture offers extra flexibility in system design The 3D chip design technology can be exploited to build SoCs by placing circuits with different voltage and performance requirements in different layers 3D integration can be reduce the amount of wiring you use Reducing capacitances Power dissipation Chip area improves performance Less Complex and more cost effective.

10. Characteristics of 3D IC Performance Time Energy

11. Challenges in 3D IC Design challenges Thermal issues TSV induced overheads Cross talk between layers

12. CONCLUSION Over all, 3D integration is a significant development which have a major impact on how future electronic systems are designed and used.

13. References Topol, A. W., Tulpe, L., Shi, L., Frank, D., Bernstein, K., & Young, A. M. IBM Research group (2016, September). Three-Dimensional Integrated Circuit. Retrieved April 4, 2020, from https://signallake.com/innovation/topol.pdf https://www.sciencedirect.com/topics/engineering/three-dimensional-integrated-circuits https://gcn.com/articles/2020/01/06/2d-3d-integrated-circuits.aspx https://www.seminarsonly.com/electronics/3-%20D%20ICs.php https://www.slideshare.net/mufeedulislam/3d-integrated-circuits https://www.eetimes.com/is-3d-ic-the-next-big-profit-driver/#

14. Key Points Design: 3D IC technology allows for design flexibility for innovators. Functionality : Key process technology element being optimized for the 3D IC enables the implementation of design flexibility. Device Packaging density : Active devices can be stacked and size of chip footprint can be reduced which adds dimension to the conventional 2D device layout. Chip Performance : 3D technology enables the memory arrays to be placed above or under logic circuitry, resulting in an increased bandwidth. Wafer-scale fabrication: A wafer-level stacking of 3D ICs potentially enables a more cost-effective solution than the chip-stacking techniques.

15. THANK YOU