Prom

1,825 views 11 slides Apr 18, 2019
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About This Presentation

This Power point present PROM and design


Slide Content

Programmable Read Only Memory
(PROM)
18-Apr-19 1
Syed Hasan Saeed, Integral University,
Lucknow

SYED HASAN SAEED
[email protected]
https://shasansaeed.yolasite.com
18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
2

Programmable Read Only Memory (PROM)
•TheProgrammableReadOnlyMemory(PROM)enablestheuser
toimplementthedigitalcircuits(hardware)toexecutearandom
combinationalfunctionofagivennumberofinputvariables.
•WhenPROMisusedasamemorydevicethen‘n’numberof
addresslinesstore‘m’bitofdatawordeach.Totalmemorysizeis
2
n
*mbits.
•WhenPROMisusedasProgrammableLogicDevice(PLD)then
PROMcanbeusedforimplementingthefunctionsof‘n’variables
toexecutein‘m’numberofways.
•Thegeneraldevicehas2
n
hard-wiredANDgatesatinputand‘m’
numberofprogrammableORgatesatoutput.EachANDgatehas
‘n’inputsandeachORgatehas2
n
inputs.
18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
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•For a given number of input variables, AND gates creates all conceivable
minterms and programmable OR gates permits only desired minterms to
appear at their inputs.
•Fig. 1 shows two input lines, four hard-wired AND gates and two
programmable OR gates. A cross ( ) indicates the unprogrammed
fusible link and dot ( ) indicates hard-wired connections.
18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
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Fig. 1
hard-wired connection
intact fusible linkAND
Gates
OR gates
TWO
OUTPUTS
TWO
INPUTS
A B

PROGRAMMABLE ROMs AS PROGRAMMABLE LOGIC DEVICE:
•Now consider PROM as a programmable logic device for implementing the
combinational logic functions.
•PROM has ‘n’ inputs and ‘m’ output lines.
•It is combinational circuit which has AND gates at input and equivalent to
decoder and OR gates equal to the number of outputs.
•Consider the following Boolean functions
F
1(A,B,C) = ∑ (0,1,3)
F
2(A,B,C) = ∑ (2,4,6)
•Fig. 2 shows the architecture of 8 x 2 PROM. At input side hard-wired AND
gates creates all possible 8 minterms (product terms) for three variables. All
minterms are accessible at the inputs of each OR gates through
programmable interconnections.
•An unprogrammed interconnection is shown by (cross ) is a ‘make’
connection.
•Generally PROM is used for complex Boolean functions.
18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
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8 X 2 PROM:
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Syed Hasan Saeed, Integral University,
Lucknow
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A CB
F
1
F
2
F
1(A,B,C) = ∑ (0,1,3)
F
2(A,B,C) = ∑ (2,4,6)
Fig. 2
3 X 8
DECODER

EXAMPLE: Design a combinational circuit using PROM to convert
gray code into binary code.
SOLUTION:
STEP 1: Truth Table for Grey to Binary code
18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
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GRAY INPUT
BINARY OUTPUT
(Y)
G2 G1 G0 B2 B1 B0
0 0 0 0 0 0
0 0 1 0 0 1
0 1 1 0 1 0
0 1 0 0 1 1
1 1 0 1 0 0
1 1 1 1 0 1
1 0 1 1 1 0
1 0 0 1 1 1

18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
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Step 2: Simplification by using K-map:
0 0 0 0
1 1 1 1
0 0 1 1
1 1 0 0
0 1 0 1
1 0 1 0
00 01 11 10
00 01 11 10
00 01 11 10
0
0
0
1
1
1
G2 G1 G0
G2 G1 G0
G2 G1 G0-(1)----- G B
22 -(2)----- G G G G B
12121  (3)-----GGGGGG B 0120120 

STEP 3:
•No. of inputs = 3
•No. of address lines (locations) = 2
3
= 8
•Each location can store 4 bit words
•No. of outputs = 4 ( B
3, B
2, B
1, B
0)
ROM Programming Table: (with the help of Eq. 1, 2 and 3)
18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
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Location
No.
Inputs Outputs
G
2 G
1 G
0 B
3 B
2 B
1 B
0
0 0 0 0 0 0 0 0
1 0 0 1 0 0 0 1
2 0 1 0 0 0 1 1
3 0 1 1 0 0 1 0
4 1 0 0 0 1 1 1
5 1 0 1 0 1 1 0
6 1 1 0 0 1 0 0
7 1 1 1 0 1 0 1

18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
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0
1
2
3
4
5
6
7
3 * 8 DECODER
G
2
G
1
G
0
B
3 B
2 B
1 B
0
FIG 3: LOGIC
DIAGRAM Binary Output
Gray
Input
0000
0001
0011
0010
0111
0110
0100
0101

THANK YOU
18-Apr-19
Syed Hasan Saeed, Integral University,
Lucknow
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