Quantum Cellular Automata design presentation slides
DrganeshNarasimhan1
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136 slides
Jun 25, 2024
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About This Presentation
qca presentation
Slide Content
Quantum Cellular automata Circuits
-Design,Modelling and Simulation.
-E.N.Ganesh
Jawaharlal Nehru Technological University
Hyderabad
Dr.M.J.S.Rangachar Dr.K.Lal Kishore
Supervisor Co-Supervisor
-Design,Modelling and Simulation.
-E.N.Ganesh
Jawaharlal Nehru Technological University
Hyderabad
Dr.M.J.S.Rangachar Dr.K.Lal Kishore
Supervisor Co-Supervisor
Organization of Presentation
1. Design
1.1 Majority Voting Logical Reduction Technique
1.2 Tile Based Design –Partially Popularized QCA Cells
1.3 Gate Based Design –Complex Gate Structures
.
2. Modeling–Single cell –Time Independent Schrödinger Equation using
Hermite Polynomial–Polarization of single cell
2.1 Statistical Quantum Mechanical Treatment method –Polarization of
neighbor QCA Cell.
3. Modeling–Computational Intelligence –Genetic Algorithm and Hopfield
Neural network–Stability, Device Parameters and Polarization
1. Design
1.1 Majority Voting Logical Reduction Technique
1.2 Tile Based Design –Partially Popularized QCA Cells
1.3 Gate Based Design –Complex Gate Structures
.
2. Modeling–Single cell –Time Independent Schrödinger Equation using
Hermite Polynomial–Polarization of single cell
2.1 Statistical Quantum Mechanical Treatment method –Polarization of
neighbor QCA Cell.
3. Modeling–Computational Intelligence –Genetic Algorithm and Hopfield
Neural network–Stability, Device Parameters and Polarization
4. Probabilistic Modeling–Bayesian Networks –Polarization of
Output QCA cell in QCA circuit
(Inference Algorithms)
5.Reliability Analysis and Fault Tolerance
6. Simulation of Combinational and Sequential QCA Circuits.
7. Energy Flow and Power Dissipation in QCA Circuits.
8. Applications –FPGA , ASIC and Quantum Gates
9. Comparison of QCA Technology with CMOS Technology
10. Conclusion.
Output QCA cell in QCA circuit
(Inference Algorithms)
5.Reliability Analysis and Fault Tolerance
6. Simulation of Combinational and Sequential QCA Circuits.
7. Energy Flow and Power Dissipation in QCA Circuits.
8. Applications –FPGA , ASIC and Quantum Gates
9. Comparison of QCA Technology with CMOS Technology
10. Conclusion.
Introduction -QCA –The Four Dot Device
• Uses electrons in cells to store and transmit
Data [1][3]
•Electrons move between different positions via
electron tunneling
• Logic functions performed by Columbic
interactions [5] [6]
• Uses electrons in cells to store and transmit
Data [1][3]
•Electrons move between different positions via
electron tunneling
• Logic functions performed by Columbic
interactions [5] [6]
Quantum Cellular Automata: A four-dot model
• Basic cell: four quantum dots connected by tunnel junctions
-Can control voltage of tunnel junctions to freeze state of device
• Allows clocking
• Add two excess electrons to cell to contain state
–Repulsion between electrons will push them to
opposite corners–One configuration indicates 0, the other 1
• Capacitatively -coupled gates allow electrons to be forced into one
configuration or the other
• Capacitatively -coupled electrometers allow position of electrons, and
thus bit state, to be read
• Basic cell: four quantum dots connected by tunnel junctions
-Can control voltage of tunnel junctions to freeze state of device
• Allows clocking
• Add two excess electrons to cell to contain state
–Repulsion between electrons will push them to
opposite corners–One configuration indicates 0, the other 1
• Capacitatively -coupled gates allow electrons to be forced into one
configuration or the other
• Capacitatively -coupled electrometers allow position of electrons, and
thus bit state, to be read
Quantum Dot Majority Gate
[1],[3]
Computation
1. Majority voting scheme [2][6][7]
Input
abc
Output
y
000 0
001 0
010 0
011 1
100 0
101 1
110 1
111 1
Output, y = m(a,b,c)
1. Majority voting scheme [2][6][7]
Input
abc
Output
y
000 0
001 0
010 0
011 1
100 0
101 1
110 1
111 1
Output, y = m(a,b,c)
QCA Clocking
1. Synchronization of information flow in QCA
2. Power to run the circuit
3.Control the potential barrier between the dots at the rate
at which electrons are able to Quantum mechanically
tunnel between the dots and leads to polarization of cell.[4][5]
4. When clock is high cell –unlatched, clock low , cell –
latched
5. Setup, switch, hold, relax or release phase [9][10]
1. Synchronization of information flow in QCA
2. Power to run the circuit
3.Control the potential barrier between the dots at the rate
at which electrons are able to Quantum mechanically
tunnel between the dots and leads to polarization of cell.[4][5]
4. When clock is high cell –unlatched, clock low , cell –
latched
5. Setup, switch, hold, relax or release phase [9][10]
A
B
-1(0)
A.B (m (A, B, -1))
C
B
A
C
-1(0)
-1(0)
C.B (m (C, B, -1))
A.C (m (A, C, -1))
CA = A.B + B.C + C.A –MV SCHEME
= m(A,B,-1) + m(B,C,-1) +m(C,A,-1)
= [m(m(A,B,-1), m(B,C,-1), +1)] + m(C,A,-1)
= [m(m(A,B,-1), m(B,C,-1),+1), m(A,C,-1),+1]
CA = A.B + B.C + C.A –MVLRS
= m(A,B,C)
Majority Computation
B
-1(0)
A.B (m (A, B, -1))
C
B
A
C
-1(0)
-1(0)
C.B (m (C, B, -1))
A.C (m (A, C, -1))
CA = A.B + B.C + C.A –MV SCHEME
= m(A,B,-1) + m(B,C,-1) +m(C,A,-1)
= [m(m(A,B,-1), m(B,C,-1), +1)] + m(C,A,-1)
= [m(m(A,B,-1), m(B,C,-1),+1), m(A,C,-1),+1]
CA = A.B + B.C + C.A –MVLRS
= m(A,B,C)
Majority Computation
CA = A.B + B.C + C.A
= m(A,B,-1) + m(B,C,-1) +m(C,A,-1)
= [m(m(A,B,-1), m(B,C,-1), +1)] + m(C,A,-1)
= [m(m(A,B,-1), m(B,C,-1),+1), m(A,C,-1),+1]
_ _ _ _ _ _
SUM = A.B.Cin + A.B.Cin + A.B.Cin + A.B.Cin
_ _ _ _ _ _ _ _
=m(A,B,C) .Cin + m(A,B,Cin). Cin + m(A,B,Cin) .m(A,B,Cin)
QCA adder
= m(A,B,-1) + m(B,C,-1) +m(C,A,-1)
= [m(m(A,B,-1), m(B,C,-1), +1)] + m(C,A,-1)
= [m(m(A,B,-1), m(B,C,-1),+1), m(A,C,-1),+1]
_ _ _ _ _ _
SUM = A.B.Cin + A.B.Cin + A.B.Cin + A.B.Cin
_ _ _ _ _ _ _ _
=m(A,B,C) .Cin + m(A,B,Cin). Cin + m(A,B,Cin) .m(A,B,Cin)
QCA adder
1. F = x.y + x’z + yz
F = m(m(m(x,y,-1), m(x’,z,-1),1),m(y,z,-1)) -MVS –5 Majority
gates [18]20]
-----consensus law
F = xy +x’z + yz (x + x’)
= xy + x’z
F = m(m(x,y,-1), m(x’,z,-1),1) -MVLRS -3 Majority gates
2. F = ABC + A’B + BC +A’BC + AC
F = A’B + BC (A + A’) + BC +AC
= A’B + BC + AC ----5 Majority gates
= ( A’ + C) ( A + B) -----consensus law
F= m(m(a’,c,1),m(a,b,1),-1) -MVLRS –3 Majority gates
MAJORITY VOTING LOGIC REDUCTION SCHEME
F = m(m(m(x,y,-1), m(x’,z,-1),1),m(y,z,-1)) -MVS –5 Majority
gates [18]20]
-----consensus law
F = xy +x’z + yz (x + x’)
= xy + x’z
F = m(m(x,y,-1), m(x’,z,-1),1) -MVLRS -3 Majority gates
2. F = ABC + A’B + BC +A’BC + AC
F = A’B + BC (A + A’) + BC +AC
= A’B + BC + AC ----5 Majority gates
= ( A’ + C) ( A + B) -----consensus law
F= m(m(a’,c,1),m(a,b,1),-1) -MVLRS –3 Majority gates
MAJORITY VOTING LOGIC REDUCTION SCHEME
A’BCM(M(a’,b,
1),M(b,c,1
),-1)
M(a’,b,-
1) = x
M(b,c,-1)
= y
M(a,c,-1)
= p
M(x,y,1)
= z
M(p,z,1)
=q
1000 0 0 0 0 0
1010 0 0 0 0 0
1101 1 0 0 1 1
1111 1 1 0 1 1
0000 0 0 0 0 0
0011 0 0 1 0 1
0100 0 0 0 0 0
0111 0 1 1 1 1
1),M(b,c,1
),-1)
M(a’,b,-
1) = x
M(b,c,-1)
= y
M(a,c,-1)
= p
M(x,y,1)
= z
M(p,z,1)
=q
1000 0 0 0 0 0
1010 0 0 0 0 0
1101 1 0 0 1 1
1111 1 1 0 1 1
0000 0 0 0 0 0
0011 0 0 1 0 1
0100 0 0 0 0 0
0111 0 1 1 1 1
0.26 m
2
, 272 cells
0.13 m2, 167 cells
36 % Optimization ( No of cells), 50 %in Area
reduction, 2 Majority gates reduced
2
, 272 cells
0.13 m2, 167 cells
36 % Optimization ( No of cells), 50 %in Area
reduction, 2 Majority gates reduced
Design of QCA circuits
1. Setting up clock zones to the circuit –symmetrical
response, Equal partitioning
2. Mathematical expression –Majority voting scheme
3.Construct the circuit according to the MV scheme
4. Simulation
1. Coherence vector formalism
2. Bistable approximation
3.Digital logic simulation
5. Simulation parameters
1. Setting up clock zones to the circuit –symmetrical
response, Equal partitioning
2. Mathematical expression –Majority voting scheme
3.Construct the circuit according to the MV scheme
4. Simulation
1. Coherence vector formalism
2. Bistable approximation
3.Digital logic simulation
5. Simulation parameters
S.NO PARAMETERSFORSIMULATION VALUE
1 Noofsamplestaken 12,800
2 Methodforsimulation Bi-stableapproximation
3 Radiusofeffect 65nm
4 Relativepermittivity 12.9
5 ClockHigh 9.8x10
-23
6 ClockLow 3.8x10
-22
7 Clockamplitudefactor 2
8 Layerseparation 11.5nm
9 Maximumseparationpersample 100
10 NoofcellsusedPermodule 144
11 Areainmicrometer 0.15μm
2
12 Totalsimulationtime 6.5s(ns)
13 Noofinputs 3(a,b,c)
14 Noofoutputs 2
15 NoofMajoritygates 3majoritygates
16 Clockatwhichoutputisactivated Clock0
17 Temperatureatwhichsimulationperformed 7K
1 Noofsamplestaken 12,800
2 Methodforsimulation Bi-stableapproximation
3 Radiusofeffect 65nm
4 Relativepermittivity 12.9
5 ClockHigh 9.8x10
-23
6 ClockLow 3.8x10
-22
7 Clockamplitudefactor 2
8 Layerseparation 11.5nm
9 Maximumseparationpersample 100
10 NoofcellsusedPermodule 144
11 Areainmicrometer 0.15μm
2
12 Totalsimulationtime 6.5s(ns)
13 Noofinputs 3(a,b,c)
14 Noofoutputs 2
15 NoofMajoritygates 3majoritygates
16 Clockatwhichoutputisactivated Clock0
17 Temperatureatwhichsimulationperformed 7K
0.15 m
2
, 4 s (ns)
Carry = m(a,b,c)
0.25 m
2
, 6.5 s = 6.5s (ns)
Carry = [m(m(A,B,-1), m(B,C,-1),+1), m(A,C,-1),+1]
2
, 4 s (ns)
Carry = m(a,b,c)
0.25 m
2
, 6.5 s = 6.5s (ns)
Carry = [m(m(A,B,-1), m(B,C,-1),+1), m(A,C,-1),+1]
Full adder -192 cells [2]
8 ns –response time
Full adder –MVLRS –144 cells
6.5 ns response time, 0.2 m
2
No of QCA cells are optimized but the polarization of output cell is
0.7 –0.88
8 ns –response time
Full adder –MVLRS –144 cells
6.5 ns response time, 0.2 m
2
No of QCA cells are optimized but the polarization of output cell is
0.7 –0.88
Tile based Block QCA circuit design
1.Tile based design in QCA technology gives flexibility in the generation of logic
function at higher polarization level.
2. Routing of signal between the tiles should be made easy so that output cell
can be brought to fully polarized state.
3.The nanolithography drawbacks in manufacturing QCA circuit can be rectified
using tile based modular QCA design.
4.Each cell in QCA circuit has size of 20nm, and the area is in nanometer
square, whereas in tile based design the QCA cells are bunched into blocks
and selected cells are populated and signals can be routed to the target cell by
easily achieving the desired logic function and area is in micrometer square.
5.Tile based QCA circuit design requires stable signals, so that no undermined
Value due to leak of polarization is present at the output [21]
1.Tile based design in QCA technology gives flexibility in the generation of logic
function at higher polarization level.
2. Routing of signal between the tiles should be made easy so that output cell
can be brought to fully polarized state.
3.The nanolithography drawbacks in manufacturing QCA circuit can be rectified
using tile based modular QCA design.
4.Each cell in QCA circuit has size of 20nm, and the area is in nanometer
square, whereas in tile based design the QCA cells are bunched into blocks
and selected cells are populated and signals can be routed to the target cell by
easily achieving the desired logic function and area is in micrometer square.
5.Tile based QCA circuit design requires stable signals, so that no undermined
Value due to leak of polarization is present at the output [21]
6.The proposed design makes easy routing between input and target
(output) cells, thereby populating only the cells which are in the path of
routing and increases the routing speed.
7.The remaining cells which are not part in routing and gate functioning
are discarded.
QCA A-Star Search Algorithm
3 X 3 Tile block of QCA Cells
5 X 5 Tile Block QCA Cells [21] [22]
(output) cells, thereby populating only the cells which are in the path of
routing and increases the routing speed.
7.The remaining cells which are not part in routing and gate functioning
are discarded.
QCA A-Star Search Algorithm
3 X 3 Tile block of QCA Cells
5 X 5 Tile Block QCA Cells [21] [22]
1. The algorithm will find the target
output cell location and route the input
signal towards the output cell location
2. Let (1,2),(2,2) and(3,2) be the
obstructed cells or non –populated cells
Communication between 1,1 to 1,4 is to
find a path such that the path runs
through the center of a cell and reaches
destination
3. It evaluates cells (henceforth called a
node) by combining h(n), the distance
(cost ) to that node and g(n), the
distance (cost) from that node to the
goal node.
4.The total cost ‘f (n) = g (n) +h (n)’ is
calculated for each successor node and
the node with the smallest cost f (n) is
selected as a successor
QCA A-Star Search Algorithm
output cell location and route the input
signal towards the output cell location
2. Let (1,2),(2,2) and(3,2) be the
obstructed cells or non –populated cells
Communication between 1,1 to 1,4 is to
find a path such that the path runs
through the center of a cell and reaches
destination
3. It evaluates cells (henceforth called a
node) by combining h(n), the distance
(cost ) to that node and g(n), the
distance (cost) from that node to the
goal node.
4.The total cost ‘f (n) = g (n) +h (n)’ is
calculated for each successor node and
the node with the smallest cost f (n) is
selected as a successor
QCA A-Star Search Algorithm
1.StartfromInputtoQCAcelland
calculatecostfunctionf(n){h(n)
=0,g(n)–distancebetween
startcellandoutputcell}.
2.Movetothenextcell,find
successorandsmallestcost
functionofthatQCAcell.
3.Ifnistheoutputcellthen
terminatethealgorithmand
obtainthesolutionpath.
4.Determineallthesuccessorcells,
tillsearchreachesoutputcell
andcomputethecostfunction
foreachsuccessor.
5.Updatethecostfunctiontillthe
terminationconditionisachieved
(Deadend)
f(n) = h(n) + g(n)
calculatecostfunctionf(n){h(n)
=0,g(n)–distancebetween
startcellandoutputcell}.
2.Movetothenextcell,find
successorandsmallestcost
functionofthatQCAcell.
3.Ifnistheoutputcellthen
terminatethealgorithmand
obtainthesolutionpath.
4.Determineallthesuccessorcells,
tillsearchreachesoutputcell
andcomputethecostfunction
foreachsuccessor.
5.Updatethecostfunctiontillthe
terminationconditionisachieved
(Deadend)
f(n) = h(n) + g(n)
1.BreadthFirstSearchAlgorithmforclockzone
assignment[25]
1.LetZbethenoofInputsinaQCAcircuit,settimetagas-Zandalso
minimumoftwoorthreecellinputperclockingzone.
2.X=Listof(Z)andCLK=CLK(z)
3.TimeasT=Count++;NeighborcelldenotedasNe(X)
4.YistheQCAcellnexttoInputX,SetT(Y)=-1;
5.AfterassigningYinthelistofZ,ListvaluebeList(Z,Y)
6.T(Y)=-2
7.IftheYbetheoutputcellstoptheprocessofassigningclockzone
8.Repeat3to6fordifferentcells.
9.Repeat1to7fordifferentpath.
assignment[25]
1.LetZbethenoofInputsinaQCAcircuit,settimetagas-Zandalso
minimumoftwoorthreecellinputperclockingzone.
2.X=Listof(Z)andCLK=CLK(z)
3.TimeasT=Count++;NeighborcelldenotedasNe(X)
4.YistheQCAcellnexttoInputX,SetT(Y)=-1;
5.AfterassigningYinthelistofZ,ListvaluebeList(Z,Y)
6.T(Y)=-2
7.IftheYbetheoutputcellstoptheprocessofassigningclockzone
8.Repeat3to6fordifferentcells.
9.Repeat1to7fordifferentpath.
S.NOPARAMETERS FOR SIMULATION VALUE
1 No of samples taken 12,800
2 Method for simulation Coherence vector
simulation
3 Radius of effect 65 nm
4 Relative permittivity 12.9
5 Clock High 9.8 x 10-23
6 Clock Low 3.8 x 10-22
7 Clock amplitude factor 2
8 Layer separation 11.5nm
10 No of cells used Per module N (Ex-100 cells)
11 Area in micro meter A μm
2
(250 μm
2
)
12 Total simulation time t s (ns) [ 20 ns]
13 No of inputs A,B,C -Three
14 No of outputs Y -One
15 No of Majority gates M [ two ]
16 Clock at which output is activated Clock 0-Clock 3.
17Temperature T K [ 1K ]
1 No of samples taken 12,800
2 Method for simulation Coherence vector
simulation
3 Radius of effect 65 nm
4 Relative permittivity 12.9
5 Clock High 9.8 x 10-23
6 Clock Low 3.8 x 10-22
7 Clock amplitude factor 2
8 Layer separation 11.5nm
10 No of cells used Per module N (Ex-100 cells)
11 Area in micro meter A μm
2
(250 μm
2
)
12 Total simulation time t s (ns) [ 20 ns]
13 No of inputs A,B,C -Three
14 No of outputs Y -One
15 No of Majority gates M [ two ]
16 Clock at which output is activated Clock 0-Clock 3.
17Temperature T K [ 1K ]
F1 = A
F2 = ACD + BDE + AB + ACE + BC
F3 = BDE + ABD + DE + ACE + CD
F4 = BCE + ABD + BC + ACE +CD
F5 = E
F2 = ACD + BDE + AB + ACE + BC
F3 = BDE + ABD + DE + ACE + CD
F4 = BCE + ABD + BC + ACE +CD
F5 = E
Tile based QCA Multiplexer
Simulated Waveform of Tile based QCA MUX
Tile based QCA Decoder
Simulated Waveform QCA Decoder
Design of QCA Circuit using Single Gate Structure
e f g Y
Output function
0 0 0 abcd
0 0 1 ab(c+d)
0 1 0 ab +cd
0 1 1 ab + (c+d)
1 0 0 (a+b) cd
1 0 1 (a+b) ( c+d)
1 1 0 (a+b) + cd
1 1 1 a + b + c + d
baC1Y1C2Y3
outp
ut
Y2C3b’a’
0 1 X-
nor
0
0000 1 1 1 011
0100 1 0 0 010
1000 1 0 0 001
1101 1 1 0 000
1 0 X-or 1
0010 0 0 1 111
0111 0 1 1 110
1011 0 1 1 101
1111 0 0 0 100
AND
0000 1 0 0 000
0100 1 0 0 000
1000 1 0 0 000
1101 1 1 0 000
Summary
1. Optimized no of cells using
MVLRS
2. Tile based Block Design –Full
polarization
3.Single gate structure based
design
Output function
0 0 0 abcd
0 0 1 ab(c+d)
0 1 0 ab +cd
0 1 1 ab + (c+d)
1 0 0 (a+b) cd
1 0 1 (a+b) ( c+d)
1 1 0 (a+b) + cd
1 1 1 a + b + c + d
baC1Y1C2Y3
outp
ut
Y2C3b’a’
0 1 X-
nor
0
0000 1 1 1 011
0100 1 0 0 010
1000 1 0 0 001
1101 1 1 0 000
1 0 X-or 1
0010 0 0 1 111
0111 0 1 1 110
1011 0 1 1 101
1111 0 0 0 100
AND
0000 1 0 0 000
0100 1 0 0 000
1000 1 0 0 000
1101 1 1 0 000
Summary
1. Optimized no of cells using
MVLRS
2. Tile based Block Design –Full
polarization
3.Single gate structure based
design
1.TimeindependentSchrödingerwaveequationissolvedtofindthestabilityof
theelectronpolarizationandcorrespondingenergyvaluesfromitsEigenstates
andEigenvectors.[28]
2.Bhanja[24][25]modeledQCAcircuitsbyusingprobabilisticmethodand
BayesianmethodofcomputingandfindingtheexactpolarizationofQCAcell.
3.ItisProposedhereanalternativemethodofsolvingSchrödingerequationis
carriedoutusinghermitepolynomials[26]tofindthepolarizationofelectrons
inQCAcell.
4.Themethodofstatisticalquantummechanicaltreatmentmethodisproposed
tofindtheexpectedpolarizationofneighborhoodcell,giventhepolarization
ofparentcell
Modeling of QCA Cell
theelectronpolarizationandcorrespondingenergyvaluesfromitsEigenstates
andEigenvectors.[28]
2.Bhanja[24][25]modeledQCAcircuitsbyusingprobabilisticmethodand
BayesianmethodofcomputingandfindingtheexactpolarizationofQCAcell.
3.ItisProposedhereanalternativemethodofsolvingSchrödingerequationis
carriedoutusinghermitepolynomials[26]tofindthepolarizationofelectrons
inQCAcell.
4.Themethodofstatisticalquantummechanicaltreatmentmethodisproposed
tofindtheexpectedpolarizationofneighborhoodcell,giventhepolarization
ofparentcell
Modeling of QCA Cell
||
ii
H Ei
2 2 2
2 2 2
( ) 8 8
( ) ( ) ( )
dx
mE x mv x x
x h h
Time Independent Schrödinger Equation2
/2
()ey
H –Hamiltonian, Ei –Eigen Value
-Eigen State
,= X22
22
22
88
''( ) 2 '( ) ( ) ( ) ( ) ) ( )y y y mv y m y
hh
ii
H Ei
2 2 2
2 2 2
( ) 8 8
( ) ( ) ( )
dx
mE x mv x x
x h h
Time Independent Schrödinger Equation2
/2
()ey
H –Hamiltonian, Ei –Eigen Value
-Eigen State
,= X22
22
22
88
''( ) 2 '( ) ( ) ( ) ( ) ) ( )y y y mv y m y
hh
1.Thesetofpolynomials,namedtheHermitepolynomialswhich
isaseriesofpolynomialsdefinedforeachquantumnumber‘n’,
thewavefunctionsforQCAcellhasGaussianformwhichallows
themtosatisfythenecessaryboundaryconditionsatinfinity.
2.Inthewavefunctionassociatedwithagivenvalueofthe
quantumnumber‘n’,theGaussianismultipliedbyapolynomialof
order‘n’(theHermitepolynomialsabove)andtheconstants
necessarytonormalizethewavefunctionsthatcanbeusedto
solvetimeindependentSchrödingerwaveequation
3.ElectronsconfinedinapotentialwellinaQCAcellhastendency
ofoscillatoryinnatureandusinghermitepolynomialitisfound
thatthepolarizationandenergyvaluesdependsonthe
correspondingquantumstates
Hermite Polynomials
isaseriesofpolynomialsdefinedforeachquantumnumber‘n’,
thewavefunctionsforQCAcellhasGaussianformwhichallows
themtosatisfythenecessaryboundaryconditionsatinfinity.
2.Inthewavefunctionassociatedwithagivenvalueofthe
quantumnumber‘n’,theGaussianismultipliedbyapolynomialof
order‘n’(theHermitepolynomialsabove)andtheconstants
necessarytonormalizethewavefunctionsthatcanbeusedto
solvetimeindependentSchrödingerwaveequation
3.ElectronsconfinedinapotentialwellinaQCAcellhastendency
ofoscillatoryinnatureandusinghermitepolynomialitisfound
thatthepolarizationandenergyvaluesdependsonthe
correspondingquantumstates
Hermite Polynomials
1
0
( ) ( )
N
N n n
n
yc
Hermite Polynomial!
1
( ) ( )
2
nn
n
H
n
Normalized Hermite Polynomial11
( ) 2 ( ) 2 ( )
n n n
H H nH
11
1
( ) ( ) ( )
22
n n n
nn
Even Property of Hermite
Polynomial
Approximate
Solutions of the Equation( ( ) ( ( ) ) ( )
T
f y f X C t !
0
()
k
k
ff
k
0
( ) ( )
N
N n n
n
yc
Hermite Polynomial!
1
( ) ( )
2
nn
n
H
n
Normalized Hermite Polynomial11
( ) 2 ( ) 2 ( )
n n n
H H nH
11
1
( ) ( ) ( )
22
n n n
nn
Even Property of Hermite
Polynomial
Approximate
Solutions of the Equation( ( ) ( ( ) ) ( )
T
f y f X C t !
0
()
k
k
ff
k
D = X
-m( ) ( )
Tdy
Dc t
d
2
2
2
( ) ( )
Tdy
D c t
d
22
[ 2 ( ) ]
N
D XD X v x I C C AC C
C –Eigen state, -Eigen
Value, A -Hamiltonian
1.Initiallynumberofgridpointsaregiven;weights
arecalculatedusingGaussianhermitequadrature
2.ThematrixAandDrepresentsthestatesofQCA
cell.Candisusedtofindenergycorrespondsto
polarizationoftwostateQCAcell
3.Thematlabpackageiswrittenforn=2ofhermite
grid(2X1Matrix)and‘w’betheweight
correspondingto‘n’as(1X2Matrix).
4.Thepotential‘V’(tanhX)isapplied,MatrixAand
Darefound'
2
'
2
k
j
k
E
P
H
E
P
Hamiltonian
Equation
-m( ) ( )
Tdy
Dc t
d
2
2
2
( ) ( )
Tdy
D c t
d
22
[ 2 ( ) ]
N
D XD X v x I C C AC C
C –Eigen state, -Eigen
Value, A -Hamiltonian
1.Initiallynumberofgridpointsaregiven;weights
arecalculatedusingGaussianhermitequadrature
2.ThematrixAandDrepresentsthestatesofQCA
cell.Candisusedtofindenergycorrespondsto
polarizationoftwostateQCAcell
3.Thematlabpackageiswrittenforn=2ofhermite
grid(2X1Matrix)and‘w’betheweight
correspondingto‘n’as(1X2Matrix).
4.Thepotential‘V’(tanhX)isapplied,MatrixAand
Darefound'
2
'
2
k
j
k
E
P
H
E
P
Hamiltonian
Equation
Results0.5 0.5433
0.5433 0.5
0.36 0
0 2.6
A
L
A –Hermite Matrix
L –Columbic energy between
electrons in Mill eV
Psi –Polarization value of QCA
Cell
L, V –Kink Energy and Tunneling
Energy Can be found.0.9692 0.2463
0.2463 0.9692
0 0.543
0.543 0
Psi
V
1.QCAcellsinacircuitisconfinedwithelectrons
andbygivingclockingenergyexternallythe
polarizationvalueofinputsreflectschangesin
polarizationvaluesofitsneighboringcells.
2.Themainaimistofindthepolarizationvalue
ofanoutputcellinaQCAcircuit.
3.IfenergyandthepolarizationvaluesofInput
QCAcellisknownbythehermitepolynomial
methodthenthepolarizationvalueof
neighborhoodcellcanbefoundbystatistical
Quantummechanicaltreatmentmethod
0.5433 0.5
0.36 0
0 2.6
A
L
A –Hermite Matrix
L –Columbic energy between
electrons in Mill eV
Psi –Polarization value of QCA
Cell
L, V –Kink Energy and Tunneling
Energy Can be found.0.9692 0.2463
0.2463 0.9692
0 0.543
0.543 0
Psi
V
1.QCAcellsinacircuitisconfinedwithelectrons
andbygivingclockingenergyexternallythe
polarizationvalueofinputsreflectschangesin
polarizationvaluesofitsneighboringcells.
2.Themainaimistofindthepolarizationvalue
ofanoutputcellinaQCAcircuit.
3.IfenergyandthepolarizationvaluesofInput
QCAcellisknownbythehermitepolynomial
methodthenthepolarizationvalueof
neighborhoodcellcanbefoundbystatistical
Quantummechanicaltreatmentmethod
Statistical Quantum Mechanical Treatment Method
d –Inter dot
distance
L –Cell to Cell length [31]11
( ) ( )
11
1
( ( 1) ( 1) )
PP
NN
E i E i
ss
kT kT
N
ii
P e e
G
Polarization of QCA Cell ranging between +1 to -11
1, 2
1 1 2 1
( ) ( )
NN
xx
x x x
E i E i
()
1
EiS
kT
i
Ge
G –Geometric
Factor
d –Inter dot
distance
L –Cell to Cell length [31]11
( ) ( )
11
1
( ( 1) ( 1) )
PP
NN
E i E i
ss
kT kT
N
ii
P e e
G
Polarization of QCA Cell ranging between +1 to -11
1, 2
1 1 2 1
( ) ( )
NN
xx
x x x
E i E i
()
1
EiS
kT
i
Ge
G –Geometric
Factor
22
21 2 1 2
1, 2
22
11
( ) ( )
224 ( 1 2) 4 ( 1 2)
X X X X
XX
P P P P ee
E c L
X X X X
C = d /L, D-Distance between the cells
and L Length22
22
( 1) ( )
KK
kT kT
NN
N KK
kT kT
ee
P
ee
22
1
22
( 1) ( )
KK
kT kT
NN
N KK
kT kT
ee
P
ee
Polarization for +1 as
the value for input cell22
2
11
1 ( )
8 1
ec
K
L c
22
2
11
2 ( )
8 1
ec
K
L c
Polarization for -1 as the
value for input cell
21 2 1 2
1, 2
22
11
( ) ( )
224 ( 1 2) 4 ( 1 2)
X X X X
XX
P P P P ee
E c L
X X X X
C = d /L, D-Distance between the cells
and L Length22
22
( 1) ( )
KK
kT kT
NN
N KK
kT kT
ee
P
ee
22
1
22
( 1) ( )
KK
kT kT
NN
N KK
kT kT
ee
P
ee
Polarization for +1 as
the value for input cell22
2
11
1 ( )
8 1
ec
K
L c
22
2
11
2 ( )
8 1
ec
K
L c
Polarization for -1 as the
value for input cell
Simulation Results
Plot of Polarization of two cell, three cell and
four cell QCA wire.
<PN>approaches“0”quicklyforlongerwires(N=3,4)thanforshorterwires(N=2).
Thereasonforthisisthatthecoulumbicinteractionismoreforshorterwiresthanfor
longerwires,moreinteractionexistwiththenearbycellthanfarawaycells.
SotwocellQCAwireshowsmorerobustfunctionthanthree,fourcellQCAwire.
Hencecoulombicinteractionismoreforneighborsandinteractiondecreasesas
numberofcellsincreases
Plot of Polarization of two cell, three cell and
four cell QCA wire.
<PN>approaches“0”quicklyforlongerwires(N=3,4)thanforshorterwires(N=2).
Thereasonforthisisthatthecoulumbicinteractionismoreforshorterwiresthanfor
longerwires,moreinteractionexistwiththenearbycellthanfarawaycells.
SotwocellQCAwireshowsmorerobustfunctionthanthree,fourcellQCAwire.
Hencecoulombicinteractionismoreforneighborsandinteractiondecreasesas
numberofcellsincreases
Plot of Ek / Kt Vs Polarization
1.Theneedforthisplotistheresponseofoutputcelltotheinputofachieving
groundstateconfiguration
2.ThisEk/kTPlotgivesbistableoutputvaluesforaQCAwireconsidered.
3.StabilityismoreforshorterQCAwirethanthreeandfourcellQCAwires.
1.Theneedforthisplotistheresponseofoutputcelltotheinputofachieving
groundstateconfiguration
2.ThisEk/kTPlotgivesbistableoutputvaluesforaQCAwireconsidered.
3.StabilityismoreforshorterQCAwirethanthreeandfourcellQCAwires.
5.AlltheQCAcellsgetsstabilizedaround5K.
6.WhentheratioEk/kTincreases,polarizationincreasesandtwocellQCA
wirehas0.58polarization(logic1value)atEk/kT=1,whereasthreeandfour
cellQCAhasnotreachedlogic1stageasitsvaluesare0.44and0.33
respectively.
7.Thustheinteractionandstabilizationisachievedwiththeneighborsmore
thanfarawayothercells.HenceatlowertemperatureshorterQCAcellachieves
groundstateandgetsstabilizedeasily.
8.ThereforeachievinggroundstateconfigurationofaQCAcelldependsonits
drivercell;inturnpolarizationdependsonitskinkenergyaswellas
temperatureofitsdrivercell.Itis
6.WhentheratioEk/kTincreases,polarizationincreasesandtwocellQCA
wirehas0.58polarization(logic1value)atEk/kT=1,whereasthreeandfour
cellQCAhasnotreachedlogic1stageasitsvaluesare0.44and0.33
respectively.
7.Thustheinteractionandstabilizationisachievedwiththeneighborsmore
thanfarawayothercells.HenceatlowertemperatureshorterQCAcellachieves
groundstateandgetsstabilizedeasily.
8.ThereforeachievinggroundstateconfigurationofaQCAcelldependsonits
drivercell;inturnpolarizationdependsonitskinkenergyaswellas
temperatureofitsdrivercell.Itis
Simulation of Cell to Cell distance
1.Asthedistancebetweenthecellsincreasespolarization
ofoutputcelldecreasesquickly,alsodecreasingthe
spacingbetweenthecellsincreasesthestabilityof
achievinggroundstateofQCAcell
2.Thereasonforthisstrongercoulombicinteraction
betweentwocellswhichmakesthepolarizationtoget
stabilizedforlessercelltocelldistanceandasdistance
increasespolarizationdecreases.
3.When L is equal to 2d (d –inter dot distance in a cell –5nm) polarization decreases
slowly and when L is greater than 10 nm polarization decreases quickly due to less
coulombic interaction.
4.It is better to have distance of 10 to 20 nm to get highest polarization from driver cell
5. When L = 20 and d =20, the interaction decays and for more cell to cell distance
the polarization decreases. So optimum value of d = 10 and L =10 is chosen for getting
higher value in polarization.
6.When L = d = 10 nm, the polarization value for a QCA cell is 0.978.
1.Asthedistancebetweenthecellsincreasespolarization
ofoutputcelldecreasesquickly,alsodecreasingthe
spacingbetweenthecellsincreasesthestabilityof
achievinggroundstateofQCAcell
2.Thereasonforthisstrongercoulombicinteraction
betweentwocellswhichmakesthepolarizationtoget
stabilizedforlessercelltocelldistanceandasdistance
increasespolarizationdecreases.
3.When L is equal to 2d (d –inter dot distance in a cell –5nm) polarization decreases
slowly and when L is greater than 10 nm polarization decreases quickly due to less
coulombic interaction.
4.It is better to have distance of 10 to 20 nm to get highest polarization from driver cell
5. When L = 20 and d =20, the interaction decays and for more cell to cell distance
the polarization decreases. So optimum value of d = 10 and L =10 is chosen for getting
higher value in polarization.
6.When L = d = 10 nm, the polarization value for a QCA cell is 0.978.
Inter dot distance variations
1.whendistancebetweendotsinacellisvariedfrom5nmto20nm.
Itisshownthatwhend=L=10nmcurveshowsstablepolarization
evenathighertemperaturethanothercurvesofdifferent‘d’and‘L’values
2.Thereasonforthisstablepolarizationisequalinter-dotdistance
andequalcelltocelldistancehavehighercoulombicinteractionand
leadtostablepolarizationthanotherdvalues.
1.whendistancebetweendotsinacellisvariedfrom5nmto20nm.
Itisshownthatwhend=L=10nmcurveshowsstablepolarization
evenathighertemperaturethanothercurvesofdifferent‘d’and‘L’values
2.Thereasonforthisstablepolarizationisequalinter-dotdistance
andequalcelltocelldistancehavehighercoulombicinteractionand
leadtostablepolarizationthanotherdvalues.
Ek / kt
QCA Majority Gate
QCA Majority Gate
1.111curveshowsfasterdecayastemperatureincreasesand110,011curvesshow
somestabilityinitspolarizationvalue
2.Thereasonforthisslownessathighertemperatureischangeofinputconfigurations
from1to0or0to1andcorrespondingchangein‘L’and‘d’,soadditionalenergyis
requiredforchangeintheelectronlocalization.Hencepolarizationexistsforsome
temperaturefor011than111.
3.Curve011hashigherpolarizationvaluethan101and110curves.
Thecurve011haspolarizationvalueof0.971at1Khigherthan110of0.965
and101has0.960whichensurespolarizationexistsfor011evenastemperature
increases
QCA Majority Gate
QCA Majority Gate
1.111curveshowsfasterdecayastemperatureincreasesand110,011curvesshow
somestabilityinitspolarizationvalue
2.Thereasonforthisslownessathighertemperatureischangeofinputconfigurations
from1to0or0to1andcorrespondingchangein‘L’and‘d’,soadditionalenergyis
requiredforchangeintheelectronlocalization.Hencepolarizationexistsforsome
temperaturefor011than111.
3.Curve011hashigherpolarizationvaluethan101and110curves.
Thecurve011haspolarizationvalueof0.971at1Khigherthan110of0.965
and101has0.960whichensurespolarizationexistsfor011evenastemperature
increases
111 Input configuration with L = 10nm
and d = 5 and 10nm curves
QCA Majority Gate
QCA Majority Gate
110 Input configuration with L = 10nm
and d = 5 and 10nm curves
1. 111 curve of L and d of 10 nm gives better stability in polarization than
111 curves of different values of ‘L’ and ‘d’
2.110 curves of equal L and d gives better polarization than different
‘L’ and ‘d’ value curves. Therefore smaller and optimum value of L and ‘d’
of 10 nm distance gives higher polarization values as temperature increases
and d = 5 and 10nm curves
QCA Majority Gate
QCA Majority Gate
110 Input configuration with L = 10nm
and d = 5 and 10nm curves
1. 111 curve of L and d of 10 nm gives better stability in polarization than
111 curves of different values of ‘L’ and ‘d’
2.110 curves of equal L and d gives better polarization than different
‘L’ and ‘d’ value curves. Therefore smaller and optimum value of L and ‘d’
of 10 nm distance gives higher polarization values as temperature increases
Modeling of QCA Circuit using Evolutionary
Algorithms –Neural Network and Genetic Algorithm
1.Hopfieldneuralnetworks[34]canbeusedtosimulatequantumcellular
automatacircuitsandstudythedeviceleveluncertaintieslikestablepolarization
ofoutputcellwithrespecttoinputconfigurationsandtemperature.
2.Ingeneticalgorithm[32]simplemutationtechniqueisusedtogeneratenew
populations.Theprobabilityofgettingcorrectpolarizationsandcomparison
ofdefectiveQCAcellwithbestQCAcellintermsofitsenergyvaluesare
studiedusinggeneticalgorithm.Suchanalysisreducesthepossibilityoffailures
inQCAcircuitandguaranteeshighspeed.
3.UsingHopfieldneuralnetworkQCAcircuitscanbesuccessfullyoptimized
intermsofitsconstructionandenergyminimizationofoutputcell
4.TheadvantageofusingHopfieldnetworkistheabilitytoshowthemajority
Computationandreflectionoftheinputpolarizationvalueofmiddlecelltoits
correspondinginput.
Algorithms –Neural Network and Genetic Algorithm
1.Hopfieldneuralnetworks[34]canbeusedtosimulatequantumcellular
automatacircuitsandstudythedeviceleveluncertaintieslikestablepolarization
ofoutputcellwithrespecttoinputconfigurationsandtemperature.
2.Ingeneticalgorithm[32]simplemutationtechniqueisusedtogeneratenew
populations.Theprobabilityofgettingcorrectpolarizationsandcomparison
ofdefectiveQCAcellwithbestQCAcellintermsofitsenergyvaluesare
studiedusinggeneticalgorithm.Suchanalysisreducesthepossibilityoffailures
inQCAcircuitandguaranteeshighspeed.
3.UsingHopfieldneuralnetworkQCAcircuitscanbesuccessfullyoptimized
intermsofitsconstructionandenergyminimizationofoutputcell
4.TheadvantageofusingHopfieldnetworkistheabilitytoshowthemajority
Computationandreflectionoftheinputpolarizationvalueofmiddlecelltoits
correspondinginput.
S1
S2
S3
T21
T23
T13
T31
A Y
CLK 0 CLK 1 CLK 2
1.The Hopfield network can be trained to get the information about device uncertainties
like ground state configuration of output cell, steady state polarization and minimum
energy required for output cell in QCA logic circuits. [35]
2.The network structure and synaptic weights depends on specific weights assigned to
the circuit.
3. The output signal is generated when each neuron just adds the signal sent by other
neurons and multiplied by its corresponding synaptic weights.
4.The weighted sum of input and output signal is called input and output potential.
.
5. Where Wij (i,j = 1 …m) is the synaptic weight between neurons j and i. The set of values of Wij
forms symmetric matrix that contains synaptic weights and these weights corresponds to the
energy value of a cell, Pi and Pj are the output potential with respect to input potential V11
1
2
nm
ij i j
ii
E W PP
Energy function of the Network1
m
ij i
i
Vi W P
Input Potential
S2
S3
T21
T23
T13
T31
A Y
CLK 0 CLK 1 CLK 2
1.The Hopfield network can be trained to get the information about device uncertainties
like ground state configuration of output cell, steady state polarization and minimum
energy required for output cell in QCA logic circuits. [35]
2.The network structure and synaptic weights depends on specific weights assigned to
the circuit.
3. The output signal is generated when each neuron just adds the signal sent by other
neurons and multiplied by its corresponding synaptic weights.
4.The weighted sum of input and output signal is called input and output potential.
.
5. Where Wij (i,j = 1 …m) is the synaptic weight between neurons j and i. The set of values of Wij
forms symmetric matrix that contains synaptic weights and these weights corresponds to the
energy value of a cell, Pi and Pj are the output potential with respect to input potential V11
1
2
nm
ij i j
ii
E W PP
Energy function of the Network1
m
ij i
i
Vi W P
Input Potential
1.EachneuronrepresentsonecellofQCAcircuitandhasavalueranging
Between-1to+1initspolarization.
2.Hopfieldneuralnetworkisdesignedwithtargetstablepointsinordertoarrive
atgroundstateconfigurationofoutputcell.
3.Thebehavioroftheneuralnetworkisstudiedatdifferentinitialconditionsand
finaloutputoftheHopfieldnetworkanditshouldgivetwostablepointswith
respecttogiventargetvector[-1,-1;+1,+1;-1,+1]
Before Simulation Input reflects one
of the Input (A) Output Reflects one of the input A after
Simulation
Between-1to+1initspolarization.
2.Hopfieldneuralnetworkisdesignedwithtargetstablepointsinordertoarrive
atgroundstateconfigurationofoutputcell.
3.Thebehavioroftheneuralnetworkisstudiedatdifferentinitialconditionsand
finaloutputoftheHopfieldnetworkanditshouldgivetwostablepointswith
respecttogiventargetvector[-1,-1;+1,+1;-1,+1]
Before Simulation Input reflects one
of the Input (A) Output Reflects one of the input A after
Simulation
4.When a QCA cell is polarized to +1 then neighborhood near by QCA cell is affected
by its Coulombic interactions.
5.Any undesirable and stable input points to the network should give a stable output
polarization. Hopfield network QCA circuit has inputs a,b and control input c and Y
be the output, using Majority voting scheme output is computed.
Hopfield network with unstable points
Hopfield network with undesirable output
point Y ends up with Input B
by its Coulombic interactions.
5.Any undesirable and stable input points to the network should give a stable output
polarization. Hopfield network QCA circuit has inputs a,b and control input c and Y
be the output, using Majority voting scheme output is computed.
Hopfield network with unstable points
Hopfield network with undesirable output
point Y ends up with Input B
Advantages of the Hopfield Network
1.All desired inputs are ended with corners to ensure stability, whereas the
Undesirable output points touching outside the blue line indicate instability
and its corresponding inputs can be identified.
2.Even the classification among output stable points can be made for
corresponding input points in the Hopfield network
Clocked QCA circuit using Hopfield network
T be the topology matrix which has eight
Columns and four rows
R be clocking zone allotment matrix which has
eight columns and four rows.
The matrix R has the value of 1 or 0, 1
represents majority gate corresponding
to the 1st clock zone and 0 represents
no clock zone.
T = R =
1 2 3 4 5 6 7 8 1 1 1 1 1 1 1 1
1 2 3 4 5 6 7 0 1 1 1 1 1 1 1 0
1 2 3 4 5 6 7 0 1 1 1 1 1 1 1 0
1 2 0 0 0 0 0 0 1 1 0 0 0 0 0 0
1.All desired inputs are ended with corners to ensure stability, whereas the
Undesirable output points touching outside the blue line indicate instability
and its corresponding inputs can be identified.
2.Even the classification among output stable points can be made for
corresponding input points in the Hopfield network
Clocked QCA circuit using Hopfield network
T be the topology matrix which has eight
Columns and four rows
R be clocking zone allotment matrix which has
eight columns and four rows.
The matrix R has the value of 1 or 0, 1
represents majority gate corresponding
to the 1st clock zone and 0 represents
no clock zone.
T = R =
1 2 3 4 5 6 7 8 1 1 1 1 1 1 1 1
1 2 3 4 5 6 7 0 1 1 1 1 1 1 1 0
1 2 3 4 5 6 7 0 1 1 1 1 1 1 1 0
1 2 0 0 0 0 0 0 1 1 0 0 0 0 0 0
SimulationResults:
1.Theneuralnetworkissimulatedseveraltimesaccordingtofourpossibleclockzones.
Onlytheneuronsrepresentingcellsintheswitchphasecanbechanged.
2.Theneuronscorrespondingtocellsthatareatthepreviousclockphasei.e.
holdphasearefrozenandusedasinputtocurrentclockphase.
3.Thenetworkissimulatedinthefollowingway,initiallymatrixwithsynapticweight
arecreatedandtwoloopscorrespondstoclockphaseandcalculationoftheoutput
potentialandpolarizationofthecell.
5.Onetoonecellinteractioninthiscircuitisnonlinearandtheinputfunctionconsidered
hereistanh(x).
6.GivenTandR,PisthepolarizationvalueofeachcellofQCAcircuitandEbeover
alltheenergyfunctionofthenetwork.
Thesynapticweightsi.e.kinkenergyvaluesintermsofKmatrixformataregiventothe
simulatorandoutputpolarizationiscomputed.Finallyoverallenergycostfunctionforthe
abovecircuitisfoundtobe0.96Mev.
P=
1 0.97 0.99 0.98 0.981 0.98 1
0.981 0.990.98 0.971 0.98 0
1 0.98 0.980.97 1 0.98 0.98 0
0.970.95 0 0 00 0 0 0
1.Theneuralnetworkissimulatedseveraltimesaccordingtofourpossibleclockzones.
Onlytheneuronsrepresentingcellsintheswitchphasecanbechanged.
2.Theneuronscorrespondingtocellsthatareatthepreviousclockphasei.e.
holdphasearefrozenandusedasinputtocurrentclockphase.
3.Thenetworkissimulatedinthefollowingway,initiallymatrixwithsynapticweight
arecreatedandtwoloopscorrespondstoclockphaseandcalculationoftheoutput
potentialandpolarizationofthecell.
5.Onetoonecellinteractioninthiscircuitisnonlinearandtheinputfunctionconsidered
hereistanh(x).
6.GivenTandR,PisthepolarizationvalueofeachcellofQCAcircuitandEbeover
alltheenergyfunctionofthenetwork.
Thesynapticweightsi.e.kinkenergyvaluesintermsofKmatrixformataregiventothe
simulatorandoutputpolarizationiscomputed.Finallyoverallenergycostfunctionforthe
abovecircuitisfoundtobe0.96Mev.
P=
1 0.97 0.99 0.98 0.981 0.98 1
0.981 0.990.98 0.971 0.98 0
1 0.98 0.980.97 1 0.98 0.98 0
0.970.95 0 0 00 0 0 0
QCA modeling by Genetic algorithm
1.Genetic annealing algorithm is used to simulate QCA circuits depending on semi
classical QCA model proposed by [37].
2.The main aim of optimization is to minimize the total electrostatic energy between the
electrons in the dots of a QCA cell.
3.The total electrostatic energy of an array of QCA cell is considered here and expressed
as the energy of the system
4.The need of genetic algorithm is to express the polarization in terms of its energy value 114
nm
ij
ij o r ij
qq
E
r
5. Fitness Function defined ismax
()
( ) exp( )
g i g
gx
temp
Majority QCA gate with 1, 2,
3 input chromosome and 4,
5 and 6 output chromosomes
1.Genetic annealing algorithm is used to simulate QCA circuits depending on semi
classical QCA model proposed by [37].
2.The main aim of optimization is to minimize the total electrostatic energy between the
electrons in the dots of a QCA cell.
3.The total electrostatic energy of an array of QCA cell is considered here and expressed
as the energy of the system
4.The need of genetic algorithm is to express the polarization in terms of its energy value 114
nm
ij
ij o r ij
E
r
5. Fitness Function defined ismax
()
( ) exp( )
g i g
gx
temp
Majority QCA gate with 1, 2,
3 input chromosome and 4,
5 and 6 output chromosomes
Hybridization location
Parent A 1 2 3 4 6 5 offspring A1 1 2 3 4 5 6
Parent B 1 3 2 2 5 6 offspring B1 1 3 2 2 6 5
Crossover Regulation of Majority QCA gate
1.The selection scheme in genetic algorithm is based on fitness function defined.
2.The individual having highest fitness value has the large probability to come to
stable condition and individual chromosome with lesser probability is removed.
3.As per majority logic 4th cell has replicate of one of the inputs, this cell and its
interaction with 5th and 6th cell is considered here. So the output cell has to be
brought to perfect ground state conditionmax
( ( ) )
( ) min{1,exp( )
ij
g i g
fx
temp
Population is terminated once Maximum
Condition is achieved
Parent A 1 2 3 4 6 5 offspring A1 1 2 3 4 5 6
Parent B 1 3 2 2 5 6 offspring B1 1 3 2 2 6 5
Crossover Regulation of Majority QCA gate
1.The selection scheme in genetic algorithm is based on fitness function defined.
2.The individual having highest fitness value has the large probability to come to
stable condition and individual chromosome with lesser probability is removed.
3.As per majority logic 4th cell has replicate of one of the inputs, this cell and its
interaction with 5th and 6th cell is considered here. So the output cell has to be
brought to perfect ground state conditionmax
( ( ) )
( ) min{1,exp( )
ij
g i g
fx
temp
Population is terminated once Maximum
Condition is achieved
S.NOGenetic
parameters
Values
1 Population size6
2 No of
generations
25 and 100
3 Mutation
probability
0.05
4 Crossover
Probability
0.8
5 Termination
criteria
25 and 100
(Max no of
generations)
6 No of values
for each
chromosome
2 ( +1 and -1)
7 Simulation
time
14 to 20
seconds (
nanoseconds)
Simulation Results
Plot of fitness function in terms of
polarization
Energy value of electron in QCA cell
l versus no of generations
2.99 Milli eV
Energy by GA
Method
parameters
Values
1 Population size6
2 No of
generations
25 and 100
3 Mutation
probability
0.05
4 Crossover
Probability
0.8
5 Termination
criteria
25 and 100
(Max no of
generations)
6 No of values
for each
chromosome
2 ( +1 and -1)
7 Simulation
time
14 to 20
seconds (
nanoseconds)
Simulation Results
Plot of fitness function in terms of
polarization
Energy value of electron in QCA cell
l versus no of generations
2.99 Milli eV
Energy by GA
Method
plot of no of generations versus fitness for
average (best and worst chromosome)
and best chromosome
14 Plot of difference between stable
QCA cell and unstable QCA cell.
average (best and worst chromosome)
and best chromosome
14 Plot of difference between stable
QCA cell and unstable QCA cell.
QCA AND Gate –Majority Logic
Plot of Energy versus no of generations of AND gate majority logic
QCA OR Gate –Majority Logic
Plot of Energy versus no of generations of OR gate majority logic
Plot of Energy versus no of generations of AND gate majority logic
QCA OR Gate –Majority Logic
Plot of Energy versus no of generations of OR gate majority logic
Summary :
1. The probability of achieving ground state by the genetic
simulated annealing algorithm (GA ) is 0.98.
2. It was found that the instability in the polarization QCA cell lies
between 0 –0.6 for +1 polarization ( 0 to -1 for -1 polarization)
and this can be validated by cell to cell response in QCA circuits.
3.QCA AND and OR gates are simulated for 200 generation and
around 40 generations both the circuits are stabilized.
4. Using the Hopfield network it is found that output belongs to or
reflects particular input thereby computation and finding the defect
in terms of polarization is much easier than other simulator
1. The probability of achieving ground state by the genetic
simulated annealing algorithm (GA ) is 0.98.
2. It was found that the instability in the polarization QCA cell lies
between 0 –0.6 for +1 polarization ( 0 to -1 for -1 polarization)
and this can be validated by cell to cell response in QCA circuits.
3.QCA AND and OR gates are simulated for 200 generation and
around 40 generations both the circuits are stabilized.
4. Using the Hopfield network it is found that output belongs to or
reflects particular input thereby computation and finding the defect
in terms of polarization is much easier than other simulator
Probabilistic modeling of QCA circuits using Bayesian networks
1.Probabilitynetworkcanbecharacterizedasaformofgraphicalstructurefrom
basicaxiomsofprobabilitycalculus,whichleadstorecursivefactorization
ofajointprobabilitydistributionintoaproductofconditionalprobability
distributionofdifferentdimensionality.[38]
2.QCAcircuitsaretransformedintoBayesianframeworkusingGeniesoftware.
3.InferencealgorithmsinBayesiannetworkareusedtostudytheoutput
polarizationofQCAcircuits.
4.Probabilitynetworkaredefinedoverfinitesetofvariables,eachofwhich
representsafinitesetofexhaustiveandmutuallyexclusivestates.
5.Theconditionalprobabilitydistributionsforvariablesofmutuallyexclusive
eventsplayacentralroleinprobabilitynetworks[40]
1.Probabilitynetworkcanbecharacterizedasaformofgraphicalstructurefrom
basicaxiomsofprobabilitycalculus,whichleadstorecursivefactorization
ofajointprobabilitydistributionintoaproductofconditionalprobability
distributionofdifferentdimensionality.[38]
2.QCAcircuitsaretransformedintoBayesianframeworkusingGeniesoftware.
3.InferencealgorithmsinBayesiannetworkareusedtostudytheoutput
polarizationofQCAcircuits.
4.Probabilitynetworkaredefinedoverfinitesetofvariables,eachofwhich
representsafinitesetofexhaustiveandmutuallyexclusivestates.
5.Theconditionalprobabilitydistributionsforvariablesofmutuallyexclusive
eventsplayacentralroleinprobabilitynetworks[40]
P (m/a) = P(m/b) = P(m/c) = 0.9605
P (m/a, b) = P(m/b, c) = P(m/c, d) = 0.9223
P (m/a, b, c) = 0.8338
P (o, m) = P (o/ m). P(m) = 0.749.
The equation of overall joint probability distribution of output cell is given by
P (o, m, a, b, c) = P (o) P (o/ m) P (m/a) P (m/ b) P (m/ c)[39]Probability of getting correct polarization of
output QCA Cell
0
0.2
0.4
0.6
0.8
1
111 011 110 101
polarization of output cell
The probability of getting correct output for the input configurations of (111,110,011,101).
P (m/a, b) = P(m/b, c) = P(m/c, d) = 0.9223
P (m/a, b, c) = 0.8338
P (o, m) = P (o/ m). P(m) = 0.749.
The equation of overall joint probability distribution of output cell is given by
P (o, m, a, b, c) = P (o) P (o/ m) P (m/a) P (m/ b) P (m/ c)[39]Probability of getting correct polarization of
output QCA Cell
0
0.2
0.4
0.6
0.8
1
111 011 110 101
polarization of output cell
The probability of getting correct output for the input configurations of (111,110,011,101).
Polarization of output with
energy -temperature ratio of QCA majority gate
Probability of getting correct polarization output
with temperature of QCA majority gate.
ForlargerQCAcircuitsitiscumbersometocalculatejointprobabilitydistribution
anditisimpossibletostudyotherdeviceleveluncertainty.
SographicalformofstructurecalledBayesiannetworkcanbeusedtomodel
QCAcircuit
energy -temperature ratio of QCA majority gate
Probability of getting correct polarization output
with temperature of QCA majority gate.
ForlargerQCAcircuitsitiscumbersometocalculatejointprobabilitydistribution
anditisimpossibletostudyotherdeviceleveluncertainty.
SographicalformofstructurecalledBayesiannetworkcanbeusedtomodel
QCAcircuit
Bayesian modeling of QCA circuit
1. The role of graph in probability and statistical modeling to express substantive
assumption facilitates efficient inference from observation and economical
representation of joint probability distribution of network.
2.Here probabilistic models of QCA circuits are constructed using Bayesian
network to model steady state cell probability given input states or configurations and
finding the Probability of getting correct output or not
3. Bayesian Network is a simple directed acyclic Graph Structure.[41]
The nodes of Bayesian network are random variables and links between them
represents dependencies among them [42].
4.This modeling is used to study inherent device level uncertainty like probability of
getting correct output, steady state of output cell and errors occurring in QCA circuit
Input Output
A
B
C
Y
Bayesian Network Model [43]
QCA Majority
gate
QCA Wire
1. The role of graph in probability and statistical modeling to express substantive
assumption facilitates efficient inference from observation and economical
representation of joint probability distribution of network.
2.Here probabilistic models of QCA circuits are constructed using Bayesian
network to model steady state cell probability given input states or configurations and
finding the Probability of getting correct output or not
3. Bayesian Network is a simple directed acyclic Graph Structure.[41]
The nodes of Bayesian network are random variables and links between them
represents dependencies among them [42].
4.This modeling is used to study inherent device level uncertainty like probability of
getting correct output, steady state of output cell and errors occurring in QCA circuit
Input Output
A
B
C
Y
Bayesian Network Model [43]
QCA Majority
gate
QCA Wire
QCA Not Circuit
QCA Not Circuit –
Bayesian Model
QCA Majority Bayesian
Model
The overall joint probability can be factored as
P(x1, x2…..x5) = P(x5/x4) P(x3/x2) P(x2/x1) P(x5)
The evidence considered here are the parents with
assumed value of polarization from statistical quantum
mechanics treatment method ,
( , , )
()
( , , )
S
YS
P Y X S
Y
P
X P Y X S
S-Set of all variables
Excluding x, y –P( y /x)
calculated from DAG structure
QCA Not Circuit –
Bayesian Model
QCA Majority Bayesian
Model
The overall joint probability can be factored as
P(x1, x2…..x5) = P(x5/x4) P(x3/x2) P(x2/x1) P(x5)
The evidence considered here are the parents with
assumed value of polarization from statistical quantum
mechanics treatment method ,
( , , )
()
( , , )
S
YS
P Y X S
Y
P
X P Y X S
S-Set of all variables
Excluding x, y –P( y /x)
calculated from DAG structure
Message Passing in QCA circuit
1. The wave propagation in QCA circuit is explained by considering three cells in series
A, B and C. A has direct link to B and B has direct link to C
2. Each node is allowed to represent multivalued variable which may represent a
collection of mutually exclusive hypothesis or collection of possible observables.
3.A has direct link to B and it is quantified by its conditional probability value. The
relation is conceptually a chain operation, A generates expected value of B and B
generates expected value of C and C has no direct influence of A.
4. The links between nodes carries only one way information i.e. wave propagation from
input cell to its neighbor cell. The fixed conditional probability is P(A/B) and dynamic
values of updated node probability is denoted by BEL(Xi) which reflect overall belief. ( ) ( )
i
i
X
BEL X P
A
Fan Circuit
Bayesian representation
1. The wave propagation in QCA circuit is explained by considering three cells in series
A, B and C. A has direct link to B and B has direct link to C
2. Each node is allowed to represent multivalued variable which may represent a
collection of mutually exclusive hypothesis or collection of possible observables.
3.A has direct link to B and it is quantified by its conditional probability value. The
relation is conceptually a chain operation, A generates expected value of B and B
generates expected value of C and C has no direct influence of A.
4. The links between nodes carries only one way information i.e. wave propagation from
input cell to its neighbor cell. The fixed conditional probability is P(A/B) and dynamic
values of updated node probability is denoted by BEL(Xi) which reflect overall belief. ( ) ( )
i
i
X
BEL X P
A
Fan Circuit
Bayesian representation
1. Let Ay-is the data contained in the tree rooted at y and Ay+ data contained
in the rest of the network. The conditional probability of P(Y / X ) with respect to Ay ( , ) ( )
jj
y
ii
YY
P A P
XX
2.Suppose the belief induced by Y by some polarization propagation
then A is Ay-. Then according to bayes theorem( ) ( , )
i
iY
Y
Y
BEL Y P A
A
( ) ( ) ( )
iY
i
iY
YA
BEL Y P P
YA
where is a normalizing constant( ) ( ) ( )
( ) (0.48,0.18,0.05)
iY
i
iY
i
YA
BEL Y P P
YA
BEL Y
1
(0.48 0.18 0.05)
( ) (0.676,0.25,0.07)BEL Y
Let λ(Yi) and Π(Yi) be defined as anticipatory support
to Y and receives retrospective support of Yi.
So the total strength of the belief can be written ) ( )
( ) ( )
Y
i
i
i
i
Y
A
YP
Y
Y
YP
A
()
i i i
BEL Y Y Y
in the rest of the network. The conditional probability of P(Y / X ) with respect to Ay ( , ) ( )
jj
y
ii
YY
P A P
XX
2.Suppose the belief induced by Y by some polarization propagation
then A is Ay-. Then according to bayes theorem( ) ( , )
i
iY
Y
Y
BEL Y P A
A
( ) ( ) ( )
iY
i
iY
YA
BEL Y P P
YA
where is a normalizing constant( ) ( ) ( )
( ) (0.48,0.18,0.05)
iY
i
iY
i
YA
BEL Y P P
YA
BEL Y
1
(0.48 0.18 0.05)
( ) (0.676,0.25,0.07)BEL Y
Let λ(Yi) and Π(Yi) be defined as anticipatory support
to Y and receives retrospective support of Yi.
So the total strength of the belief can be written ) ( )
( ) ( )
Y
i
i
i
i
Y
A
YP
Y
Y
YP
A
()
i i i
BEL Y Y Y
The propagation scheme in QCA Fan-in circuit is given by
1. Node Y is activated to update by inspection.
2.λ(y) and Π(x) are passed from X to Y and X to Z
λ(y) and Π(x) are computed.
3.New λ(y) and Π(x) messages are posted in the network
4.Propagation as Bottom up and Top down propagation Repeat all the message
instantiated are exhausted
λy(Y) = (0.75,0.61,0.54)
Π(y) = (0.3, 0.35, 0.35)
BEL(Y) = λ(y) Π(y) = (0.423, 0.32, 0.25)
1. Node Y is activated to update by inspection.
2.λ(y) and Π(x) are passed from X to Y and X to Z
λ(y) and Π(x) are computed.
3.New λ(y) and Π(x) messages are posted in the network
4.Propagation as Bottom up and Top down propagation Repeat all the message
instantiated are exhausted
λy(Y) = (0.75,0.61,0.54)
Π(y) = (0.3, 0.35, 0.35)
BEL(Y) = λ(y) Π(y) = (0.423, 0.32, 0.25)
Cut set conditioning method
1.QCA circuits consist of building blocks of singly connected structure called
multiple connected networks.
2.Multiple connected networks consists of several loops, each loop which is known as
elementary circuit consists of undirected path only, it is essential to convert multiple
connected networks in to its equivalent many single connected network with preserving
its dependency in its links. 5 5 3 4 5 3 4
( ) ( , 4) ( ) ( ) ( , 4) ( ) ( )
1 3 1 1 3 1 1
5 3 4 5 3 4
( , 4) ( ) ( ) ( , 4) ( ) ( )
3 1 1 3 1 1
X X X X X X X
P P X P P P X P P
X X X X X X X
X X X X X X
P X P P P X P P
X X X X X X
2, 3, 4
54
( ) ( 5, 2, 3, )
11
x x x
XX
P P X X X
XX
1.QCA circuits consist of building blocks of singly connected structure called
multiple connected networks.
2.Multiple connected networks consists of several loops, each loop which is known as
elementary circuit consists of undirected path only, it is essential to convert multiple
connected networks in to its equivalent many single connected network with preserving
its dependency in its links. 5 5 3 4 5 3 4
( ) ( , 4) ( ) ( ) ( , 4) ( ) ( )
1 3 1 1 3 1 1
5 3 4 5 3 4
( , 4) ( ) ( ) ( , 4) ( ) ( )
3 1 1 3 1 1
X X X X X X X
P P X P P P X P P
X X X X X X X
X X X X X X
P X P P P X P P
X X X X X X
2, 3, 4
54
( ) ( 5, 2, 3, )
11
x x x
XX
P P X X X
XX
Conditional Probability Table
QCA Latch Circuit
Inference Algorithms
1. Clustering Algorithm
2. Logic Sampling
3.Likelihood Propagation
4. Importance Sampling
Given the joint probability specification from Bayesian
network representation, the following quantities can be
studied for a QCA circuit.
1.Expected polarization of a cell, given the polarization of
input cells. Initially joint probability of the circuit is found,
and then here the Inference algorithms are used to find the
probability of getting correct output.
2.Near to ground state configuration is found using
maximum clustering and maximum likelihood propagation
algorithm
QCA Latch Circuit
Inference Algorithms
1. Clustering Algorithm
2. Logic Sampling
3.Likelihood Propagation
4. Importance Sampling
Given the joint probability specification from Bayesian
network representation, the following quantities can be
studied for a QCA circuit.
1.Expected polarization of a cell, given the polarization of
input cells. Initially joint probability of the circuit is found,
and then here the Inference algorithms are used to find the
probability of getting correct output.
2.Near to ground state configuration is found using
maximum clustering and maximum likelihood propagation
algorithm
Clustering Algorithm
1 The main aim of the clustering algorithm is to combine individual nodes of the network
to form cluster nodes in such away that the resulting network is a poly tree or singly
connected network
QCA latch circuit
before Clustering Algorithm
QCA Latch circuit after clustering algorithm
2. Clustering algorithm is the addition of two nodes to remove loops or cycles in the
network path, such that network dependency is preserved
3.Clustering algorithm calculation of P(x5) in which nodes in the loop x3 and x4 added
together without affecting its dependency on x2, this way new evidence is observed in
the network by passing such local message. Because of no loops or cycles after
applying clustering algorithm, message can be passed to each node
1 The main aim of the clustering algorithm is to combine individual nodes of the network
to form cluster nodes in such away that the resulting network is a poly tree or singly
connected network
QCA latch circuit
before Clustering Algorithm
QCA Latch circuit after clustering algorithm
2. Clustering algorithm is the addition of two nodes to remove loops or cycles in the
network path, such that network dependency is preserved
3.Clustering algorithm calculation of P(x5) in which nodes in the loop x3 and x4 added
together without affecting its dependency on x2, this way new evidence is observed in
the network by passing such local message. Because of no loops or cycles after
applying clustering algorithm, message can be passed to each node
Logic sampling Propagation
1.Each node is randomly instantiated to one of its possible states,
according to the probability of this state given instantiated states of its parents.
2. Every instantiation to be performed in the topological order. Nodes with observed
states are also sampled, if the outcome of the sampling is inconsistent with the observed
state, the entire sample is discarded.
3.If the evidence is unlikely, most of the samples are inconsistent and all the samples
will be discarded
4.TheconditionalprobabilitydistributionofBgiven
evidenceiscalculated,supposeQCAcellBhasbeen
observedwithunlikelyvalue‘b’,thenthepercentageof
samplesinconsistentwillbeka+(1-a)Q
1.Each node is randomly instantiated to one of its possible states,
according to the probability of this state given instantiated states of its parents.
2. Every instantiation to be performed in the topological order. Nodes with observed
states are also sampled, if the outcome of the sampling is inconsistent with the observed
state, the entire sample is discarded.
3.If the evidence is unlikely, most of the samples are inconsistent and all the samples
will be discarded
4.TheconditionalprobabilitydistributionofBgiven
evidenceiscalculated,supposeQCAcellBhasbeen
observedwithunlikelyvalue‘b’,thenthepercentageof
samplesinconsistentwillbeka+(1-a)Q
Likelihood Propagation
1. Likelihood Propagation fixes the values for the evidence variable e and samples only
the remaining variable.
2. Given a parent of a node, each event generated is consistent with the evidence
and also it weighs each sample by the product of conditional probability of
evidence variable
3.All the samples are therefore consistent with the evidence and none are discarded
Consider QCA latch circuit in which P(X5 = +ve) has to be found.
P(X4 / X3 = true, X5 = true), initially weight W =1;
P(X2) = (0.5, 0.5) = True (assumption)
X3 is the evidence with value true.
W w * P(X3 = true / x2 = true) = 0.1, Next P(X4/ X2 = true)
P(X4/X2) = (0.8, 0.2) = true
Next for X5 to be true
W W * P(X5 = True / X3 = True, X4 = True) = 0.09999
Now multiply W with P(X3 = True) or P (X4 = True) and proceed each time Weight is
updated and multiplied with Product of Conditional probability, finally normalize W(x).
1. Likelihood Propagation fixes the values for the evidence variable e and samples only
the remaining variable.
2. Given a parent of a node, each event generated is consistent with the evidence
and also it weighs each sample by the product of conditional probability of
evidence variable
3.All the samples are therefore consistent with the evidence and none are discarded
Consider QCA latch circuit in which P(X5 = +ve) has to be found.
P(X4 / X3 = true, X5 = true), initially weight W =1;
P(X2) = (0.5, 0.5) = True (assumption)
X3 is the evidence with value true.
W w * P(X3 = true / x2 = true) = 0.1, Next P(X4/ X2 = true)
P(X4/X2) = (0.8, 0.2) = true
Next for X5 to be true
W W * P(X5 = True / X3 = True, X4 = True) = 0.09999
Now multiply W with P(X3 = True) or P (X4 = True) and proceed each time Weight is
updated and multiplied with Product of Conditional probability, finally normalize W(x).
Importance sampling
Initially a sequence of CPT is needed which jointly specifies an importance function 11
2
( ) ( 1) ( / ...... )
n
ii
i
P X P X P X X X
1
( ) ( / ( )
n
ii
i
P X P X PA X
If more no of evidence is observed, then evidence E is (E1, E2, ….En),
posterior distribution of network can still be factorized using chain rule.11
2
1
( ) ( ) ( / ...... , )
n
ii
i
XX
P P P X X X e
ee
HerevariableCisobservedinstateC’,Posteriorjoint
distributionoverAandBcanbecalculated
AfterfindingPosterior,likelihoodweighingmethodis
usedtofindP(X/e)
Initially a sequence of CPT is needed which jointly specifies an importance function 11
2
( ) ( 1) ( / ...... )
n
ii
i
P X P X P X X X
1
( ) ( / ( )
n
ii
i
P X P X PA X
If more no of evidence is observed, then evidence E is (E1, E2, ….En),
posterior distribution of network can still be factorized using chain rule.11
2
1
( ) ( ) ( / ...... , )
n
ii
i
XX
P P P X X X e
ee
HerevariableCisobservedinstateC’,Posteriorjoint
distributionoverAandBcanbecalculated
AfterfindingPosterior,likelihoodweighingmethodis
usedtofindP(X/e)
Simulation results:
QCA Latch & Not circuit
0
0.2
0.4
0.6
0.8
1
1 2 3 4 5
1 -BN clustering
2 -BN Av.Likelihood
3 -BN Logic sampling 4-BN Imp sampling
5 -Statistical Quantum mechanics treatment
Ou tp ut
Probability of getting correct
output polarization at 1K for
Inference algorithm and
comparison with Statistical
Quantum mechanics treatment
method
Probability of getting correct
output vs. Ek / kT value of
different inference algorithm
of QCA latch
Importancesamplingalgorithmhashighervalueof
probabilityofachievingcorrectoutputduetoCPT
ofeachnodeistakenintoconsiderationandany
variationgetsreflectedattheoutputcell
PolarizationValueis0.79
QCA Latch & Not circuit
0
0.2
0.4
0.6
0.8
1
1 2 3 4 5
1 -BN clustering
2 -BN Av.Likelihood
3 -BN Logic sampling 4-BN Imp sampling
5 -Statistical Quantum mechanics treatment
Ou tp ut
Probability of getting correct
output polarization at 1K for
Inference algorithm and
comparison with Statistical
Quantum mechanics treatment
method
Probability of getting correct
output vs. Ek / kT value of
different inference algorithm
of QCA latch
Importancesamplingalgorithmhashighervalueof
probabilityofachievingcorrectoutputduetoCPT
ofeachnodeistakenintoconsiderationandany
variationgetsreflectedattheoutputcell
PolarizationValueis0.79
QCA Majority gate
Clustering Algorithm
Likelihood Weighting
Polarization at 1 K for
011 0.63
Polarization at 1 K for 011 0.74
Clustering Algorithm
Likelihood Weighting
Polarization at 1 K for
011 0.63
Polarization at 1 K for 011 0.74
Polarization at 1 K for 011 0.8
Prob of getting correct output for 111
QCA majority gate
0
0.2
0.4
0.6
0.8
1
1 2 3
1 Clustering 2 Likelihood 3 Imp. Sampling
Probabil ity of getting correct output
output
1) Initializing the probability distributions of parents of evidence
nodes to uniform distribution, and
(2) Adjusting very small probabilities in the conditional probability tables.
Importance Algorithm is Preferred Over other Algorithms
Summary : Probability of getting correct output for given input
Bayesian Modeling and Inference Algorithms.
Prob of getting correct output for 111
QCA majority gate
0
0.2
0.4
0.6
0.8
1
1 2 3
1 Clustering 2 Likelihood 3 Imp. Sampling
Probabil ity of getting correct output
output
1) Initializing the probability distributions of parents of evidence
nodes to uniform distribution, and
(2) Adjusting very small probabilities in the conditional probability tables.
Importance Algorithm is Preferred Over other Algorithms
Summary : Probability of getting correct output for given input
Bayesian Modeling and Inference Algorithms.
1.Reliability analysis is carried out on simple QCA circuits like QCA Latches, Majority
gates and inverters are used to find defective cells due to manufacturing defects,
polarization defects etc.
2.The tool used to tackle this problem is Bayesian networks (BN).
3.QCA circuit is transformed in to Bayesian framework to find the probability of getting
correct output in terms of its polarization with respect to its input configuration and
temperature
Reliability analysis of QCA Circuits1s i ton i
PP
1
1 (1 )
P i ton i
PP
Pi , is the reliability of the i
th
component, then the reliability of the system for
serial elements Ps
Pi , is the reliability of the ith component, then the reliability of the system for
Parallel elements Pp
gates and inverters are used to find defective cells due to manufacturing defects,
polarization defects etc.
2.The tool used to tackle this problem is Bayesian networks (BN).
3.QCA circuit is transformed in to Bayesian framework to find the probability of getting
correct output in terms of its polarization with respect to its input configuration and
temperature
Reliability analysis of QCA Circuits1s i ton i
PP
1
1 (1 )
P i ton i
PP
Pi , is the reliability of the i
th
component, then the reliability of the system for
serial elements Ps
Pi , is the reliability of the ith component, then the reliability of the system for
Parallel elements Pp
The parameters of the BN consist of two types:
1. A priori probabilities of basic components given by their reliability or the
complement of their reliability.
2. Conditional probabilities of the intermediate nodes given the configurations of
their parents.
A priori probabilities of nodes of type Nc are fully determined by the reliability of
the corresponding components.
1. A priori probabilities of basic components given by their reliability or the
complement of their reliability.
2. Conditional probabilities of the intermediate nodes given the configurations of
their parents.
A priori probabilities of nodes of type Nc are fully determined by the reliability of
the corresponding components.
Reliability algorithm of QCA circuits
If nc is the basic cell of Nc and pi is the reliability of the component Nc()
i
ci
P N NF P
and( ) 1 , 1....
i
c i c
P N F P i n
Similarly for N
int,p
and N
int,s
Parameters can be defined asint, int, int,
( / ( )) 0 ( ),
p p p
P N NF C N UN C N N Failure
Elseint, int,
( / ( )) 1
pp
P N NF C N
Andint, int, int,
( / ( )) 1 ( ),
p p p
P N F C N UN C N N Failure
Elseint, int,
( / ( )) 0
pp
P N F C N
If nc is the basic cell of Nc and pi is the reliability of the component Nc()
i
ci
P N NF P
and( ) 1 , 1....
i
c i c
P N F P i n
Similarly for N
int,p
and N
int,s
Parameters can be defined asint, int, int,
( / ( )) 0 ( ),
p p p
P N NF C N UN C N N Failure
Elseint, int,
( / ( )) 1
pp
P N NF C N
Andint, int, int,
( / ( )) 1 ( ),
p p p
P N F C N UN C N N Failure
Elseint, int,
( / ( )) 0
pp
P N F C N
int, int, int,
( / ( )) 1 ( ),
s s s
P N NF C N UN C N N NoFailure Elseint, int,
( / ( )) 0
ss
P N NF C N
Andint, int, int,
( / ( )) 1 ( ),
s s s
P N F C N UN C N N NoFailure
Elseint, int,
( / ( )) 1
ss
P N F C N
( / ( )) 1 ( ),
s s s
P N NF C N UN C N N NoFailure Elseint, int,
( / ( )) 0
ss
P N NF C N
Andint, int, int,
( / ( )) 1 ( ),
s s s
P N F C N UN C N N NoFailure
Elseint, int,
( / ( )) 1
ss
P N F C N
( ) 0.9
( ) 0.1, 1....4.
i
i
P C NF
P C F i
•LetX1cellbetheNcnode,interactionbetweenX2andX4beG1
asintermediatenode,interactionbetweenX3andX4beG2,
secondnodebeeitherG1orG2ofNint,p,
thirdintermediatenodebeNint,sandfinallydestinationor
outputnodeNout.
•NowtheBayesiannetworkdefinedoverQCAlatchaccordingtoabovestatements
Decision and utility nodes for evaluating logic1
probability at the output node which is 0.832
Decision and utility nodes for evaluating logic1
probability at the output node which is 0.822
( ) 0.1, 1....4.
i
i
P C NF
P C F i
•LetX1cellbetheNcnode,interactionbetweenX2andX4beG1
asintermediatenode,interactionbetweenX3andX4beG2,
secondnodebeeitherG1orG2ofNint,p,
thirdintermediatenodebeNint,sandfinallydestinationor
outputnodeNout.
•NowtheBayesiannetworkdefinedoverQCAlatchaccordingtoabovestatements
Decision and utility nodes for evaluating logic1
probability at the output node which is 0.832
Decision and utility nodes for evaluating logic1
probability at the output node which is 0.822
Cell X2FailureNo -
Failure
Cell X4 F
NF
F
NF
Fail
ure
1
0
0
0
No
fail
ure
0
1
1
1
CPT of node G2 due to X2 and X4
QCA cells (0.71 –1, 0.3 -0)
Cell X3 Failure No -
Failure
Cell X4 F
NF
F
NF
Failu
re
1
1
1
0
No
failur
e
0
0
0
1
CPT of node G1 due to X3 and X4 QCA cells
( 0.71 -1, 0.3 -0
•The failure of the whole system means that component X4 and cell G1 will surely fail.
•The element responsible for the failure of G1 is X3 and X4 with 71.00% of chances
against G2 with 29.00% of chances.
•So the system critical elements, in terms of reliability, are G1( X3 and X4) and X4
Failure
Cell X4 F
NF
F
NF
Fail
ure
1
0
0
0
No
fail
ure
0
1
1
1
CPT of node G2 due to X2 and X4
QCA cells (0.71 –1, 0.3 -0)
Cell X3 Failure No -
Failure
Cell X4 F
NF
F
NF
Failu
re
1
1
1
0
No
failur
e
0
0
0
1
CPT of node G1 due to X3 and X4 QCA cells
( 0.71 -1, 0.3 -0
•The failure of the whole system means that component X4 and cell G1 will surely fail.
•The element responsible for the failure of G1 is X3 and X4 with 71.00% of chances
against G2 with 29.00% of chances.
•So the system critical elements, in terms of reliability, are G1( X3 and X4) and X4
QCANOTcircuitwithCLOCKZone
C2
C3
C4
C1
Cells c2 Failure No -
Failure
Cells c3 F
NF
F
NF
Failur
e
1
0
0
0
No
failure
0
1
1
1
G2 = C2 || C3
G1 = C1 || G2
Cells c1 Failure No -
Failure
Cells G2 F NFF NF
Failur
e
1 11 0
No
failure
0 00 1
Cells c4 Failure No -
Failure
Cells G1 F
NF
F
NF
Failur
e
1
0
0
0
Nofail
ure
0
1
1
1
C2
C3
C4
C1
Cells c2 Failure No -
Failure
Cells c3 F
NF
F
NF
Failur
e
1
0
0
0
No
failure
0
1
1
1
G2 = C2 || C3
G1 = C1 || G2
Cells c1 Failure No -
Failure
Cells G2 F NFF NF
Failur
e
1 11 0
No
failure
0 00 1
Cells c4 Failure No -
Failure
Cells G1 F
NF
F
NF
Failur
e
1
0
0
0
Nofail
ure
0
1
1
1
C1,C2,C3andC4arenodesoftypeNc;
•G2isanodeoftypeNint,sformedbyregroupingthecomponentC1
actinparallelcomponentsC2andC3;
•G1isanodeoftypeNint,sformedbyregroupingthecomponentC1
andthesubsystemG2;
•FinallythesubsystemG1andthecomponentC4actinparallelonthesystemsothat
•thisoneisanodeoftypeNint,p
•ThefailureofthewholesystemmeansthatcomponentC4andsubsystemG1willsurely
fail.
•TheelementresponsibleforthefailureofG1isC1with91.74%ofchancesagainstG2
with9.17%ofchances.Sothesystemcriticalelements,intermsofreliability,areC1andC4.
•ThegroupofcellsinC1andC4havetobeexaminedtofindparticulardefectcellinterms
ofitsprobabilityofgettingcorrectpolarizationornot.
•ThesamewayanalysiscanbecarriedoutforQCAsystemtofinddefectivecells.
Summary :
•The reliability of QCA cell can be found using this Bayesian network of transforming
QCA circuits to its Bayesian framework.
•The QCA latch circuit failure is due to one of the intermediate nodes as its probability
decreases when it is a defect one, similarly QCA not circuit also is used to find
reliability of group of cells in serial and parallel arms.
•This can be extended for simulating errorless QCA systems
•G2isanodeoftypeNint,sformedbyregroupingthecomponentC1
actinparallelcomponentsC2andC3;
•G1isanodeoftypeNint,sformedbyregroupingthecomponentC1
andthesubsystemG2;
•FinallythesubsystemG1andthecomponentC4actinparallelonthesystemsothat
•thisoneisanodeoftypeNint,p
•ThefailureofthewholesystemmeansthatcomponentC4andsubsystemG1willsurely
fail.
•TheelementresponsibleforthefailureofG1isC1with91.74%ofchancesagainstG2
with9.17%ofchances.Sothesystemcriticalelements,intermsofreliability,areC1andC4.
•ThegroupofcellsinC1andC4havetobeexaminedtofindparticulardefectcellinterms
ofitsprobabilityofgettingcorrectpolarizationornot.
•ThesamewayanalysiscanbecarriedoutforQCAsystemtofinddefectivecells.
Summary :
•The reliability of QCA cell can be found using this Bayesian network of transforming
QCA circuits to its Bayesian framework.
•The QCA latch circuit failure is due to one of the intermediate nodes as its probability
decreases when it is a defect one, similarly QCA not circuit also is used to find
reliability of group of cells in serial and parallel arms.
•This can be extended for simulating errorless QCA systems
Fault tolerance of QCA circuits
Two major categories of fault occur during the assembly of QCA circuits.
1.First fault is due to displacement of cell from their intended location [44]
2.The second type of fault is due to defective nature of the cell itself.
3. The QCA cell displaced will be outside the radius of effect of its neighbour,
So that no longer contributing to the interaction among the cells.
4.A typical maximum distance at which interaction exists is 40 to 60nm.
The interaction between the cells are due to electrostatic quadruple –quadruple
interactions between adjacent cells of two free electron.
5. Defective cells will not interact in the same way as ideal cells. Here it is considered
that the cell itself is missing and it has no influence on its neighbours.
QCA circuits which are robust enough to function correctly in the presence of faults
are very important
Two major categories of fault occur during the assembly of QCA circuits.
1.First fault is due to displacement of cell from their intended location [44]
2.The second type of fault is due to defective nature of the cell itself.
3. The QCA cell displaced will be outside the radius of effect of its neighbour,
So that no longer contributing to the interaction among the cells.
4.A typical maximum distance at which interaction exists is 40 to 60nm.
The interaction between the cells are due to electrostatic quadruple –quadruple
interactions between adjacent cells of two free electron.
5. Defective cells will not interact in the same way as ideal cells. Here it is considered
that the cell itself is missing and it has no influence on its neighbours.
QCA circuits which are robust enough to function correctly in the presence of faults
are very important
The main goal is to design a gate that will work under limited no of potential defects.
A fault tolerance gate should be robust enough to continue to operate correctly in the
event so that one or more number of cells in the array are misaligned.
A simple 5 X 5 Fault tolerant QCA tile latches, inverters and Majority gates are proposed.
All the designs are tile based block circuits.
These designs allow some defects to be cancelled out by other cells that are in correct
state. The proposed design will work for limited number of faults.
Outpu
t
/inpu
t
6 7 8 9 10
1 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
2 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
3 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
4 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
5 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
A fault tolerance gate should be robust enough to continue to operate correctly in the
event so that one or more number of cells in the array are misaligned.
A simple 5 X 5 Fault tolerant QCA tile latches, inverters and Majority gates are proposed.
All the designs are tile based block circuits.
These designs allow some defects to be cancelled out by other cells that are in correct
state. The proposed design will work for limited number of faults.
Outpu
t
/inpu
t
6 7 8 9 10
1 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
2 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
3 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
4 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
5 0.92
9
0.99
4
0.98
1
0.99
4
0.9
3
QCA NOT
Gate
QCA Latch
Simulated
Waveforms
Gate
QCA Latch
Simulated
Waveforms
Direction of
movement
Up–‘U’Down
–‘D’
Left –
‘L’
Right -
‘R’
1 Inf --- Inf ---
2 --- --- Inf ---
3 --- --- Inf ----
4 --- Inf Inf 17 nm
5 ---- ---- ---- ---
6 ---- ---- 8 nm ----
7 ---- ---- 8 nm ----
8 8 nm ---- ---- ----
9 ---- 8 nm ---- ----
10 Inf ---- 17 nm17 nm
11 ---- ---- ---- 17 nm
12 ---- ---- ---- 17 nm
13 ---- Inf 8nm 17 nm
Input ---- ---- 34 nm----
output ---- ---- 8 nm 17 nm
Input cell can be shifted twice
its size towards left side and
output cell in inverter and
latch can be shifted right side
of maximum 17 nm
movement
Up–‘U’Down
–‘D’
Left –
‘L’
Right -
‘R’
1 Inf --- Inf ---
2 --- --- Inf ---
3 --- --- Inf ----
4 --- Inf Inf 17 nm
5 ---- ---- ---- ---
6 ---- ---- 8 nm ----
7 ---- ---- 8 nm ----
8 8 nm ---- ---- ----
9 ---- 8 nm ---- ----
10 Inf ---- 17 nm17 nm
11 ---- ---- ---- 17 nm
12 ---- ---- ---- 17 nm
13 ---- Inf 8nm 17 nm
Input ---- ---- 34 nm----
output ---- ---- 8 nm 17 nm
Input cell can be shifted twice
its size towards left side and
output cell in inverter and
latch can be shifted right side
of maximum 17 nm
QCA Majority gate
1.The displacement of the cells with input cells of maximum displacement of 34nm and
output cell of maximum 8 nm
2. This fault tolerance gate gives same output as that of the ordinary majority gate. The
same kind of analysis can be carried out for displacement of electron dots within the
cells and other device level parameters like radius of interaction cells, clocking zones of
the cells, no of cell displacement in a clock zone and electron migration etc.
3.Fault tolerance analysis will be able to find the defective cell that can be identified from
its polarization value.
1.The displacement of the cells with input cells of maximum displacement of 34nm and
output cell of maximum 8 nm
2. This fault tolerance gate gives same output as that of the ordinary majority gate. The
same kind of analysis can be carried out for displacement of electron dots within the
cells and other device level parameters like radius of interaction cells, clocking zones of
the cells, no of cell displacement in a clock zone and electron migration etc.
3.Fault tolerance analysis will be able to find the defective cell that can be identified from
its polarization value.
Direction of
movement
Up–‘U’Down –
‘D’
Left –
‘L’
Right -
‘R’
1 inf --- Inf ---
2 --- --- Inf 8nm
3 --- --- Inf 8nm
4 --- inf --- ----
5 inf 17nm ---- ---
6 8nm 8nm ---- ----
7 17nm inf ---- ----
8 ---- ---- 8nm 8nm
9 ---- ---- ---- ----
10 ---- ---- 8nm 8nm
11 inf 8nm ---- ---
12 8nm 8nm --------
13 8nm Inf --- ----
I1 input ---- ---- 34 nm----
I2 input Inf --- ---- ----
Control --- Inf ---- ----
output ---- ---- ----8 nm
Summary:
Displacement fault
tolerant circuit is
proposed for tile based
QCA circuits.
The simulation shows a
maximum of 34 nm
displacement for input
QCA cell and 8 nm output
QCA cell in majority and
inverter circuits gives
same results as that of
without displacement.
This analysis is helpful to
construct fault tolerant
QCA circuits.
movement
Up–‘U’Down –
‘D’
Left –
‘L’
Right -
‘R’
1 inf --- Inf ---
2 --- --- Inf 8nm
3 --- --- Inf 8nm
4 --- inf --- ----
5 inf 17nm ---- ---
6 8nm 8nm ---- ----
7 17nm inf ---- ----
8 ---- ---- 8nm 8nm
9 ---- ---- ---- ----
10 ---- ---- 8nm 8nm
11 inf 8nm ---- ---
12 8nm 8nm --------
13 8nm Inf --- ----
I1 input ---- ---- 34 nm----
I2 input Inf --- ---- ----
Control --- Inf ---- ----
output ---- ---- ----8 nm
Summary:
Displacement fault
tolerant circuit is
proposed for tile based
QCA circuits.
The simulation shows a
maximum of 34 nm
displacement for input
QCA cell and 8 nm output
QCA cell in majority and
inverter circuits gives
same results as that of
without displacement.
This analysis is helpful to
construct fault tolerant
QCA circuits.
6. Simulation of QCA Combinational and
Sequential Circuits.
1. QCA designer tool
2. Bistable Approximation Engine
-Circuit Representation -Majority Voting
Computation
-Two State Model ( Each Cell in Two states)
-Kink energy and Tunneling Energy Between the
Cells
-Hamiltonian Matrix ( Jacobi Algorithm)
Eigen Vectors and Eigen Values
-System close to the Ground State and state with lowest
Energy Chosen and set the input Polarization of cell.
-Polarization is Computed Until Entire system Converges
to Present Tolerance
Sequential Circuits.
1. QCA designer tool
2. Bistable Approximation Engine
-Circuit Representation -Majority Voting
Computation
-Two State Model ( Each Cell in Two states)
-Kink energy and Tunneling Energy Between the
Cells
-Hamiltonian Matrix ( Jacobi Algorithm)
Eigen Vectors and Eigen Values
-System close to the Ground State and state with lowest
Energy Chosen and set the input Polarization of cell.
-Polarization is Computed Until Entire system Converges
to Present Tolerance
1.QCA Combinational Circuit
(Majority Logic Reduction Voting Scheme)
Full adder
Arithmetic Logic Unit –Two bit
Multiplexers
Carry look ahead adders
Multiplexers.
QCA Sequential Circuit.
QCA Sequential Circuit
One Hot State Machine
Two Phase Clock Generators
Semaphore ( Resource Allocation Circuits)
Flip Flops
(Majority Logic Reduction Voting Scheme)
Full adder
Arithmetic Logic Unit –Two bit
Multiplexers
Carry look ahead adders
Multiplexers.
QCA Sequential Circuit.
QCA Sequential Circuit
One Hot State Machine
Two Phase Clock Generators
Semaphore ( Resource Allocation Circuits)
Flip Flops
QCA ALU –Two Bit Logical Operations
Arithmetical
Operation
Clock 0 –Input
Clock 1,2-Majority
Computation
Clock 3 -Output
8 Majority gates
and 4 Inverters
494 cells, 0.92 µm
2
20 s (ns)
Arithmetical
Operation
Clock 0 –Input
Clock 1,2-Majority
Computation
Clock 3 -Output
8 Majority gates
and 4 Inverters
494 cells, 0.92 µm
2
20 s (ns)
Y = a + b -OR
Y = m(a,b,+1) -QCA OR
Y = a.b -AND
Y = m(a,b,-1) -QCA AND
Y = (a.b)’ -NAND
Y = m(a’,b’,-1) -QCA NAND
Y = (a + b)’ -NOR
Y = m(a’,b’,+1) -QCA NOR
Y = a at clock 0
Y = a b’+ a’b -Sum
Y = m( m(a,b’,-1), m(a’,b,-1),+1) -QCA Sum
Y = a.b-Carry
Y = m(a,b,-1) -QCA Carry
Y = a b’+ a’b -Borrow
Y = m( m(a,b’,-1), m(a’,b,-1),+1)
-QCA Borrow
Y = a’b -Difference
Y = m(a’,b,-1) -QCA Difference
Y = m(a,b,+1) -QCA OR
Y = a.b -AND
Y = m(a,b,-1) -QCA AND
Y = (a.b)’ -NAND
Y = m(a’,b’,-1) -QCA NAND
Y = (a + b)’ -NOR
Y = m(a’,b’,+1) -QCA NOR
Y = a at clock 0
Y = a b’+ a’b -Sum
Y = m( m(a,b’,-1), m(a’,b,-1),+1) -QCA Sum
Y = a.b-Carry
Y = m(a,b,-1) -QCA Carry
Y = a b’+ a’b -Borrow
Y = m( m(a,b’,-1), m(a’,b,-1),+1)
-QCA Borrow
Y = a’b -Difference
Y = m(a’,b,-1) -QCA Difference
Simulated Waveform of Two bit ALU
No of Cells Used for Simulation –494 cells
Area in micro meter square –0.92 m
2
Time for Simulation –19s (ns)
Advantages –Functional circuit on either side
of Inputs.
Design Easily adaptable for Block Circuits
Error Occurrence due to Interference Can
be reduced.( Fault Tolerance)
Area in micro meter square –0.92 m
2
Time for Simulation –19s (ns)
Advantages –Functional circuit on either side
of Inputs.
Design Easily adaptable for Block Circuits
Error Occurrence due to Interference Can
be reduced.( Fault Tolerance)
QCA Carry Look ahead Adder
One Bit adder
G0 = m(a,b,-1)
P0 = m(a,b,+1)
Cout = m(G0,m(P0,Co,-1),+1)
Soo = m(m(P0’,Co,-1),m(P0,Co’,-),+1)
194 cells and 0.4 µm
2
, 4
Inverters and 7 Majority gates
One Bit adder
G0 = m(a,b,-1)
P0 = m(a,b,+1)
Cout = m(G0,m(P0,Co,-1),+1)
Soo = m(m(P0’,Co,-1),m(P0,Co’,-),+1)
194 cells and 0.4 µm
2
, 4
Inverters and 7 Majority gates
Full adder Four Way Multiplexer
154 cells, 0.2 µm
2
,6 s(ns), 3
Majority gates and one
inverter
260 cells, 0.3 µm
2
, 6 Majority
gates and two inverters
154 cells, 0.2 µm
2
,6 s(ns), 3
Majority gates and one
inverter
260 cells, 0.3 µm
2
, 6 Majority
gates and two inverters
Two Phase Clock
Generator
0.45 µm
2
, 175 cells,
4 Majority gates
and 7 Inverters
Generator
0.45 µm
2
, 175 cells,
4 Majority gates
and 7 Inverters
D
FF
D
FF
D
FF
Reset
AND MV
State 0
State 1
State 2
One Hot State Machine
Simulated Waveform
FF
D
FF
D
FF
Reset
AND MV
State 0
State 1
State 2
One Hot State Machine
Simulated Waveform
1. QCA Combinational and Sequential circuits are constructed and
designed to optimize number of cells and adapt for block based
design with minimum number of inverters and Majority gates.
2. These circuits forms the building block of Microprocessors and
Quantum Computers.
designed to optimize number of cells and adapt for block based
design with minimum number of inverters and Majority gates.
2. These circuits forms the building block of Microprocessors and
Quantum Computers.
Analysis of Energy Flow and Power Dissipation
1. Quantum Mechanical Calculation for Energy Flow and Power
dissipation Analysis
2. QCA Majority OR gate, QCA wire, Inverter and Multiplexers are
considered as example to study steady state energy flow analysis and to
find theoretical power gain and dissipation in these circuits.
3. . QCA circuits are made up of Fan –in and Fan –out circuits, so the
energy analysis in terms of supplied clock energy for simple 1:9, 1:16
Fan-out and 8:1 Fan –in circuit are studied
4. Theoretical power gain and Capacitance Charge-Voltage plots are
plotted to study the power gain of QCA circuit.
5. Investigation on the effect of point charge on a QCA cell is studied
with respect to distance and also taken in to consideration of the effect
of nearby QCA cell alignment with diagonally and horizontally along with
X-axis of another QCA cell
1. Quantum Mechanical Calculation for Energy Flow and Power
dissipation Analysis
2. QCA Majority OR gate, QCA wire, Inverter and Multiplexers are
considered as example to study steady state energy flow analysis and to
find theoretical power gain and dissipation in these circuits.
3. . QCA circuits are made up of Fan –in and Fan –out circuits, so the
energy analysis in terms of supplied clock energy for simple 1:9, 1:16
Fan-out and 8:1 Fan –in circuit are studied
4. Theoretical power gain and Capacitance Charge-Voltage plots are
plotted to study the power gain of QCA circuit.
5. Investigation on the effect of point charge on a QCA cell is studied
with respect to distance and also taken in to consideration of the effect
of nearby QCA cell alignment with diagonally and horizontally along with
X-axis of another QCA cell
Energy Analysis of Two QCA Cell1
( ) ( . )
32
h
E H Tr H
Let λ’ be the coherence vector and ρ’ be the density matrix
of quantum cells as defined [45]
H –Hamiltonian Matrix of j
th
Cell, γ be the tunneling energy
between two polarized states ( p =1 and p = -1)
Ec be the potential energy, Ek be the kink energy [46][47] ( ')( ( ) ( ))
)'
2
ts
ss
diss
t
t t th
E dt
( ')1 ( ')
3 ' 2 '
ts
c
clock
t
dE th d t
E
dt dt
2
( ')
()
2'
ts
kx
in
t
hE dP t
E t dt
dt
1
( ')
()
2'
ts
kx
out
t
hE dP t
E t dt
dt
E
net= E
in + E
clock+E
out+ E
diss
( ) ( . )
32
h
E H Tr H
Let λ’ be the coherence vector and ρ’ be the density matrix
of quantum cells as defined [45]
H –Hamiltonian Matrix of j
th
Cell, γ be the tunneling energy
between two polarized states ( p =1 and p = -1)
Ec be the potential energy, Ek be the kink energy [46][47] ( ')( ( ) ( ))
)'
2
ts
ss
diss
t
t t th
E dt
( ')1 ( ')
3 ' 2 '
ts
c
clock
t
dE th d t
E
dt dt
2
( ')
()
2'
ts
kx
in
t
hE dP t
E t dt
dt
1
( ')
()
2'
ts
kx
out
t
hE dP t
E t dt
dt
E
net= E
in + E
clock+E
out+ E
diss
QCA Majority Gate
QCA Multiplexer
QCA Multiplexer
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
Ein Eout Eclock Edissip
Energy
E/Ek
Steady State Energy Flow
KT ln(2) / Ek
-1.5
-1.2
-0.9
-0.6
-0.3
0
0.3
0.6
0.9
1.2
1.5
Ein Eout Eclock Edissip
Energy
E/Ek
QCA Majority
Gate
KT ln(2) / Ek
-1.5
-1.2
-0.9
-0.6
-0.3
0
0.3
0.6
0.9
1.2
1.5
Ein Eout Eclock Edissip
Energy
E/Ek
QCA Majority
Gate, Input
Changes (1,-1,1)
-2
-1.5
-1
-0.5
0
0.5
1
1.5
1 2 3 4 5 6 7
Column number
Eclock / Ek
With energy dissipation
Without energy
Dissipation
QCA Nand gate,
Ec / Ek Ratio
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
Ein Eout Eclock Edissip
Energy
E/Ek
Steady State Energy Flow
KT ln(2) / Ek
-1.5
-1.2
-0.9
-0.6
-0.3
0
0.3
0.6
0.9
1.2
1.5
Ein Eout Eclock Edissip
Energy
E/Ek
QCA Majority
Gate
KT ln(2) / Ek
-1.5
-1.2
-0.9
-0.6
-0.3
0
0.3
0.6
0.9
1.2
1.5
Ein Eout Eclock Edissip
Energy
E/Ek
QCA Majority
Gate, Input
Changes (1,-1,1)
-2
-1.5
-1
-0.5
0
0.5
1
1.5
1 2 3 4 5 6 7
Column number
Eclock / Ek
With energy dissipation
Without energy
Dissipation
QCA Nand gate,
Ec / Ek Ratio
-4
-2
0
2
4
1 2 3 4 5 6
Column number
Eclock / Ek
Without energy dissipation
With energy dissipation
QCA Mux
Kink Energy Ek = 0.3 eV,
tunneling energy in terms of Ek γ = 0.5 Ek to 1.5 Ek
and relaxation time τ = 3.3 X 10-16 s
QCA Fan –In, Fan –out Circuit
Energy Analysis
-2
0
2
4
1 2 3 4 5 6
Column number
Eclock / Ek
Without energy dissipation
With energy dissipation
QCA Mux
Kink Energy Ek = 0.3 eV,
tunneling energy in terms of Ek γ = 0.5 Ek to 1.5 Ek
and relaxation time τ = 3.3 X 10-16 s
QCA Fan –In, Fan –out Circuit
Energy Analysis
0
0.5
1
1.5
2
2.5
3
3.5
12345678910
column number
Eclock / Ek
0
2
4
6
8
135791
1
1315
Column number
Eclock / Ek0
0.5
1
1.5
2
2.5
1234567891011121314
column numbers
Eclock / Ek
Energy Flow in 1:9 Fan-out Circuit
1:16 QCA Fan-out circuit
8:1 Fan –in QCA circuit
1.1:9 fan-out a total energy of 4Ek supplied
by the clock -at column 4 and 8 ( 1:9 Fanout)
has Ec/Ek and 3Ec/Ek
2.1:16 Fan-out circuit total energy supplied by
clock is 7.5Ek -at 7 and 13 column has
1 Ec/Ek and 6 Ec/ Ek
3.Fan in circuit, in Column 5 two line of information is
transformed to one line so energy required be only
Ek from 2Ek, at column no 9, Ek /2 energy required
to split two line of information to one line and at last
column no 14 requires only Ek /4 amount of energy,
4. The energy analysis is useful to find power dissipation
and any error due to polarization etc can be
detected and analyzed
0.5
1
1.5
2
2.5
3
3.5
12345678910
column number
Eclock / Ek
0
2
4
6
8
135791
1
1315
Column number
Eclock / Ek0
0.5
1
1.5
2
2.5
1234567891011121314
column numbers
Eclock / Ek
Energy Flow in 1:9 Fan-out Circuit
1:16 QCA Fan-out circuit
8:1 Fan –in QCA circuit
1.1:9 fan-out a total energy of 4Ek supplied
by the clock -at column 4 and 8 ( 1:9 Fanout)
has Ec/Ek and 3Ec/Ek
2.1:16 Fan-out circuit total energy supplied by
clock is 7.5Ek -at 7 and 13 column has
1 Ec/Ek and 6 Ec/ Ek
3.Fan in circuit, in Column 5 two line of information is
transformed to one line so energy required be only
Ek from 2Ek, at column no 9, Ek /2 energy required
to split two line of information to one line and at last
column no 14 requires only Ek /4 amount of energy,
4. The energy analysis is useful to find power dissipation
and any error due to polarization etc can be
detected and analyzed
Power dissipation in QCA circuits21
12
2
( ) ( )
2
new x x new
diss old new k x x
k old new
P P P
E E P P
E P P
21
12
21
( ( ) ( ))
2
new x x new
diss old new k x x
k old new
P P P
P E P P
E P P
The total power dissipation in QCA circuit occurs not only by the polarization change
but due to clocking (raising and lowering the barriers) also.
0
10
20
30
40
1 2 3 4 5
coloumn number
Pd in Milli eV / Sec
Power dissipation in Majority logic for 111 to 111 switching
0
20
40
60
1 2 3 4 5
Column number
Pd in Milli eV / Sec
Power dissipation in Majority logic for 110 to 111 switching
33 Mill
eV
41 Mill
eV
12
2
( ) ( )
2
new x x new
diss old new k x x
k old new
P P P
E E P P
E P P
21
12
21
( ( ) ( ))
2
new x x new
diss old new k x x
k old new
P P P
P E P P
E P P
The total power dissipation in QCA circuit occurs not only by the polarization change
but due to clocking (raising and lowering the barriers) also.
0
10
20
30
40
1 2 3 4 5
coloumn number
Pd in Milli eV / Sec
Power dissipation in Majority logic for 111 to 111 switching
0
20
40
60
1 2 3 4 5
Column number
Pd in Milli eV / Sec
Power dissipation in Majority logic for 110 to 111 switching
33 Mill
eV
41 Mill
eV
0
20
40
60
80
100
120
140
1
3
5
7
9
Column number
Pd in Milli eV /sec
Power dissipation in each cell of 2:1 Mux in switching
110 to 111
118 Milli eV at column
no 5
Equivalent cell representation of Single
Majority gate of QCA cell [49][50]
1 2 3 4 5 6
7
Coloum numbers
A B C
Control inputs
-1
+1 +1
+1
Power Gain Calculation of Serial
Majority Gate
20
40
60
80
100
120
140
1
3
5
7
9
Column number
Pd in Milli eV /sec
Power dissipation in each cell of 2:1 Mux in switching
110 to 111
118 Milli eV at column
no 5
Equivalent cell representation of Single
Majority gate of QCA cell [49][50]
1 2 3 4 5 6
7
Coloum numbers
A B C
Control inputs
-1
+1 +1
+1
Power Gain Calculation of Serial
Majority Gate
0
()
( ). .
t
L
dQ t
W VdQ V t dt
dt
Where VL(t) is voltage applied to the lead of majority gate,
Q(t) be the charge on the capacitor coupling due to voltage applied.
V1= V2 = V3 = V4 = 100 v, R1 = R2 = R3 = R4 = 200Kout
out
inin
W
P
T
Powergain
WP
T
Voltage across center cell
Input voltages to the center
QCA cell in Majority AND gate
()
( ). .
t
L
dQ t
W VdQ V t dt
dt
Where VL(t) is voltage applied to the lead of majority gate,
Q(t) be the charge on the capacitor coupling due to voltage applied.
V1= V2 = V3 = V4 = 100 v, R1 = R2 = R3 = R4 = 200Kout
out
inin
W
P
T
Powergain
WP
T
Voltage across center cell
Input voltages to the center
QCA cell in Majority AND gate
voltages in millivolts vs. time in
microseconds
with clock applied to Majority gate
QCA circuit
Theoretical Q-V plot of
QCA cell for 50 and
100 µ Volts
Power Gain
Calculated from
Q-V Plots
microseconds
with clock applied to Majority gate
QCA circuit
Theoretical Q-V plot of
QCA cell for 50 and
100 µ Volts
Power Gain
Calculated from
Q-V Plots
Point charge effect in a QCA circuit
QCA Wire with 5nm Horizontal / Vertical displacement
1.Coulombic interaction between the cell decays as the distance increases, but within
certain distance say 2 to 10 nm the unwanted cells could interact to neighboring cells
that affects its polarization.
2.Assume a 0.3e (q) affects the polarization of a cell and study the cell response with
this point charge with respect to a distance is analyzed and simulated using QCA
designer tool.
Interaction between X2 and X1 QCA
cell with 5nm displacement
Interaction between X2 and X1 QCA
cell with 10nm displacement
QCA Wire with 5nm Horizontal / Vertical displacement
1.Coulombic interaction between the cell decays as the distance increases, but within
certain distance say 2 to 10 nm the unwanted cells could interact to neighboring cells
that affects its polarization.
2.Assume a 0.3e (q) affects the polarization of a cell and study the cell response with
this point charge with respect to a distance is analyzed and simulated using QCA
designer tool.
Interaction between X2 and X1 QCA
cell with 5nm displacement
Interaction between X2 and X1 QCA
cell with 10nm displacement
X1 and X2 30 nm displacement
QCA cell with the position of electron dots
Polarization versus position of
point charge
Horizontal Alignment
with 10 nm
Diagonal Alignment
with 10 nm
QCA Wire 5 nm displacement
QCA cell with the position of electron dots
Polarization versus position of
point charge
Horizontal Alignment
with 10 nm
Diagonal Alignment
with 10 nm
QCA Wire 5 nm displacement
QCA Wire with 10 nm diagonal
displacement
X1QCAcellandX2QCAcellaligned
alongX-axis10nmdistance
s.
n
o
Distancebet
x1andx2in
nm Aligned
withX-axis
Polariz
ationof
X1(+1)
Polarizat
ionof
X2(+1)
1Lessthan2 0.987 0.389
22 0.98 0.382
35 0.969 0.362
48 0.961 0.102
510 0.958 0.081
615 0.954 0.019
720 0.954 0.001
830 0.954 0
s.noDistancebetx1
andx2innm
DiagonalwithX-
axis
Polarizati
on of
X1(+1)
Polarizati
onofX2
(+1)
1 Lessthan2 0.963 0.928
2 2 0.958 0.892
3 5 0.957 0.716
4 8 0.955 0.524
5 10 0.954 0.381
6 15 0.954 0.013
7 20 0.954 0.001
8 30 0.954 0
polarization of QCA cell X1 and X2 aligned diagonally as well aligned
X-axis with distance ranging between 2 nm to 30 nm
displacement
X1QCAcellandX2QCAcellaligned
alongX-axis10nmdistance
s.
n
o
Distancebet
x1andx2in
nm Aligned
withX-axis
Polariz
ationof
X1(+1)
Polarizat
ionof
X2(+1)
1Lessthan2 0.987 0.389
22 0.98 0.382
35 0.969 0.362
48 0.961 0.102
510 0.958 0.081
615 0.954 0.019
720 0.954 0.001
830 0.954 0
s.noDistancebetx1
andx2innm
DiagonalwithX-
axis
Polarizati
on of
X1(+1)
Polarizati
onofX2
(+1)
1 Lessthan2 0.963 0.928
2 2 0.958 0.892
3 5 0.957 0.716
4 8 0.955 0.524
5 10 0.954 0.381
6 15 0.954 0.013
7 20 0.954 0.001
8 30 0.954 0
polarization of QCA cell X1 and X2 aligned diagonally as well aligned
X-axis with distance ranging between 2 nm to 30 nm
1.WhenX1andX2arealignedinX-axisthenthepolarizationofX2withX1isgreater
thanthepolarizationwhenX2isindiagonal,hencepolarizationvaluedecreases
diagonallywhenanegativechargeof-0.3eapproachestheQCAcell.
2.WhenX1andX2cellislessthan2nm,X1polarizationvalueis0.963andX2
polarizationvalueis0.553,X2givesinvertedsignaldueto45oalignmentwithX1,as
distanceincreasespolarizationofX1andX2decreases.
3.Whenapointchargeisdiagonallyalignedwith1and3or2and4dotsandata
distanceof50to65nm(towardsorawayfromthecell)thepolarizationofX1QCAcellis
maximumandeffectofpointchargeonX2polarizationisminimum.Whentheexternal
positivepointchargeapproachestheQCAcellthepolarizationoftheX2cellincreases.
4.ThereforetheexternalmovablechargeaffectsthepolarizationofQCAcelland
dependingonthepolarizationofQCAcellitispossibletodetectwhetherthecharges
arepositiveornegative.
Simulation Results
thanthepolarizationwhenX2isindiagonal,hencepolarizationvaluedecreases
diagonallywhenanegativechargeof-0.3eapproachestheQCAcell.
2.WhenX1andX2cellislessthan2nm,X1polarizationvalueis0.963andX2
polarizationvalueis0.553,X2givesinvertedsignaldueto45oalignmentwithX1,as
distanceincreasespolarizationofX1andX2decreases.
3.Whenapointchargeisdiagonallyalignedwith1and3or2and4dotsandata
distanceof50to65nm(towardsorawayfromthecell)thepolarizationofX1QCAcellis
maximumandeffectofpointchargeonX2polarizationisminimum.Whentheexternal
positivepointchargeapproachestheQCAcellthepolarizationoftheX2cellincreases.
4.ThereforetheexternalmovablechargeaffectsthepolarizationofQCAcelland
dependingonthepolarizationofQCAcellitispossibletodetectwhetherthecharges
arepositiveornegative.
Simulation Results
QCA Application Specific Regular Architecture
P: {0 … 2
e
–1}
4
{0 …2
e
–1}
O -Operational Block
I -Interface and C -Connection Block4
:{(0,1) } {0....2 1}
x
i
F 1 1 1 1
( ( ( )), ( ( )), ( ( )), ( ( )))
n i m right n m up n m left n m down n
E F I E left I E down I E left I E left
1 1 1 1
( ( ), ( ), ( ), ( ))
n n n n n
E P E left E down E right E up
En, En-1 –Functional Block states, P -Polarization
The state of functional blocks can be
determined at the end of clock cycle
as the function of Neighboring functional
Block in the previous clock cycles
P: {0 … 2
e
–1}
4
{0 …2
e
–1}
O -Operational Block
I -Interface and C -Connection Block4
:{(0,1) } {0....2 1}
x
i
F 1 1 1 1
( ( ( )), ( ( )), ( ( )), ( ( )))
n i m right n m up n m left n m down n
E F I E left I E down I E left I E left
1 1 1 1
( ( ), ( ), ( ), ( ))
n n n n n
E P E left E down E right E up
En, En-1 –Functional Block states, P -Polarization
The state of functional blocks can be
determined at the end of clock cycle
as the function of Neighboring functional
Block in the previous clock cycles
Memory Element with MUX
Memory
Element
Simulated Waveform
With
Interface
Element
Memory
Element
Simulated Waveform
With
Interface
Element
Computation of operation
block, interface block
QCA circuit and states
partitioning
Formation of QCA Array
patterns
Rules extraction for QCA
circuit
Rules composition
Connection checking
ASIC Design Methodology
1.Operational and Interface Blocks are constructed
using A star Algorithm
2.Operational Block (Functional) is computed using
Majority Voting Scheme
3.Partition of QCA Circuit as Connection element and
Operational element.
4.Adding Fault tolerance to the architecture
5.Rules to be formed to design computational models.
6.The geometry of the circuit considered are the
symmetric and isotropic characteristic of patterns
produced in nanoscale that leads to propagation of
information in an array .
7.These rules are framed with the patterns in forms of
array in order to have successive transformation of
information in QCA arrays. Therefore the rule
composition information can be translated in to
functional block structure
8.This proposed design flow may find useful to design
QCA array circuits and leads to the development of
ASIC methodology in nanotechnology
block, interface block
QCA circuit and states
partitioning
Formation of QCA Array
patterns
Rules extraction for QCA
circuit
Rules composition
Connection checking
ASIC Design Methodology
1.Operational and Interface Blocks are constructed
using A star Algorithm
2.Operational Block (Functional) is computed using
Majority Voting Scheme
3.Partition of QCA Circuit as Connection element and
Operational element.
4.Adding Fault tolerance to the architecture
5.Rules to be formed to design computational models.
6.The geometry of the circuit considered are the
symmetric and isotropic characteristic of patterns
produced in nanoscale that leads to propagation of
information in an array .
7.These rules are framed with the patterns in forms of
array in order to have successive transformation of
information in QCA arrays. Therefore the rule
composition information can be translated in to
functional block structure
8.This proposed design flow may find useful to design
QCA array circuits and leads to the development of
ASIC methodology in nanotechnology
QCA Field Programmable Gate Arrays
Modules ModuleModule
Module Module Module
Vertical
lines
Horizontal lines 2 X 2 Routing element [51]
3 X 3 Routing Element
Modules ModuleModule
Module Module Module
Vertical
lines
Horizontal lines 2 X 2 Routing element [51]
3 X 3 Routing Element
QCA FPGA –NOR Logic elements
L L
R R R
R
R R R
2 X 2 Routing
Element [52]
L L
R R R
R
R R R
2 X 2 Routing
Element [52]
QCA FPGA Sum Function
using NOR
Simulated Waveform
using NOR
Simulated Waveform
Multiplexer Based QCA FPGA
Quantum logic gates using QCA Arrays
C-Not gate
a0 a0
a1
a0 (+) a1
Not Majority logic
Detection
a0 a1 a1’a
1’
a0a1’a0 a0(+)
a1
Inpu
t
Inpu
t
Inv.I
p
Majorit
y
logi
c
Outpu
t
Outpu
t
0 0 1 10 1 0 1
0 1 0 00 0 0 0
1 0 1 11 1 1 1
1 1 0 01 0 1 0
Simulated
Waveform
Truth Table [56]
C-Not gate
a0 a0
a1
a0 (+) a1
Not Majority logic
Detection
a0 a1 a1’a
1’
a0a1’a0 a0(+)
a1
Inpu
t
Inpu
t
Inv.I
p
Majorit
y
logi
c
Outpu
t
Outpu
t
0 0 1 10 1 0 1
0 1 0 00 0 0 0
1 0 1 11 1 1 1
1 1 0 01 0 1 0
Simulated
Waveform
Truth Table [56]
Feyman Gate, CC-Not gate [57]
Simulated Waveform
Simulated Waveform
Reversible adder circuit
Reversible Operation for
Sum
Summary
•QCA ASIC and QCA
FPGA Circuits are
Constructed using
Complex Gate Structure
•Waveforms are
Simulated and Verified
•Quantum Logic gates for
Reversible Computation
is discussed.
Reversible Operation for
Sum
Summary
•QCA ASIC and QCA
FPGA Circuits are
Constructed using
Complex Gate Structure
•Waveforms are
Simulated and Verified
•Quantum Logic gates for
Reversible Computation
is discussed.
•The partially populated QCA cells are used effectively using Tile based design
methodology by employing QCA A star search algorithm. Hence the speed and
the performance of the QCA circuit increases. The speed of up to 98% is achieved in its
polarization value.
•The second type of design is based on single gate structure in which all logical
functions are simulated using a single structure. This complex gate structure has one to
five inputs with three to one output structure. This ensures that complex gate based
single structure can be used as a FPGA Module in QCA FPGA
•Majority voting logic reduction of optimizing number of cells using Boolean equations is
also designed and it is proved that for QCA full subtractor the reduction of 144 cells)
compared to 154 cells in Boolean equation based designs. Hence the optimization in
area and reduction of 12 cells increases the speed of computation
•Modeling of single QCA cell and array of QCA cells have been done by solving Time
independent Schrödinger wave equation using hermite polynomials Statistical quantum
mechanical treatment method is applied for QCA Majority gate. The results shows that
011 curve has higher polarization (0.97) compared to other curves. When the distance
between the cells increases, the polarization value decreases and also cell to cell
distance is equal to inter-dot distance ( L = d = 10nm), stable polarization of output cell is
achieved with respect to its driver cell
Conclusion :
methodology by employing QCA A star search algorithm. Hence the speed and
the performance of the QCA circuit increases. The speed of up to 98% is achieved in its
polarization value.
•The second type of design is based on single gate structure in which all logical
functions are simulated using a single structure. This complex gate structure has one to
five inputs with three to one output structure. This ensures that complex gate based
single structure can be used as a FPGA Module in QCA FPGA
•Majority voting logic reduction of optimizing number of cells using Boolean equations is
also designed and it is proved that for QCA full subtractor the reduction of 144 cells)
compared to 154 cells in Boolean equation based designs. Hence the optimization in
area and reduction of 12 cells increases the speed of computation
•Modeling of single QCA cell and array of QCA cells have been done by solving Time
independent Schrödinger wave equation using hermite polynomials Statistical quantum
mechanical treatment method is applied for QCA Majority gate. The results shows that
011 curve has higher polarization (0.97) compared to other curves. When the distance
between the cells increases, the polarization value decreases and also cell to cell
distance is equal to inter-dot distance ( L = d = 10nm), stable polarization of output cell is
achieved with respect to its driver cell
Conclusion :
•Evolutionary algorithms like genetic algorithm and artificial neural networks like
Hopfield network are used to model and find stability of quantum cellular automata
circuits. Genetic algorithm is chosen to compare and identify defective QCA cell with the
best QCA cell in terms of its energy values
•The advantage of using Hopfield Neural network is the ability to show the majority
computation and reflection of one of the input polarization value to middle and output cel
•Probability modeling of QCA circuit using Bayesian network is to study about probability
of getting correct output in QCA circuits. Clustering, Likelihood, Logic and Importance
sampling Inference algorithm are framed for QCA circuits, in which importance sampling
algorithms gives highest polarization value of 0.78 compare to other algorithms.
•Reliability analysis on simple QCA circuits like majority gates, latches and inverters are
carried out to find the circuit failure and to identify the errors due to polarization of QCA
cell. Displacement fault tolerant circuit is proposed for tile based QCA circuits. The
simulation shows a maximum of 34 nm displacement for input QCA cell and 8 nm output
QCA cell in majority and inverter circuits.
•QCA Majority gate and inverter are building blocks of QCA system. Majority voting
scheme is applied to combinational and sequential QCA circuits and algorithms are
framed. Optimized combinational and sequential circuits are simulated using QCA
designer tool
Hopfield network are used to model and find stability of quantum cellular automata
circuits. Genetic algorithm is chosen to compare and identify defective QCA cell with the
best QCA cell in terms of its energy values
•The advantage of using Hopfield Neural network is the ability to show the majority
computation and reflection of one of the input polarization value to middle and output cel
•Probability modeling of QCA circuit using Bayesian network is to study about probability
of getting correct output in QCA circuits. Clustering, Likelihood, Logic and Importance
sampling Inference algorithm are framed for QCA circuits, in which importance sampling
algorithms gives highest polarization value of 0.78 compare to other algorithms.
•Reliability analysis on simple QCA circuits like majority gates, latches and inverters are
carried out to find the circuit failure and to identify the errors due to polarization of QCA
cell. Displacement fault tolerant circuit is proposed for tile based QCA circuits. The
simulation shows a maximum of 34 nm displacement for input QCA cell and 8 nm output
QCA cell in majority and inverter circuits.
•QCA Majority gate and inverter are building blocks of QCA system. Majority voting
scheme is applied to combinational and sequential QCA circuits and algorithms are
framed. Optimized combinational and sequential circuits are simulated using QCA
designer tool
•Energy flow analysis is carried out using quantum mechanics calculation to find
the energy flow equation in QCA circuits. It is found that unequal inputs to QCA
circuit have higher power dissipation than equal inputs due to erasure of inputs.
•DesignedQCAcircuitsareinvestigatedforFPGAandASICapplications.Finallythe
useofQCAasquantumlogicgatesandreversiblecircuitsforQuantumcomputers
arediscussed.
the energy flow equation in QCA circuits. It is found that unequal inputs to QCA
circuit have higher power dissipation than equal inputs due to erasure of inputs.
•DesignedQCAcircuitsareinvestigatedforFPGAandASICapplications.Finallythe
useofQCAasquantumlogicgatesandreversiblecircuitsforQuantumcomputers
arediscussed.
References :
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Appl. Phys. Lett., vol. 77,no. 2,2000, PP 295–297.
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Appl. Phys. Lett., vol. 77, no. 5, pp. 738–740,2000.
[14] P. D. Tougaw and C. S. Lent, “Logical devices implemented using quantum cellular automata,”
J. Appl. Phys., vol. 75, no. 3, 1994,pp. 1818–1825.
[15] www.qcadesigner.ca
[16] CSLent,Douglas Toughaw “Bistable saturation due to single electron charging in rings of tunnel junctions”
J.app.physics, vol 75 April 1994, PP 4077 –4081.
[17] C.S.Lent, P. D. Tougaw, W. Porod, and G. H. Bernstein, “Quantum cellular automata,”
Nanotechnol., vol. 4, 1993,PP 49–57.
[18]J.Huang, M.Momenzadeh, L. Schiano and F. Lombardi, “Simulation-based Design of
Modular QCA Circuits”,in Proc. of IEEE Conference on Nanotechnology, 2005, Vol -1, PP 201 –210.
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quantum-dot cellular automata shift register,” Surface Science, vol. 532, 2003, PP 1193–1198.
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2006, PP 786-791
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Journal of Nanoparticle Research, vol. 3,2001, PP 27–37.
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University Collage London. UK, 1998.
[22] R.Zhang, K.Walus “A Method of Majority logic reduction for Quantum cellular auomata”
IEEE transaction on nanotechnology vol 3,N0.4 Dec 2004, PP 443 -450.
[23].P.douglas CS lent “Dynamic behavior of QCA” in journal of applied physics vol -80, No –8,October 1996, pp 4722-37.
[24] Saket Srivastava and Sanjukta Bhanja “Hierarchical Bayesian Macromodeling for QCA Circuits”
in12th NASA Symposium on VLSI Design, Coeur d’Alene, Idaho, USA, Oct. 4-5, 2005, PP 1-11.
[25]Saket Srivatsava and Sanjukta Bhanja “Probabilistic Modeling of QCA Circuits using Bayesian Networks”
in IEEE transactions on nanotechnology vol-4,2006, PP 43 –78.
[26] Pauli wolfgang Book on “ Wave mechanics”, Dovar public 2000 edition, PP 52 -64.
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Journal of Applied Physics, vol. 91, January 2002, PP 823 -831.
[28] G.Bernstein L Amlani , A.Orlov, C.S.Lent and G.Snider “Observation of switching in Quantum cellular automata cell”,
Nanotechnology, Vol –10, June 1999, PP -166 -173.
[29] M.Govemalc, M.Macucci G.Iannaccone, C.Ungarelli and J.Marrorell “ Modelling and manufacturing
assessment of bistabel quantum dot cells” J.Applied Physics vol-85, Mar –1999, PP 2952 –2971.
[30] Z.StryCharski, J.Cislo “The non universal Ising model with nearest neighbor interactions on a ferromagnetic square lattice”
Journal of . C Solid state Physics Vol 21,Dec-1986, PP 1115-1118
[31]M.Lieberman,S.Chellama,B.Varughese,Y.Wang,C.S.Lent,G.Bernestien,G.Snider, and F.Peiris “
Quantum dot cellular automata at molecular scale” in Molecular Electronics II New York Academic Sciences 2002 . Vol 960
PP 225 -239
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Automatic design of electronic circuits and systems by genetics algorithm CRC Press 2002
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European journal of operation research, vol 140, 2002, pp -606 -617.
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[35] Orlov, R. Kummamuru, R. Ramasubramaniam, C. Lent, G. Bernstein, and G. nider, “Clocked
quantum-dot cellular automata shift register,” Surface Science, vol. 532, 2003, PP 1193–1198.
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NSTI Nanotech Conference, May 2005, PP 1-4.
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McGraw-Hill Science/ Engineering/Math, second edition, July 2005.
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In First Workshop on Non-Silicon Computation (NSC-1), Boston, MA, 2002 PP 14 -22.
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In Proceedings of IEEE Computer society Annual Symposium on VLSI, 2004, PP 3–10.
Int.Journal of circuit theory and applications, Vol-29, 2001, PP 37 -47.
[38] J. C. Lusth and D. J. Jackson, “Graph theoretic approach to quantum cellular design and analysis”
J. Appl. Phys., vol. 79, no. 4, Feb. 1996, PP 2091-2097.
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Network of Plausible Inference. Morgan Kaufmann, 1988 edition,Ch 1-8,
[40]R. G. Cowell, A. P. David, S. L. Lauritzen, and D. J. Spiegelhalter, Book on “ Probabilistic Networks and Expert Systems”.
New York: Springer-Verlag, 1999, Ch 1-4.
[41] S. Bhanja and S. Srivastava, “Bayesian modeling of quantum-dot-cellular-automata circuits”
NSTI Nanotech Conference, May 2005, PP 1-4.
[42]S. Bhanja and N. Ranganathan, .” Switching activity estimation of vlsi circuits using Bayesian networks”,.
IEEE Transactions on VLSI Systems, February 2003, PP 558-567.
[43] www.genie.com
[44]M.B. Tahoori, M. Momenzadeh, J. Huang and F.Lombardi, “Defects and Faults in Quantum Cellular Automata”,
VLSI Test Symposium, 2004, PP 291-296.
[45]Orlov, R. Kummamuru, R. Ramasubramaniam, C. Lent, G. Bernstein, and G. nider, “Clocked quantum-dot cellular
automata shift register,”
Surface Science, vol. 532,2003, PP 1193–1198.
[46] C. Lent, B. Isaksen, and M. Lieberman, “Molecular quantum-dot cellular automata,”
Journal of American Chemical Society, vol. 125, 2003,PP 1056–1063.
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in Journal of Applied Physics, vol. 94, July 2003, PP. 1050–1060.
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in IEEE Transactions on Nanotechnology, vol. 3, no. 4, 2004, PP 432–442.
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n Proceedings of the 15th ACM Great Lakes symposium on VLSI, 2005,PP 108 -111.
[51]S. Brown and Z. Vranesic Book on “Fundamentals of Digital Logic with VHDL Design”.
McGraw-Hill Science/ Engineering/Math, second edition, July 2005.
[52]Wayne Wolf Book on “FPGA-Based System Design” Prentice Hall PTR Upper Saddle River, NJ, USA, 2004.
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In First Workshop on Non-Silicon Computation (NSC-1), Boston, MA, 2002 PP 14 -22.
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Int. J. Bifurcation Chaos, vol. 7, no. 10,1997, PP 2199–2218.
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atamolecularscale”,inAnn.N.Y.Acad.Sci.960,2002,PP225-239.
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inIEEE2001,Vol-1,PP1162-1167.
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Technologies”MicroelectronicsAdvancedResearchInitiative,1999.
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