Series and Parallel Networks Reduce and Return Approach

Series-parallel networks are networks that contain both series and parallel circuit configurations .For many single-source, series-parallel networks, the analysis is one that works back to the source, determines the source current, and then finds its way to the desired unknown.

1. Series and Parallel Networks
ET 162 Circuit Analysis
Electrical and Telecommunication
Engineering Technology
Professor Jang

2. AcknowledgementAcknowledgement
I want to express my gratitude to Prentice Hall giving me the permission
to use instructor’s material for developing this module. I would like to
thank the Department of Electrical and Telecommunications Engineering
Technology of NYCCT for giving me support to commence and
complete this module. I hope this module is helpful to enhance our
students’ academic performance.

3. OUTLINESOUTLINES
 Introduction to Series-Parallel Networks
 Reduce and Return Approach
 Block Diagram Approach
 Descriptive Examples
 Ladder Networks
ET162 Circuit Analysis – Series and Parallel Networks Boylestad 2
Key Words: Series-Parallel Network, Block Diagram, Ladder Network

4. FIGURE 7.1 Introducing the
reduce and return approach.
Series-Parallel Networks –
Reduce and Return Approach
Series-parallel networks are networks
that contain both series and parallel
circuit configurations
For many single-source, series-parallel
networks, the analysis is one that
works back to the source, determines
the source current, and then finds its
way to the desired unknown.
ET162 Circuit Analysis – Series and parallel networks Boylestad 3

5. FIGURE 7.2 Introducing the block diagram approach.
Series-Parallel Networks
Block Diagram Approach
The block diagram
approach will be
employed throughout
to emphasize the fact
that combinations of
elements, not simply
single resistive
elements, can be in
series or parallel.
ET162 Circuit Analysis – Series and parallel networks Boylestad 4

6. FIGURE 7.3
Ex. 7-1 If each block of Fig.7.3 were a single resistive element, the
network of Fig. 7.4 might result.



mAmAI
kk
Ik
I
mAmAI
kk
Ik
I
s
s
C
s
s
B
69
3
2
3
2
612
12
39
3
1
3
1
126
6








FIGURE 7.4
ET162 Circuit Analysis – Series and parallel networks Boylestad 4

7. A
V
R
E
I
RRR
N
R
R
T
s
CBAT
CB
2
5
10
514
1
2
2
//
//







Ex. 7-2 It is also possible that the blocks A, B, and C of Fig. 7.2 contain
the elements and configurations in Fig. 7.5. Working with each region:






2:
2
2
4
//:
4:
5,454
3//232
RRRRC
N
R
RRRRB
RA
C
B
A
FIGURE 7.5
FIGURE 7.6ET162 Circuit Analysis Boylestad 6

8. A
I
II
A
AII
II
AII
B
RR
sA
CB
sA
5.0
2
1
2
2
22
2
32





VVV
VARIV
VARIV
BC
BBB
AAA
2
221
842



ET162 Circuit Analysis – Series and parallel networks Boylestad 7
FIGURE 7.6

9. Ex. 7-3 Another possible variation of Fig. 7.2 appears in Fig. 7.7.













3
624
39
39
4
6.3
15
54
69
69
5//43
2//1
C
B
A
R
RRR
RR

AII
A
V
R
E
I
RRR
sA
T
s
CBAT
3
3
6.5
8.16
6.526.3
36
36
6.3
//








FIGURE 7.7
FIGURE 7.8
ET162 Circuit Analysis – Series and parallel networks 8

10. 

VARIVRIV
VARIV
lawsOhmBy
AAAIII
lawcurrentsKirchhoffBy
A
A
RR
IR
I
yieldsruledividercurrenttheApplying
CCCBBB
AAA
BAC
BC
AC
B
632
8.106.33
,'
213
,'
1
63
33










A
AA
III
A
A
RR
IR
I
A
A
8.1
2.13
2.1
96
36
12
12
2
1










11. Series-Parallel Networks - Descriptive Examples
Ex. 7-4 Find the current I
4 and the voltage V
2 for the network of Fig. 7.2 .

V
V
RR
ER
V
RRR
A
V
R
E
R
E
I
CD
D
D
B
4
42
122
26//3//
5.1
8
12
2
32
4
4










FIGURE 7.9
FIGURE 7.10 FIGURE 7.11
ET162 Circuit Analysis – Series and parallel networks Boylestad 10

12. Ex. 7-5 Find the indicated currents and the voltages for the network of Fig. 7.12 .
FIGURE 7.13

















8.4
20
96
128
128
2.1
5
6
23
23
3
2
6
5//4
3//2//1
2//1
RR
RR
N
R
R
B
A
FIGURE 7.12
ET162 Circuit Analysis – Series and parallel networks Boylestad 11

13. ET162 Circuit Analysis – Series and parallel networks Boylestad 12
A
V
R
E
I
RRR
T
s
T
4
6
24
68.42.1
5//43//2//1






 VARIV
VARIV
s
s
2.198.44
8.42.14
5//42
3//2//11


FIGURE 7.13
A
V
R
V
R
V
I
A
V
R
V
I
8.0
6
8.4
4.2
8
2.19
2
1
2
2
2
4
5
4







14. Ex. 7-6 a. Find the voltages V
1, V
2, and V
ab for the network of Fig. 7.14.
b. Calculate the source current I
s.


Applyingthevoltagedividerruleyields
V
RE
RR
V
V
V
RE
R R
V
V
1
1
1 2
3
3
3 4
512
5 3
75
612
6 2
9











 

 
.
ApplyingKirchhoffsvoltagelawaround
theindicatedloopofFig
VVV
V VV V V V
a b
ab
'
.
. .

 
1 3
3 1
0
9 75 15
FIGURE 7.14
a.
FIGURE 7.15
ET162 Circuit Analysis – Series and parallel networks Boylestad 13

15. b.
ByOhmslaw
I
V
R
V
A
I
V
R
V
A
' ,
.
.
.
1
1
1
3
3
3
75
5
15
9
6
15
  
  


Applying Kirchhoff’s current law,
I
s = I
1 + I
3 = 1.5A + 1.5A = 3A
ET162 Circuit Analysis – Series and parallel networks Boylestad 14

16. Ex. 7-7 For the network of Fig. 7.16, determine the voltages V
1
and V
2
and
current I.
FIGURE 7.17
FIGURE 7.16
V
2 = – E
1 = – 6V
Applying KVL to the loop
E
1 – V
1 + E
2 = 0
V
1
= E
2
+ E
1
=18V + 6V = 24V
ApplyingKCLtonodeayields
IIII
V
R
E
R
E
R R
V V V
A A A A
  
  

  
   
1 2 3
1
1
1
4
1
2 3
24
6
6
6
6
12
4 1 05 55
  
. .
ET162 Circuit Analysis – Series and parallel networks Boylestad 15

17. Ex. 7-9 Calculate the indicated currents and voltage of Fig.7.17.
FIGURE 7.17.
 
mA
k
V
R
V
I
V
V
kk
Vk
RR
ER
V
mA
k
V
kk
V
RR
E
I
35.4
5.4
6.19
6.19
5.16
324
125.4
725.4
3
24
72
1212
72
)9,8//(7
7
6
6)9,8//(7
)9,8//(7
7
54//)3,2,1(
5
















I
s = I
5 + I
6 = 3 mA +4.35 mA = 7.35 mA
9 kΩ
ET162 Circuit Analysis – Series and parallel networks Boylestad 16

18. Ex. 7-10 This example demonstrates the power of Kirchhoff’s voltage law
by determining the voltages V
1
, V
2
, and V
3
for the network of Fig.7.18.
FIGURE 7.17.
Forthepath EVE
V E E V V V
Forthepath EVV
V EV V V V
Forthepath VV E
V EV V V V
1 0
20 8 12
2 0
5 12 7
3 0
8 7 15
1 1 3
1 1 3
2 1 2
2 2 1
3 2 3
3 3 2
,
,
,
( )

 

 


FIGURE 7.18.
ET162 Circuit Analysis – Series and parallel networks Boylestad 17

19. Series-Parallel Networks – Ladder Networks
A three-section ladder appears in Fig. 7.19.
FIGURE 7.19. Ladder network.
ET162 Circuit Analysis – Series and parallel networks Boylestad 18

20. R
I
E
R
V
A
T
s
T
  
  
5 3 8
240
8
30


FIGURE 7.20.
FIGURE 7.21.
ET162 Circuit Analysis – Series and parallel networks Boylestad 19

21. II
I
I A
A
s
s
1
3
2
30
2
15

  



I
I
A A
V IR A V
6
3
6 6 6
6
6 3
6
9
15 10
10 2 20


 
  

 

ET162 Circuit Analysis – Series and parallel networks Boylestad 20